Парвки кода.

CodeVerilog/readme.md

@@ -137,19 +137,19 @@ module spi (
 Например:
 ```verilog
 	if (condition1) begin
-		if (condition2) begin
-			doSomething;
-		end
+      if (condition2) begin
+        doSomething;
+      end
 	end else begin
-		if (condition3) begin
-			if (condition4) begin
-				doSomething;
-			end else begin
-				doSomething;
-			end
-		end else begin
-			doSomething;
-		end
+      if (condition3) begin
+        if (condition4) begin
+          doSomething;
+        end else begin
+          doSomething;
+        end
+      end else begin
+        doSomething;
+      end
 	end
 ```