automat.c 22 KB

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  1. #include "core/config.h"
  2. #if CONFIG_AUTOMAT_MODE && ( CONFIG_KEYSW || CONFIG_NFMBASECLASS )
  3. #include <stdint.h>
  4. #include <intrinsics.h>
  5. #include <stdlib.h>
  6. #include "core/csect.h"
  7. #include "app/rseq/rseq.h"
  8. #include "app/automat/automat.h"
  9. #include "core/debugpins.h"
  10. #if CONFIG_EXTMEM
  11. #include "drivers/flash/base/extmem_flash.h"
  12. #endif
  13. #if CONFIG_NFMBASECLASS
  14. #include "app/nfm/nfm_base.h"
  15. #elif CONFIG_KEYSW
  16. #include "drivers/keycontrol/keycontrol.h" // KEYCONTROL_STATE_LDASHALL, KEYCONTROL_STATE_LDBSHALL, KEYCONTROL_STATE_DEFAULT, KeySwitchHandle
  17. #endif
  18. #if CONFIG_NFMBASECLASS
  19. //
  20. #define PROTO_KEYSTATE_ARRAY { eKeyState_SALL,\
  21. eKeyState_OALL,\
  22. eKeyState_LALL, }
  23. #elif CONFIG_KEYSW
  24. // SC3v4_UPC2163
  25. #define PROTO_KEYSTATE_ARRAY_LEGACY { KEYCONTROL_STATE_SHORTALL,\
  26. KEYCONTROL_STATE_OPENALL,\
  27. KEYCONTROL_STATE_LOADALL, }
  28. #elif
  29. #error Please, define either CONFIG_NFMBASECLASS or CONFIG_KEYSW.
  30. #endif
  31. //---------------------------------------------------
  32. #define DEBUG_PIN CONFIG_AUTOMAT_DEBUGPIN_1 // Debug pin: proto data output
  33. #define DEBUG_PIN_2 CONFIG_AUTOMAT_DEBUGPIN_2 // Debug pin: proto data output
  34. #define DEBUG_PIN_3 CONFIG_AUTOMAT_DEBUGPIN_3 // Debug pin
  35. #define KEY_STATE_DEBUG 0 // Debug pin: key state data output
  36. #define DEBUG_AUTOMAT_DATA 0 // Demo 'automat' data
  37. #define DEBUG_AUTOMAT_DATA_WRITE 0 // Save demo 'automat' data into flash
  38. #define T_INTERVAL_MUL 1 // Elementary proto-time-slot, <T>. (Interval=<T>*3)
  39. #define DATAROM_BLOCK_ADDR 0x17FFFC // áûëî 0x17FFFC, ïîòîì 0x07FFFC, ïîòîì èñïðàâèë ñíîâà íà 0x17FFFC
  40. #define DATAROM_SERIAL_ADDR 0x000040
  41. #define DATAROM_SIGNATURE 0x55
  42. #define PROTO_LOGIC_0_KEYSTATE_LEGACY KEYCONTROL_STATE_LDASHALL
  43. #define PROTO_LOGIC_1_KEYSTATE_LEGACY KEYCONTROL_STATE_LDBSHALL
  44. #define PROTO_LOGIC_0_KEYSTATE eKeyState_LASR
  45. #define PROTO_LOGIC_1_KEYSTATE eKeyState_LBSR
  46. #define NO_LOCKERS 1 // do not use lockers due to all job is in IRQ
  47. //==============================================================================
  48. //==============================================================================
  49. //==============================================================================
  50. //==============================================================================
  51. //==============================================================================
  52. //==============================================================================
  53. #if DEBUG_PIN && CONFIG_AUTOMAT_DEBUGPIN_1
  54. #define DEBUG_INIT_PIN
  55. #define DEBUG_SET_PIN CONFIG_AUTOMAT_DEBUGPIN_SETPIN_1
  56. #define DEBUG_CLR_PIN CONFIG_AUTOMAT_DEBUGPIN_CLRPIN_1
  57. #else
  58. #define DEBUG_INIT_PIN
  59. #define DEBUG_SET_PIN
  60. #define DEBUG_CLR_PIN
  61. #endif
  62. #if DEBUG_PIN_2 && CONFIG_AUTOMAT_DEBUGPIN_2
  63. #define DEBUG_INIT_PIN2
  64. #define DEBUG_SET_PIN2 CONFIG_AUTOMAT_DEBUGPIN_SETPIN_2
  65. #define DEBUG_CLR_PIN2 CONFIG_AUTOMAT_DEBUGPIN_CLRPIN_2
  66. #else
  67. #define DEBUG_INIT_PIN2
  68. #define DEBUG_SET_PIN2
  69. #define DEBUG_CLR_PIN2
  70. #endif
  71. #if DEBUG_PIN_3 && CONFIG_AUTOMAT_DEBUGPIN_3
  72. #define DEBUG_INIT_PIN3
  73. #define DEBUG_SET_PIN3 CONFIG_AUTOMAT_DEBUGPIN_SETPIN_3
  74. #define DEBUG_CLR_PIN3 CONFIG_AUTOMAT_DEBUGPIN_CLRPIN_3
  75. #else
  76. #define DEBUG_INIT_PIN3
  77. #define DEBUG_SET_PIN3
  78. #define DEBUG_CLR_PIN3
  79. #endif
  80. //------------------------------------------------------------------------------------------
  81. static bool automat_event_startup( uint32_t ticks_per_1ms );
  82. static void automat_ievent_tick();
  83. static void automat_temperature_update( int8_t avgtemp_degree, bool isValueReady );
  84. static void automat_event_shutdown();
  85. const sNFMAutomatHandle_t NFMAutomatHandle = {
  86. .Init = automat_event_startup,
  87. .Tick = automat_ievent_tick,
  88. .TemperatureUpdate = automat_temperature_update,
  89. .DeInit = automat_event_shutdown,
  90. };
  91. //------------------------------------------------------------------------------------------
  92. static bool sleep = false;
  93. static bool state = false;
  94. static volatile bool initialized = false;
  95. // -----------
  96. #pragma pack(push,1)
  97. typedef union
  98. {
  99. struct
  100. {
  101. uint8_t data[3];
  102. };
  103. struct
  104. {
  105. uint8_t signature;
  106. uint16_t interval;
  107. uint8_t checksumm;
  108. };
  109. }
  110. sHeader_t;
  111. #pragma pack(pop)
  112. // -----------
  113. #pragma pack(push,1)
  114. typedef union
  115. {
  116. char rawBytes[9];
  117. struct
  118. {
  119. char rawSerialTruncated[8];
  120. char rawSerialNullchr;
  121. };
  122. }
  123. sSerial_t;
  124. #pragma pack(pop)
  125. // -----------
  126. #pragma pack(push, 1)
  127. typedef struct
  128. {
  129. struct
  130. {
  131. uint32_t gp_timer_counter;
  132. uint32_t gp_timer_maximum;
  133. }
  134. counters;
  135. struct
  136. {
  137. bool avgTempReady;
  138. uint8_t avgTempDegree;
  139. uint8_t ticks_per_1ms;
  140. }
  141. extData;
  142. #if CONFIG_NFMBASECLASS
  143. struct
  144. {
  145. int32_t shortcutIdState0;
  146. int32_t shortcutIdState1;
  147. }
  148. keyStates;
  149. #endif
  150. union
  151. {
  152. struct
  153. {
  154. uint32_t serial;
  155. uint16_t interval;
  156. uint8_t temp;
  157. uint8_t checksumm;
  158. };
  159. struct
  160. {
  161. uint8_t checksummBytes[7];
  162. uint8_t checksumm;
  163. }
  164. raw;
  165. uint8_t txBytes[1]; // per-byte access
  166. }
  167. locData;
  168. struct
  169. {
  170. uint8_t idx;
  171. uint8_t len;
  172. uint8_t bit;
  173. }
  174. protoControl;
  175. union
  176. {
  177. sHeader_t rawHeader;
  178. sSerial_t rawSerial;
  179. }
  180. uTempStorage;
  181. }
  182. sData_t;
  183. #pragma pack(pop)
  184. // -----------
  185. #if CONFIG_NFMBASECLASS
  186. static const eNFMKeyState_t automatKeyStates[] = PROTO_KEYSTATE_ARRAY;
  187. #elif CONFIG_KEYSW
  188. static const uint32_t automatKeyStatesLegacy[] = PROTO_KEYSTATE_ARRAY_LEGACY;
  189. #endif
  190. // -----------
  191. static fRoutine_t * rseq_task_list[ 8 ];
  192. static fRoutine_t * rseq_timer_list[ 2 ];
  193. static sRoutineSequence_t rseq_timer;
  194. static sRoutineSequence_t rseq_task;
  195. static sData_t g_sData;
  196. // -----------
  197. bool seqirq_state_wait_enum( void * arg );
  198. bool seqirq_state_enum_timeout( void * arg );
  199. bool seqirq_state_timer_nextstate( void * arg );
  200. bool seqirq_state_timer_prevstate( void * arg );
  201. bool seq_state_initstart( void * arg );
  202. bool seq_state_start( void * arg );
  203. bool seq_state_transmit_0( void * arg );
  204. bool seq_state_wait( void * arg );
  205. bool seq_state_transmit_1( void * arg );
  206. bool seq_state_transmit_next( void * arg );
  207. bool seq_state_keycontol_init( void * arg );
  208. bool seq_state_keycontol_next( void * arg );
  209. bool check_header( void * arg );
  210. // -----------------------------------------------------------------------------
  211. // -----------------------------------------------------------------------------
  212. // -----------------------------------------------------------------------------
  213. static inline void dataLineAssertLogic0()
  214. {
  215. DEBUG_CLR_PIN;
  216. #if CONFIG_NFMBASECLASS
  217. NFMClass->methods.keyStatesMethods.shortcuts.setKeyStateByShortcut( g_sData.keyStates.shortcutIdState0 );
  218. #elif CONFIG_KEYSW
  219. KeySwitchHandle.SetKeyState( PROTO_LOGIC_0_KEYSTATE_LEGACY );
  220. #endif
  221. }
  222. static inline void dataLineAssertLogic1()
  223. {
  224. DEBUG_SET_PIN;
  225. #if CONFIG_NFMBASECLASS
  226. NFMClass->methods.keyStatesMethods.shortcuts.setKeyStateByShortcut( g_sData.keyStates.shortcutIdState1 );
  227. #elif CONFIG_KEYSW
  228. KeySwitchHandle.SetKeyState( PROTO_LOGIC_1_KEYSTATE_LEGACY );
  229. #endif
  230. }
  231. static inline void dataLineAssertLogic(bool state)
  232. {
  233. if( state )
  234. dataLineAssertLogic1();
  235. else
  236. dataLineAssertLogic0();
  237. }
  238. // -----------------------------------------------------------------------------
  239. // -----------------------------------------------------------------------------
  240. // -----------------------------------------------------------------------------
  241. #if NO_LOCKERS == 0
  242. static inline bool seqTake( void * arg )
  243. {
  244. DI();
  245. return true;
  246. }
  247. static inline bool seqFree( void * arg )
  248. {
  249. EI();
  250. return true;
  251. }
  252. #endif
  253. static inline bool getTxLineBitValue( const uint8_t * pDataArray, int32_t idx )
  254. {
  255. return ( pDataArray[ idx/8 ] & (1 << idx%8) );
  256. }
  257. static uint8_t getChecksumm( const uint8_t * pDataArray, uint32_t len )
  258. {
  259. uint16_t checksumm16 = 0;
  260. for( int idx = 0; idx < len; ++idx )
  261. {
  262. checksumm16 += pDataArray[idx];
  263. checksumm16 = (checksumm16 >> 8) + ((uint8_t)checksumm16);
  264. }
  265. return (uint8_t)checksumm16;
  266. }
  267. static bool automat_event_startup( uint32_t ticks_per_1ms )
  268. {
  269. bool result = false;
  270. __DI__
  271. rsa_sequence_init( &rseq_task, &g_sData, rseq_task_list, sizeof(rseq_task_list)/sizeof(*rseq_task_list) );
  272. rsa_sequence_init( &rseq_timer, &g_sData, rseq_timer_list, sizeof(rseq_timer_list)/sizeof(*rseq_timer_list) );
  273. #if NO_LOCKERS == 0
  274. rsa_sequence_setlockers( &rseq_timer, seqTake, seqFree );
  275. rsa_sequence_setlockers( &rseq_task, seqTake, seqFree );
  276. #endif
  277. g_sData.extData.avgTempDegree = 0;
  278. g_sData.extData.avgTempReady = false;
  279. g_sData.extData.ticks_per_1ms = ticks_per_1ms;
  280. g_sData.locData.checksumm = 0;
  281. g_sData.locData.interval = 0;
  282. g_sData.locData.serial = 0;
  283. g_sData.locData.temp = 0;
  284. g_sData.protoControl.bit = 0;
  285. g_sData.protoControl.idx = 0;
  286. g_sData.protoControl.len = 0;
  287. #if CONFIG_NFMBASECLASS
  288. g_sData.keyStates.shortcutIdState0 = -1;
  289. g_sData.keyStates.shortcutIdState1 = -1;
  290. // Initialize shortcuts for fast switching
  291. int32_t shortcutState0 = -1, shortcutState1 = -1;
  292. NFMClass->methods.keyStatesMethods.shortcuts.findShortCutForState( PROTO_LOGIC_0_KEYSTATE, &shortcutState0 );
  293. NFMClass->methods.keyStatesMethods.shortcuts.findShortCutForState( PROTO_LOGIC_1_KEYSTATE, &shortcutState1 );
  294. g_sData.keyStates.shortcutIdState0 = shortcutState0;
  295. g_sData.keyStates.shortcutIdState1 = shortcutState1;
  296. #endif
  297. rsa_sequence_clear( &rseq_task );
  298. if( check_header( &g_sData ) )
  299. {
  300. rsa_sequence_insert_routine( &rseq_task, seq_state_initstart );
  301. result = true;
  302. }
  303. sleep = false; // disallow to sleep
  304. state = false; // current automat state = still disabled(false)
  305. initialized = true;
  306. __EI__
  307. DEBUG_INIT_PIN;
  308. DEBUG_INIT_PIN2;
  309. return result;
  310. }
  311. static void automat_event_shutdown()
  312. {
  313. __DI__
  314. if( initialized )
  315. {
  316. rsa_sequence_iclear( &rseq_task );
  317. rsa_sequence_iclear( &rseq_timer );
  318. sleep = false; // disallow to sleep
  319. state = false; // current automat state = still disabled(false)
  320. initialized = false;
  321. }
  322. __EI__
  323. }
  324. static void automat_ievent_tick()
  325. {
  326. if( ! initialized ) return;
  327. if( rsa_sequence_icall( &rseq_timer ) )
  328. {
  329. rsa_sequence_ireset( &rseq_timer );
  330. }
  331. if( rsa_sequence_icall( &rseq_task ) )
  332. {
  333. rsa_sequence_ireset( &rseq_task );
  334. }
  335. }
  336. static void automat_temperature_update( int8_t avgtemp_degree, bool isValueReady )
  337. {
  338. if( ! initialized ) return;
  339. if( state )
  340. {
  341. __DI__ g_sData.extData.avgTempDegree = avgtemp_degree;
  342. g_sData.extData.avgTempReady = isValueReady; __EI__
  343. }
  344. }
  345. // check_header
  346. static bool check_header( void * arg )
  347. {
  348. sData_t * pData = (sData_t*)(arg);
  349. bool dataLoaded = false;
  350. {
  351. pData->uTempStorage.rawHeader.signature = ~DATAROM_SIGNATURE;
  352. #if DEBUG_AUTOMAT_DATA == 0
  353. #if CONFIG_EXTMEM
  354. if( !ExtMemHandle.Read( DATAROM_BLOCK_ADDR,
  355. (__FLASH_BYTE*)&pData->uTempStorage.rawHeader,
  356. sizeof(pData->uTempStorage.rawHeader)) )
  357. {
  358. pData->uTempStorage.rawHeader.signature = ~DATAROM_SIGNATURE;
  359. }
  360. #endif
  361. #else
  362. pData->uTempStorage.rawHeader.signature = DATAROM_SIGNATURE;
  363. pData->uTempStorage.rawHeader.interval = 1000;
  364. pData->uTempStorage.rawHeader.checksumm = 0x41;
  365. #if CONFIG_EXTMEM
  366. #if DEBUG_AUTOMAT_DATA_WRITE == 1
  367. ExtMemHandle.Write( DATAROM_BLOCK_ADDR,
  368. (__FLASH_BYTE*)&pData->uTempStorage.rawHeader,
  369. sizeof(pData->uTempStorage.rawHeader) );
  370. #endif
  371. #endif
  372. #endif
  373. if( pData->uTempStorage.rawHeader.signature == DATAROM_SIGNATURE )
  374. {
  375. uint8_t checksumm = getChecksumm( pData->uTempStorage.rawHeader.data,
  376. sizeof(pData->uTempStorage.rawHeader.data) );
  377. if( pData->uTempStorage.rawHeader.checksumm == checksumm )
  378. {
  379. if( pData->uTempStorage.rawHeader.interval > 0 )
  380. {
  381. pData->locData.interval = pData->uTempStorage.rawHeader.interval;
  382. pData->uTempStorage.rawSerial.rawSerialNullchr = '\0';
  383. for( int idx = 0; idx <= sizeof(pData->uTempStorage.rawSerial.rawSerialTruncated); ++idx )
  384. {
  385. pData->uTempStorage.rawSerial.rawSerialTruncated[idx] = '\0';
  386. }
  387. #if DEBUG_AUTOMAT_DATA
  388. pData->locData.serial = 0x05555555;
  389. dataLoaded = true;
  390. #else
  391. #if CONFIG_EXTMEM
  392. if( ExtMemHandle.Read( DATAROM_SERIAL_ADDR,
  393. (__FLASH_BYTE*)pData->uTempStorage.rawSerial.rawSerialTruncated,
  394. sizeof(pData->uTempStorage.rawSerial.rawSerialTruncated) ) )
  395. {
  396. pData->locData.serial = atoi(pData->uTempStorage.rawSerial.rawBytes);
  397. dataLoaded = true;
  398. }
  399. #else
  400. pData->locData.serial = 0x05555555;
  401. dataLoaded = true;
  402. #endif
  403. #endif
  404. #if DEBUG_AUTOMAT_DATA_WRITE == 1
  405. #if CONFIG_EXTMEM
  406. if( dataLoaded )
  407. {
  408. ExtMemHandle.Write( DATAROM_SERIAL_ADDR, "5555555\0", 8 );
  409. }
  410. #endif
  411. #endif
  412. }
  413. }
  414. }
  415. }
  416. return dataLoaded;
  417. }
  418. // [seq_state_check_header] => {seq_state_initstart}
  419. /* TASK */static bool seq_state_initstart( void * arg )
  420. {
  421. sData_t * pData = (sData_t*)(arg);
  422. // do not initiate startup sequence until the temperature is ready
  423. if( pData->extData.avgTempReady )
  424. {
  425. __DI__
  426. rsa_sequence_iclear( &rseq_task );
  427. rsa_sequence_iinsert_routine( &rseq_task, seq_state_initstart );
  428. rsa_sequence_iinsert_routine( &rseq_task, seq_state_wait );
  429. rsa_sequence_iinsert_routine( &rseq_task, seq_state_transmit_0 );
  430. rsa_sequence_iinsert_routine( &rseq_task, seq_state_wait );
  431. rsa_sequence_iinsert_routine( &rseq_task, seq_state_transmit_1 );
  432. rsa_sequence_iinsert_routine( &rseq_task, seq_state_wait );
  433. rsa_sequence_iinsert_routine( &rseq_task, seq_state_transmit_next );
  434. __EI__
  435. // initiate START signal
  436. dataLineAssertLogic( true );
  437. __DI__
  438. pData->counters.gp_timer_counter = 0;
  439. // Synchronious mode: 1 tick has been spent while changing the state
  440. pData->counters.gp_timer_maximum = (T_INTERVAL_MUL * 3) - 1;
  441. rsa_sequence_ireset( &rseq_task );
  442. rsa_sequence_iskip_routine( &rseq_task ); // {seq_state_start}
  443. rsa_sequence_iclear( &rseq_timer );
  444. rsa_sequence_iinsert_routine( &rseq_timer, seqirq_state_timer_nextstate );
  445. __EI__
  446. //----- checksumm
  447. pData->locData.temp = pData->extData.avgTempDegree;
  448. pData->locData.checksumm = getChecksumm( pData->locData.raw.checksummBytes,
  449. sizeof(pData->locData.raw.checksummBytes) );
  450. //----- checksumm
  451. pData->protoControl.bit = 0;
  452. pData->protoControl.idx = 0;
  453. pData->protoControl.len = 8 * sizeof(pData->locData.raw); // in [bits]
  454. // initiate START signal
  455. dataLineAssertLogic( true );
  456. }
  457. state = true; // fixed: 22/05/19
  458. sleep = true; // allow to sleep (wait for timer)
  459. return false; // do not move to next routine implicitly
  460. }
  461. // [seq_state_check_header] => [seq_state_initstart] => {seq_state_start}
  462. /* TASK */static bool seq_state_start( void * arg )
  463. {
  464. // interrupt START signal
  465. dataLineAssertLogic( false );
  466. sleep = false; // disallow to sleep
  467. DEBUG_SET_PIN3
  468. return true; // [seq_state_transmit_0]
  469. }
  470. // [seq_state_start] => {seq_state_transmit_0}
  471. /* TASK */static bool seq_state_transmit_0( void * arg )
  472. {
  473. sData_t * pData = (sData_t*)(arg);
  474. pData->protoControl.bit = getTxLineBitValue( pData->locData.txBytes,
  475. pData->protoControl.idx );
  476. if( pData->protoControl.bit )
  477. { DEBUG_SET_PIN2 }
  478. else
  479. { DEBUG_CLR_PIN2 }
  480. // just for order: repeat signal after @seq_state_start
  481. // interrupt START signal
  482. dataLineAssertLogic( false );
  483. __DI__
  484. pData->counters.gp_timer_counter = 0;
  485. // Synchronious mode: 1 tick has been spent for @seq_state_wait or @seq_state_transmit_next
  486. pData->counters.gp_timer_maximum = T_INTERVAL_MUL * ((pData->protoControl.bit)?1:2) - 1;
  487. rsa_sequence_iinsert_routine( &rseq_timer, seqirq_state_timer_nextstate );
  488. __EI__
  489. sleep = false; // disallow to sleep
  490. return true; // [seq_state_wait]
  491. }
  492. // [seq_state_transmit_0] => {seq_state_wait} => [seq_state_transmit_1] => {seq_state_wait}
  493. /* TASK */static bool seq_state_wait( void * arg )
  494. {
  495. sleep = true; // during waiting state - allow to sleep
  496. return false;
  497. }
  498. // [seq_state_wait] => {seq_state_transmit_1}
  499. /* TASK */static bool seq_state_transmit_1( void * arg )
  500. {
  501. sData_t * pData = (sData_t*)(arg);
  502. //rsa_sequence_insert_routine( &rseq_timer, seqirq_state_timer_nextstate );
  503. pData->protoControl.bit = getTxLineBitValue( pData->locData.txBytes,
  504. pData->protoControl.idx );
  505. dataLineAssertLogic( true );
  506. __DI__
  507. pData->counters.gp_timer_counter = 0;
  508. // Synchronious mode: 1 tick has been spent for @seq_state_wait or @seq_state_transmit_next
  509. pData->counters.gp_timer_maximum = T_INTERVAL_MUL * ((pData->protoControl.bit)?2:1) - 1;
  510. rsa_sequence_iinsert_routine( &rseq_timer, seqirq_state_timer_nextstate );
  511. __EI__
  512. sleep = false; // disallow to sleep
  513. return true; // [seq_state_wait]
  514. }
  515. // [seq_state_wait] => {seq_state_transmit_next}
  516. /* TASK */ static bool seq_state_transmit_next( void * arg )
  517. {
  518. sData_t * pData = (sData_t*)(arg);
  519. pData->protoControl.idx++;
  520. if( pData->protoControl.idx >= pData->protoControl.len )
  521. {
  522. //debugpin_2_pulse(); --- STOP signal duration measure
  523. dataLineAssertLogic( false );
  524. __DI__
  525. rsa_sequence_iclear( &rseq_task );
  526. rsa_sequence_iclear( &rseq_timer );
  527. pData->counters.gp_timer_counter = 0;
  528. pData->counters.gp_timer_maximum = T_INTERVAL_MUL;
  529. __EI__
  530. //---------
  531. //---------
  532. __DI__
  533. rsa_sequence_iinsert_routine( &rseq_task, seq_state_wait );
  534. rsa_sequence_iinsert_routine( &rseq_timer, seqirq_state_timer_nextstate );
  535. //---------
  536. rsa_sequence_iinsert_routine( &rseq_task, seq_state_keycontol_init );
  537. rsa_sequence_iinsert_routine( &rseq_task, seq_state_keycontol_next );
  538. rsa_sequence_iinsert_routine( &rseq_task, seq_state_wait );
  539. __EI__
  540. //---------
  541. sleep = true; // wait for next state - allow to sleep
  542. }
  543. else
  544. {
  545. dataLineAssertLogic( false );
  546. __DI__
  547. rsa_sequence_iback_routine( &rseq_task ); // =>[seq_state_wait]
  548. rsa_sequence_iback_routine( &rseq_task ); // =>[seq_state_transmit_1]
  549. rsa_sequence_iback_routine( &rseq_task ); // =>[seq_state_wait]
  550. __EI__
  551. seq_state_transmit_0( arg );
  552. DEBUG_CLR_PIN3
  553. sleep = false; // disallow to sleep
  554. }
  555. return false;
  556. }
  557. // {seqirq_state_timer_nextstate}
  558. /* IRQ */ static bool seqirq_state_timer_nextstate( void * arg )
  559. {
  560. sData_t * pData = (sData_t*)(arg);
  561. if( pData->counters.gp_timer_counter < pData->counters.gp_timer_maximum )
  562. {
  563. pData->counters.gp_timer_counter++;
  564. sleep = true; // allow to sleep each timer shoot
  565. return false;
  566. }
  567. rsa_sequence_remove_routine( &rseq_timer ); // [seqirq_state_timer_nextstate] => 0
  568. rsa_sequence_skip_routine( &rseq_task ); // next
  569. return true;
  570. }
  571. // {seqirq_state_timer_prevstate}
  572. /* IRQ */ static bool seqirq_state_timer_prevstate( void * arg )
  573. {
  574. sData_t * pData = (sData_t*)(arg);
  575. if( pData->counters.gp_timer_counter < pData->counters.gp_timer_maximum )
  576. {
  577. pData->counters.gp_timer_counter++;
  578. sleep = true; // allow to sleep each timer shoot
  579. return false;
  580. }
  581. rsa_sequence_remove_routine( &rseq_timer ); // [seqirq_state_timer_nextstate] => 0
  582. rsa_sequence_back_routine( &rseq_task ); // prev
  583. return true;
  584. }
  585. // [seq_state_transmit_next] => {seq_state_keycontol_init}
  586. /* TASK */ static bool seq_state_keycontol_init( void * arg )
  587. {
  588. sData_t * pData = (sData_t*)(arg);
  589. pData->protoControl.bit = 1;
  590. pData->protoControl.idx = 0;
  591. #if CONFIG_NFMBASECLASS
  592. pData->protoControl.len = sizeof(automatKeyStates)/sizeof(*automatKeyStates);
  593. #elif CONFIG_KEYSW
  594. pData->protoControl.len = sizeof(automatKeyStatesLegacy)/sizeof(*automatKeyStatesLegacy);
  595. #endif
  596. sleep = false; // disallow to sleep
  597. return true;
  598. }
  599. // [seq_state_keycontol_init] => {seq_state_keycontol_next}
  600. /* TASK */ static bool seq_state_keycontol_next( void * arg )
  601. {
  602. sData_t * pData = (sData_t*)(arg);
  603. if( pData->protoControl.idx >= pData->protoControl.len )
  604. {
  605. __DI__
  606. rsa_sequence_iclear( &rseq_task );
  607. rsa_sequence_iclear( &rseq_timer );
  608. rsa_sequence_iinsert_routine( &rseq_task, seq_state_initstart );
  609. __EI__
  610. sleep = false; // disallow to sleep
  611. return false;
  612. }
  613. #if (KEY_STATE_DEBUG > 0) && (DEBUG_PIN > 0)
  614. if( pData->protoControl.bit == 0 ) {
  615. pData->protoControl.bit = 1; DEBUG_CLR_PIN;
  616. } else {
  617. pData->protoControl.bit = 0; DEBUG_SET_PIN;
  618. }
  619. #endif
  620. //debugpin_2_pulse(); --- STOP signal duration measure
  621. #if CONFIG_NFMBASECLASS
  622. NFMClass->methods.keyStatesMethods.setKeyStateCommon( automatKeyStates[ pData->protoControl.idx ] );
  623. #elif CONFIG_KEYSW
  624. KeySwitchHandle.SetKeyState( automatKeyStatesLegacy[ pData->protoControl.idx ] );
  625. #endif
  626. pData->protoControl.idx++;
  627. __DI__
  628. pData->counters.gp_timer_counter = 0;
  629. pData->counters.gp_timer_maximum = (pData->locData.interval)*(pData->extData.ticks_per_1ms);
  630. rsa_sequence_iinsert_routine( &rseq_timer, seqirq_state_timer_prevstate );
  631. __EI__
  632. sleep = false; // disallow to sleep
  633. return true;
  634. }
  635. #endif