stm32l1xx_hal_pcd.h 33 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l1xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of PCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32L1xx_HAL_PCD_H
  37. #define __STM32L1xx_HAL_PCD_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. /* Includes ------------------------------------------------------------------*/
  42. #include "stm32l1xx_hal_def.h"
  43. /** @addtogroup STM32L1xx_HAL_Driver
  44. * @{
  45. */
  46. /** @addtogroup PCD
  47. * @{
  48. */
  49. /* Exported types ------------------------------------------------------------*/
  50. /** @defgroup PCD_Exported_Types PCD Exported Types
  51. * @{
  52. */
  53. /**
  54. * @brief PCD State structure definition
  55. */
  56. typedef enum
  57. {
  58. HAL_PCD_STATE_RESET = 0x00,
  59. HAL_PCD_STATE_READY = 0x01,
  60. HAL_PCD_STATE_ERROR = 0x02,
  61. HAL_PCD_STATE_BUSY = 0x03,
  62. HAL_PCD_STATE_TIMEOUT = 0x04
  63. } PCD_StateTypeDef;
  64. /**
  65. * @brief PCD double buffered endpoint direction
  66. */
  67. typedef enum
  68. {
  69. PCD_EP_DBUF_OUT,
  70. PCD_EP_DBUF_IN,
  71. PCD_EP_DBUF_ERR,
  72. }PCD_EP_DBUF_DIR;
  73. /**
  74. * @brief PCD endpoint buffer number
  75. */
  76. typedef enum
  77. {
  78. PCD_EP_NOBUF,
  79. PCD_EP_BUF0,
  80. PCD_EP_BUF1
  81. }PCD_EP_BUF_NUM;
  82. /**
  83. * @brief PCD Initialization Structure definition
  84. */
  85. typedef struct
  86. {
  87. uint32_t dev_endpoints; /*!< Device Endpoints number.
  88. This parameter depends on the used USB core.
  89. This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
  90. uint32_t speed; /*!< USB Core speed.
  91. This parameter can be any value of @ref PCD_Core_Speed */
  92. uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
  93. This parameter can be any value of @ref PCD_EP0_MPS */
  94. uint32_t phy_itface; /*!< Select the used PHY interface.
  95. This parameter can be any value of @ref PCD_Core_PHY */
  96. uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal.
  97. This parameter can be set to ENABLE or DISABLE */
  98. uint32_t low_power_enable; /*!< Enable or disable Low Power mode
  99. This parameter can be set to ENABLE or DISABLE */
  100. uint32_t lpm_enable; /*!< Enable or disable the Link Power Management .
  101. This parameter can be set to ENABLE or DISABLE */
  102. uint32_t battery_charging_enable; /*!< Enable or disable Battery charging.
  103. This parameter can be set to ENABLE or DISABLE */
  104. }PCD_InitTypeDef;
  105. typedef struct
  106. {
  107. uint8_t num; /*!< Endpoint number
  108. This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
  109. uint8_t is_in; /*!< Endpoint direction
  110. This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
  111. uint8_t is_stall; /*!< Endpoint stall condition
  112. This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
  113. uint8_t type; /*!< Endpoint type
  114. This parameter can be any value of @ref PCD_EP_Type */
  115. uint16_t pmaadress; /*!< PMA Address
  116. This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
  117. uint16_t pmaaddr0; /*!< PMA Address0
  118. This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
  119. uint16_t pmaaddr1; /*!< PMA Address1
  120. This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
  121. uint8_t doublebuffer; /*!< Double buffer enable
  122. This parameter can be 0 or 1 */
  123. uint32_t maxpacket; /*!< Endpoint Max packet size
  124. This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
  125. uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
  126. uint32_t xfer_len; /*!< Current transfer length */
  127. uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
  128. }PCD_EPTypeDef;
  129. typedef USB_TypeDef PCD_TypeDef;
  130. /**
  131. * @brief PCD Handle Structure definition
  132. */
  133. typedef struct
  134. {
  135. PCD_TypeDef *Instance; /*!< Register base address */
  136. PCD_InitTypeDef Init; /*!< PCD required parameters */
  137. __IO uint8_t USB_Address; /*!< USB Address */
  138. PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
  139. PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
  140. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  141. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  142. uint32_t Setup[12]; /*!< Setup packet buffer */
  143. void *pData; /*!< Pointer to upper stack Handler */
  144. } PCD_HandleTypeDef;
  145. /**
  146. * @}
  147. */
  148. /* Include PCD HAL Extension module */
  149. #include "stm32l1xx_hal_pcd_ex.h"
  150. /* Exported constants --------------------------------------------------------*/
  151. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  152. * @{
  153. */
  154. /** @defgroup PCD_Exti_Line_Wakeup PCD_Exti_Line_Wakeup
  155. * @{
  156. */
  157. #define USB_WAKEUP_EXTI_LINE (0x00040000U) /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
  158. /**
  159. * @}
  160. */
  161. /** @defgroup PCD_Core_Speed PCD Core Speed
  162. * @{
  163. */
  164. #define PCD_SPEED_HIGH 0 /* Not Supported */
  165. #define PCD_SPEED_FULL 2
  166. /**
  167. * @}
  168. */
  169. /** @defgroup PCD_Core_PHY PCD Core PHY
  170. * @{
  171. */
  172. #define PCD_PHY_EMBEDDED 2
  173. /**
  174. * @}
  175. */
  176. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  177. * @{
  178. */
  179. #define DEP0CTL_MPS_64 0
  180. #define DEP0CTL_MPS_32 1
  181. #define DEP0CTL_MPS_16 2
  182. #define DEP0CTL_MPS_8 3
  183. #define PCD_EP0MPS_64 DEP0CTL_MPS_64
  184. #define PCD_EP0MPS_32 DEP0CTL_MPS_32
  185. #define PCD_EP0MPS_16 DEP0CTL_MPS_16
  186. #define PCD_EP0MPS_08 DEP0CTL_MPS_8
  187. /**
  188. * @}
  189. */
  190. /** @defgroup PCD_EP_Type PCD EP Type
  191. * @{
  192. */
  193. #define PCD_EP_TYPE_CTRL 0
  194. #define PCD_EP_TYPE_ISOC 1
  195. #define PCD_EP_TYPE_BULK 2
  196. #define PCD_EP_TYPE_INTR 3
  197. /**
  198. * @}
  199. */
  200. /** @defgroup PCD_ENDP PCD ENDP
  201. * @{
  202. */
  203. #define PCD_ENDP0 ((uint8_t)0)
  204. #define PCD_ENDP1 ((uint8_t)1)
  205. #define PCD_ENDP2 ((uint8_t)2)
  206. #define PCD_ENDP3 ((uint8_t)3)
  207. #define PCD_ENDP4 ((uint8_t)4)
  208. #define PCD_ENDP5 ((uint8_t)5)
  209. #define PCD_ENDP6 ((uint8_t)6)
  210. #define PCD_ENDP7 ((uint8_t)7)
  211. #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
  212. /**
  213. * @}
  214. */
  215. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  216. * @{
  217. */
  218. #define PCD_SNG_BUF 0
  219. #define PCD_DBL_BUF 1
  220. /**
  221. * @}
  222. */
  223. /**
  224. * @}
  225. */
  226. /* Exported macros -----------------------------------------------------------*/
  227. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  228. * @brief macros to handle interrupts and specific clock configurations
  229. * @{
  230. */
  231. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__))
  232. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
  233. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  234. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  235. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
  236. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
  237. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  238. do{ \
  239. EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  240. EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  241. } while(0)
  242. #define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() \
  243. do{ \
  244. EXTI->FTSR |= (USB_WAKEUP_EXTI_LINE); \
  245. EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  246. } while(0)
  247. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() \
  248. do{ \
  249. EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  250. EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  251. EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  252. EXTI->FTSR |= USB_WAKEUP_EXTI_LINE; \
  253. } while(0)
  254. /**
  255. * @}
  256. */
  257. /* Internal macros -----------------------------------------------------------*/
  258. /** @defgroup PCD_Private_Macros PCD Private Macros
  259. * @brief macros to handle interrupts and specific clock configurations
  260. * @{
  261. */
  262. /* SetENDPOINT */
  263. /* SetENDPOINT */
  264. #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))= (uint16_t)(wRegValue))
  265. /* GetENDPOINT */
  266. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U)))))
  267. /**
  268. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  269. * @param USBx: USB peripheral instance register address.
  270. * @param bEpNum: Endpoint Number.
  271. * @param wType: Endpoint Type.
  272. * @retval None
  273. */
  274. #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  275. ((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & ((uint32_t)(USB_EP_T_MASK))) | ((uint32_t)(wType)) )))
  276. /**
  277. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  278. * @param USBx: USB peripheral instance register address.
  279. * @param bEpNum: Endpoint Number.
  280. * @retval Endpoint Type
  281. */
  282. #define PCD_GET_EPTYPE(USBx, bEpNum) (((uint16_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_T_FIELD)
  283. /**
  284. * @brief free buffer used from the application realizing it to the line
  285. toggles bit SW_BUF in the double buffered endpoint register
  286. * @param USBx: USB peripheral instance register address.
  287. * @param bEpNum: Endpoint Number.
  288. * @param bDir: Direction
  289. * @retval None
  290. */
  291. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
  292. {\
  293. if ((bDir) == PCD_EP_DBUF_OUT)\
  294. { /* OUT double buffered endpoint */\
  295. PCD_TX_DTOG((USBx), (bEpNum));\
  296. }\
  297. else if ((bDir) == PCD_EP_DBUF_IN)\
  298. { /* IN double buffered endpoint */\
  299. PCD_RX_DTOG((USBx), (bEpNum));\
  300. }\
  301. }
  302. /**
  303. * @brief gets direction of the double buffered endpoint
  304. * @param USBx: USB peripheral instance register address.
  305. * @param bEpNum: Endpoint Number.
  306. * @retval EP_DBUF_OUT, EP_DBUF_IN,
  307. * EP_DBUF_ERR if the endpoint counter not yet programmed.
  308. */
  309. #define PCD_GET_DB_DIR(USBx, bEpNum)\
  310. {\
  311. if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\
  312. return(PCD_EP_DBUF_OUT);\
  313. else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\
  314. return(PCD_EP_DBUF_IN);\
  315. else\
  316. return(PCD_EP_DBUF_ERR);\
  317. }
  318. /**
  319. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  320. * @param USBx: USB peripheral instance register address.
  321. * @param bEpNum: Endpoint Number.
  322. * @param wState: new state
  323. * @retval None
  324. */
  325. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
  326. \
  327. _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_DTOGMASK);\
  328. /* toggle first bit ? */ \
  329. if((USB_EPTX_DTOG1 & (wState))!= 0) \
  330. { \
  331. _wRegVal ^=(uint16_t) USB_EPTX_DTOG1; \
  332. } \
  333. /* toggle second bit ? */ \
  334. if((USB_EPTX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
  335. { \
  336. _wRegVal ^=(uint16_t) USB_EPTX_DTOG2; \
  337. } \
  338. PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX));\
  339. } /* PCD_SET_EP_TX_STATUS */
  340. /**
  341. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  342. * @param USBx: USB peripheral instance register address.
  343. * @param bEpNum: Endpoint Number.
  344. * @param wState: new state
  345. * @retval None
  346. */
  347. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
  348. register uint16_t _wRegVal; \
  349. \
  350. _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_DTOGMASK);\
  351. /* toggle first bit ? */ \
  352. if((USB_EPRX_DTOG1 & (wState))!= 0) \
  353. { \
  354. _wRegVal ^= (uint16_t) USB_EPRX_DTOG1; \
  355. } \
  356. /* toggle second bit ? */ \
  357. if((USB_EPRX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
  358. { \
  359. _wRegVal ^= (uint16_t) USB_EPRX_DTOG2; \
  360. } \
  361. PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
  362. } /* PCD_SET_EP_RX_STATUS */
  363. /**
  364. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  365. * @param USBx: USB peripheral instance register address.
  366. * @param bEpNum: Endpoint Number.
  367. * @param wStaterx: new state.
  368. * @param wStatetx: new state.
  369. * @retval None
  370. */
  371. #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
  372. register uint32_t _wRegVal; \
  373. \
  374. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
  375. /* toggle first bit ? */ \
  376. if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0) \
  377. { \
  378. _wRegVal ^= USB_EPRX_DTOG1; \
  379. } \
  380. /* toggle second bit ? */ \
  381. if((USB_EPRX_DTOG2 & (wStaterx))!= 0) \
  382. { \
  383. _wRegVal ^= USB_EPRX_DTOG2; \
  384. } \
  385. /* toggle first bit ? */ \
  386. if((USB_EPTX_DTOG1 & (wStatetx))!= 0) \
  387. { \
  388. _wRegVal ^= USB_EPTX_DTOG1; \
  389. } \
  390. /* toggle second bit ? */ \
  391. if((USB_EPTX_DTOG2 & (wStatetx))!= 0) \
  392. { \
  393. _wRegVal ^= USB_EPTX_DTOG2; \
  394. } \
  395. PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \
  396. } /* PCD_SET_EP_TXRX_STATUS */
  397. /**
  398. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  399. * /STAT_RX[1:0])
  400. * @param USBx: USB peripheral instance register address.
  401. * @param bEpNum: Endpoint Number.
  402. * @retval status
  403. */
  404. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_STAT)
  405. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_STAT)
  406. /**
  407. * @brief sets directly the VALID tx/rx-status into the endpoint register
  408. * @param USBx: USB peripheral instance register address.
  409. * @param bEpNum: Endpoint Number.
  410. * @retval None
  411. */
  412. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  413. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  414. /**
  415. * @brief checks stall condition in an endpoint.
  416. * @param USBx: USB peripheral instance register address.
  417. * @param bEpNum: Endpoint Number.
  418. * @retval TRUE = endpoint in stall condition.
  419. */
  420. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
  421. == USB_EP_TX_STALL)
  422. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
  423. == USB_EP_RX_STALL)
  424. /**
  425. * @brief set & clear EP_KIND bit.
  426. * @param USBx: USB peripheral instance register address.
  427. * @param bEpNum: Endpoint Number.
  428. * @retval None
  429. */
  430. #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  431. (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) | USB_EP_KIND) & USB_EPREG_MASK))))
  432. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  433. (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPKIND_MASK))))
  434. /**
  435. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  436. * @param USBx: USB peripheral instance register address.
  437. * @param bEpNum: Endpoint Number.
  438. * @retval None
  439. */
  440. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  441. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  442. /**
  443. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  444. * @param USBx: USB peripheral instance register address.
  445. * @param bEpNum: Endpoint Number.
  446. * @retval None
  447. */
  448. #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  449. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  450. /**
  451. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  452. * @param USBx: USB peripheral instance register address.
  453. * @param bEpNum: Endpoint Number.
  454. * @retval None
  455. */
  456. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  457. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK))
  458. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  459. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK))
  460. /**
  461. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  462. * @param USBx: USB peripheral instance register address.
  463. * @param bEpNum: Endpoint Number.
  464. * @retval None
  465. */
  466. #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  467. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
  468. #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  469. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
  470. /**
  471. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  472. * @param USBx: USB peripheral instance register address.
  473. * @param bEpNum: Endpoint Number.
  474. * @retval None
  475. */
  476. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_RX) != 0)\
  477. { \
  478. PCD_RX_DTOG((USBx),(bEpNum));\
  479. }
  480. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_TX) != 0)\
  481. {\
  482. PCD_TX_DTOG((USBx),(bEpNum));\
  483. }
  484. /**
  485. * @brief Sets address in an endpoint register.
  486. * @param USBx: USB peripheral instance register address.
  487. * @param bEpNum: Endpoint Number.
  488. * @param bAddr: Address.
  489. * @retval None
  490. */
  491. #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
  492. USB_EP_CTR_RX|USB_EP_CTR_TX|(((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK) | (bAddr))
  493. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  494. #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8)*2+ ((uint32_t)(USBx) + 0x400U)))))
  495. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+2)*2+ ((uint32_t)(USBx) + 0x400U)))))
  496. #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+4)*2+ ((uint32_t)(USBx) + 0x400U)))))
  497. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+6)*2+ ((uint32_t)(USBx) + 0x400U)))))
  498. #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
  499. uint16_t *pdwReg =PCD_EP_RX_CNT((USBx),(bEpNum)); \
  500. PCD_SET_EP_CNT_RX_REG((pdwReg), (wCount))\
  501. }
  502. /**
  503. * @brief sets address of the tx/rx buffer.
  504. * @param USBx: USB peripheral instance register address.
  505. * @param bEpNum: Endpoint Number.
  506. * @param wAddr: address to be set (must be word aligned).
  507. * @retval None
  508. */
  509. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
  510. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
  511. /**
  512. * @brief Gets address of the tx/rx buffer.
  513. * @param USBx: USB peripheral instance register address.
  514. * @param bEpNum: Endpoint Number.
  515. * @retval address of the buffer.
  516. */
  517. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  518. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  519. /**
  520. * @brief Sets counter of rx buffer with no. of blocks.
  521. * @param dwReg: Register
  522. * @param wCount: Counter.
  523. * @param wNBlocks: no. of Blocks.
  524. * @retval None
  525. */
  526. #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
  527. (wNBlocks) = (wCount) >> 5;\
  528. if(((wCount) & 0x1f) == 0)\
  529. { \
  530. (wNBlocks)--;\
  531. } \
  532. *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) | (uint16_t)0x8000U); \
  533. }/* PCD_CALC_BLK32 */
  534. #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
  535. (wNBlocks) = (wCount) >> 1;\
  536. if(((wCount) & 0x1) != 0)\
  537. { \
  538. (wNBlocks)++;\
  539. } \
  540. *pdwReg = (uint16_t)((wNBlocks) << 10);\
  541. }/* PCD_CALC_BLK2 */
  542. #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
  543. uint16_t wNBlocks;\
  544. if((wCount) > 62) \
  545. { \
  546. PCD_CALC_BLK32((dwReg),(wCount),wNBlocks) \
  547. } \
  548. else \
  549. { \
  550. PCD_CALC_BLK2((dwReg),(wCount),wNBlocks) \
  551. } \
  552. }/* PCD_SET_EP_CNT_RX_REG */
  553. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
  554. uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
  555. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount))\
  556. }
  557. /**
  558. * @brief sets counter for the tx/rx buffer.
  559. * @param USBx: USB peripheral instance register address.
  560. * @param bEpNum: Endpoint Number.
  561. * @param wCount: Counter value.
  562. * @retval None
  563. */
  564. #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
  565. /**
  566. * @brief gets counter of the tx buffer.
  567. * @param USBx: USB peripheral instance register address.
  568. * @param bEpNum: Endpoint Number.
  569. * @retval Counter value
  570. */
  571. #define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ff)
  572. #define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ff)
  573. /**
  574. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  575. * @param USBx: USB peripheral instance register address.
  576. * @param bEpNum: Endpoint Number.
  577. * @param wBuf0Addr: buffer 0 address.
  578. * @retval Counter value
  579. */
  580. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) (PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)))
  581. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) (PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)))
  582. /**
  583. * @brief Sets addresses in a double buffer endpoint.
  584. * @param USBx: USB peripheral instance register address.
  585. * @param bEpNum: Endpoint Number.
  586. * @param wBuf0Addr: buffer 0 address.
  587. * @param wBuf1Addr = buffer 1 address.
  588. * @retval None
  589. */
  590. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
  591. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
  592. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
  593. } /* PCD_SET_EP_DBUF_ADDR */
  594. /**
  595. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  596. * @param USBx: USB peripheral instance register address.
  597. * @param bEpNum: Endpoint Number.
  598. * @retval None
  599. */
  600. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  601. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  602. /**
  603. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  604. * @param USBx: USB peripheral instance register address.
  605. * @param bEpNum: Endpoint Number.
  606. * @param bDir: endpoint dir EP_DBUF_OUT = OUT
  607. * EP_DBUF_IN = IN
  608. * @param wCount: Counter value
  609. * @retval None
  610. */
  611. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
  612. if((bDir) == PCD_EP_DBUF_OUT)\
  613. /* OUT endpoint */ \
  614. {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount))} \
  615. else if((bDir) == PCD_EP_DBUF_IN)\
  616. /* IN endpoint */ \
  617. *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  618. } /* SetEPDblBuf0Count*/
  619. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
  620. if((bDir) == PCD_EP_DBUF_OUT)\
  621. {/* OUT endpoint */ \
  622. PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)) \
  623. } \
  624. else if((bDir) == PCD_EP_DBUF_IN)\
  625. {/* IN endpoint */ \
  626. *PCD_EP_RX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  627. } \
  628. } /* SetEPDblBuf1Count */
  629. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
  630. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)) \
  631. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)) \
  632. } /* PCD_SET_EP_DBUF_CNT */
  633. /**
  634. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  635. * @param USBx: USB peripheral instance register address.
  636. * @param bEpNum: Endpoint Number.
  637. * @retval None
  638. */
  639. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  640. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  641. /**
  642. * @}
  643. */
  644. /* Exported functions --------------------------------------------------------*/
  645. /** @addtogroup PCD_Exported_Functions
  646. * @{
  647. */
  648. /* Initialization/de-initialization functions **********************************/
  649. /** @addtogroup PCD_Exported_Functions_Group1
  650. * @{
  651. */
  652. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  653. HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
  654. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  655. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  656. /**
  657. * @}
  658. */
  659. /* I/O operation functions *****************************************************/
  660. /* Non-Blocking mode: Interrupt */
  661. /** @addtogroup PCD_Exported_Functions_Group2
  662. * @{
  663. */
  664. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  665. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  666. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  667. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  668. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  669. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  670. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  671. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  672. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  673. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  674. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  675. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  676. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  677. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  678. /**
  679. * @}
  680. */
  681. /* Peripheral Control functions ************************************************/
  682. /** @addtogroup PCD_Exported_Functions_Group3
  683. * @{
  684. */
  685. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  686. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  687. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  688. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  689. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  690. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  691. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  692. uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  693. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  694. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  695. HAL_StatusTypeDef HAL_PCD_EP_SetNak(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  696. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  697. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  698. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  699. /**
  700. * @}
  701. */
  702. /* Peripheral State functions **************************************************/
  703. /** @addtogroup PCD_Exported_Functions_Group4
  704. * @{
  705. */
  706. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  707. void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state);
  708. /**
  709. * @}
  710. */
  711. /**
  712. * @}
  713. */
  714. /**
  715. * @}
  716. */
  717. /**
  718. * @}
  719. */
  720. #ifdef __cplusplus
  721. }
  722. #endif
  723. #endif /* __STM32L1xx_HAL_PCD_H */
  724. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/