stm32l1xx_hal_pwr.h 17 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l1xx_hal_pwr.h
  4. * @author MCD Application Team
  5. * @brief Header file of PWR HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32L1xx_HAL_PWR_H
  37. #define __STM32L1xx_HAL_PWR_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. /* Includes ------------------------------------------------------------------*/
  42. #include "stm32l1xx_hal_def.h"
  43. /** @addtogroup STM32L1xx_HAL_Driver
  44. * @{
  45. */
  46. /** @addtogroup PWR
  47. * @{
  48. */
  49. /* Exported types ------------------------------------------------------------*/
  50. /** @defgroup PWR_Exported_Types PWR Exported Types
  51. * @{
  52. */
  53. /**
  54. * @brief PWR PVD configuration structure definition
  55. */
  56. typedef struct
  57. {
  58. uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
  59. This parameter can be a value of @ref PWR_PVD_detection_level */
  60. uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
  61. This parameter can be a value of @ref PWR_PVD_Mode */
  62. }PWR_PVDTypeDef;
  63. /**
  64. * @}
  65. */
  66. /* Internal constants --------------------------------------------------------*/
  67. /** @addtogroup PWR_Private_Constants
  68. * @{
  69. */
  70. #define PWR_EXTI_LINE_PVD (0x00010000U) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
  71. /**
  72. * @}
  73. */
  74. /* Exported constants --------------------------------------------------------*/
  75. /** @defgroup PWR_Exported_Constants PWR Exported Constants
  76. * @{
  77. */
  78. /** @defgroup PWR_register_alias_address PWR Register alias address
  79. * @{
  80. */
  81. /* ------------- PWR registers bit address in the alias region ---------------*/
  82. #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
  83. #define PWR_CR_OFFSET 0x00
  84. #define PWR_CSR_OFFSET 0x04
  85. #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
  86. #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
  87. /**
  88. * @}
  89. */
  90. /** @defgroup PWR_CR_register_alias PWR CR Register alias address
  91. * @{
  92. */
  93. /* --- CR Register ---*/
  94. /* Alias word address of LPSDSR bit */
  95. #define LPSDSR_BIT_NUMBER POSITION_VAL(PWR_CR_LPSDSR)
  96. #define CR_LPSDSR_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPSDSR_BIT_NUMBER * 4)))
  97. /* Alias word address of DBP bit */
  98. #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP)
  99. #define CR_DBP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (DBP_BIT_NUMBER * 4)))
  100. /* Alias word address of LPRUN bit */
  101. #define LPRUN_BIT_NUMBER POSITION_VAL(PWR_CR_LPRUN)
  102. #define CR_LPRUN_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPRUN_BIT_NUMBER * 4)))
  103. /* Alias word address of PVDE bit */
  104. #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE)
  105. #define CR_PVDE_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (PVDE_BIT_NUMBER * 4)))
  106. /* Alias word address of FWU bit */
  107. #define FWU_BIT_NUMBER POSITION_VAL(PWR_CR_FWU)
  108. #define CR_FWU_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (FWU_BIT_NUMBER * 4)))
  109. /* Alias word address of ULP bit */
  110. #define ULP_BIT_NUMBER POSITION_VAL(PWR_CR_ULP)
  111. #define CR_ULP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ULP_BIT_NUMBER * 4)))
  112. /**
  113. * @}
  114. */
  115. /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
  116. * @{
  117. */
  118. /* --- CSR Register ---*/
  119. /* Alias word address of EWUP1, EWUP2 and EWUP3 bits */
  120. #define CSR_EWUP_BB(VAL) ((uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (POSITION_VAL(VAL) * 4)))
  121. /**
  122. * @}
  123. */
  124. /** @defgroup PWR_PVD_detection_level PWR PVD detection level
  125. * @{
  126. */
  127. #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
  128. #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
  129. #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
  130. #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
  131. #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
  132. #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
  133. #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
  134. #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 /* External input analog voltage
  135. (Compare internally to VREFINT) */
  136. /**
  137. * @}
  138. */
  139. /** @defgroup PWR_PVD_Mode PWR PVD Mode
  140. * @{
  141. */
  142. #define PWR_PVD_MODE_NORMAL (0x00000000U) /*!< basic mode is used */
  143. #define PWR_PVD_MODE_IT_RISING (0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */
  144. #define PWR_PVD_MODE_IT_FALLING (0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */
  145. #define PWR_PVD_MODE_IT_RISING_FALLING (0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
  146. #define PWR_PVD_MODE_EVENT_RISING (0x00020001U) /*!< Event Mode with Rising edge trigger detection */
  147. #define PWR_PVD_MODE_EVENT_FALLING (0x00020002U) /*!< Event Mode with Falling edge trigger detection */
  148. #define PWR_PVD_MODE_EVENT_RISING_FALLING (0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */
  149. /**
  150. * @}
  151. */
  152. /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode
  153. * @{
  154. */
  155. #define PWR_MAINREGULATOR_ON (0x00000000U)
  156. #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPSDSR
  157. /**
  158. * @}
  159. */
  160. /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
  161. * @{
  162. */
  163. #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
  164. #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
  165. /**
  166. * @}
  167. */
  168. /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
  169. * @{
  170. */
  171. #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
  172. #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
  173. /**
  174. * @}
  175. */
  176. /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale
  177. * @{
  178. */
  179. #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS_0
  180. #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1
  181. #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS
  182. /**
  183. * @}
  184. */
  185. /** @defgroup PWR_Flag PWR Flag
  186. * @{
  187. */
  188. #define PWR_FLAG_WU PWR_CSR_WUF
  189. #define PWR_FLAG_SB PWR_CSR_SBF
  190. #define PWR_FLAG_PVDO PWR_CSR_PVDO
  191. #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
  192. #define PWR_FLAG_VOS PWR_CSR_VOSF
  193. #define PWR_FLAG_REGLP PWR_CSR_REGLPF
  194. /**
  195. * @}
  196. */
  197. /**
  198. * @}
  199. */
  200. /* Exported macro ------------------------------------------------------------*/
  201. /** @defgroup PWR_Exported_Macros PWR Exported Macros
  202. * @{
  203. */
  204. /** @brief macros configure the main internal regulator output voltage.
  205. * @param __REGULATOR__: specifies the regulator output voltage to achieve
  206. * a tradeoff between performance and power consumption when the device does
  207. * not operate at the maximum frequency (refer to the datasheets for more details).
  208. * This parameter can be one of the following values:
  209. * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode,
  210. * System frequency up to 32 MHz.
  211. * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode,
  212. * System frequency up to 16 MHz.
  213. * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode,
  214. * System frequency up to 4.2 MHz
  215. * @retval None
  216. */
  217. #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
  218. /** @brief Check PWR flag is set or not.
  219. * @param __FLAG__: specifies the flag to check.
  220. * This parameter can be one of the following values:
  221. * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
  222. * was received from the WKUP pin or from the RTC alarm (Alarm B),
  223. * RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
  224. * An additional wakeup event is detected if the WKUP pin is enabled
  225. * (by setting the EWUP bit) when the WKUP pin level is already high.
  226. * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
  227. * resumed from StandBy mode.
  228. * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
  229. * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
  230. * For this reason, this bit is equal to 0 after Standby or reset
  231. * until the PVDE bit is set.
  232. * @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag.
  233. * This bit indicates the state of the internal voltage reference, VREFINT.
  234. * @arg PWR_FLAG_VOS: Voltage Scaling select flag. A delay is required for
  235. * the internal regulator to be ready after the voltage range is changed.
  236. * The VOSF bit indicates that the regulator has reached the voltage level
  237. * defined with bits VOS of PWR_CR register.
  238. * @arg PWR_FLAG_REGLP: Regulator LP flag. When the MCU exits from Low power run
  239. * mode, this bit stays at 1 until the regulator is ready in main mode.
  240. * A polling on this bit is recommended to wait for the regulator main mode.
  241. * This bit is reset by hardware when the regulator is ready.
  242. * @retval The new state of __FLAG__ (TRUE or FALSE).
  243. */
  244. #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
  245. /** @brief Clear the PWR's pending flags.
  246. * @param __FLAG__: specifies the flag to clear.
  247. * This parameter can be one of the following values:
  248. * @arg PWR_FLAG_WU: Wake Up flag
  249. * @arg PWR_FLAG_SB: StandBy flag
  250. */
  251. #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2))
  252. /**
  253. * @brief Enable interrupt on PVD Exti Line 16.
  254. * @retval None.
  255. */
  256. #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
  257. /**
  258. * @brief Disable interrupt on PVD Exti Line 16.
  259. * @retval None.
  260. */
  261. #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
  262. /**
  263. * @brief Enable event on PVD Exti Line 16.
  264. * @retval None.
  265. */
  266. #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
  267. /**
  268. * @brief Disable event on PVD Exti Line 16.
  269. * @retval None.
  270. */
  271. #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
  272. /**
  273. * @brief PVD EXTI line configuration: set falling edge trigger.
  274. * @retval None.
  275. */
  276. #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
  277. /**
  278. * @brief Disable the PVD Extended Interrupt Falling Trigger.
  279. * @retval None.
  280. */
  281. #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
  282. /**
  283. * @brief PVD EXTI line configuration: set rising edge trigger.
  284. * @retval None.
  285. */
  286. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
  287. /**
  288. * @brief Disable the PVD Extended Interrupt Rising Trigger.
  289. * @retval None.
  290. */
  291. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
  292. /**
  293. * @brief PVD EXTI line configuration: set rising & falling edge trigger.
  294. * @retval None.
  295. */
  296. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \
  297. do { \
  298. __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \
  299. __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \
  300. } while(0)
  301. /**
  302. * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
  303. * @retval None.
  304. */
  305. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \
  306. do { \
  307. __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \
  308. __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \
  309. } while(0)
  310. /**
  311. * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
  312. * @retval EXTI PVD Line Status.
  313. */
  314. #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
  315. /**
  316. * @brief Clear the PVD EXTI flag.
  317. * @retval None.
  318. */
  319. #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
  320. /**
  321. * @brief Generate a Software interrupt on selected EXTI line.
  322. * @retval None.
  323. */
  324. #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
  325. /**
  326. * @}
  327. */
  328. /* Private macro -------------------------------------------------------------*/
  329. /** @defgroup PWR_Private_Macros PWR Private Macros
  330. * @{
  331. */
  332. #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
  333. ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
  334. ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
  335. ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
  336. #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
  337. ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
  338. ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
  339. ((MODE) == PWR_PVD_MODE_NORMAL))
  340. #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
  341. ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
  342. #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
  343. #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) )
  344. #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
  345. ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
  346. ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
  347. /**
  348. * @}
  349. */
  350. /* Include PWR HAL Extension module */
  351. #include "stm32l1xx_hal_pwr_ex.h"
  352. /* Exported functions --------------------------------------------------------*/
  353. /** @addtogroup PWR_Exported_Functions PWR Exported Functions
  354. * @{
  355. */
  356. /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
  357. * @{
  358. */
  359. /* Initialization and de-initialization functions *******************************/
  360. void HAL_PWR_DeInit(void);
  361. void HAL_PWR_EnableBkUpAccess(void);
  362. void HAL_PWR_DisableBkUpAccess(void);
  363. /**
  364. * @}
  365. */
  366. /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
  367. * @{
  368. */
  369. /* Peripheral Control functions ************************************************/
  370. void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
  371. void HAL_PWR_EnablePVD(void);
  372. void HAL_PWR_DisablePVD(void);
  373. /* WakeUp pins configuration functions ****************************************/
  374. void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
  375. void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
  376. /* Low Power modes configuration functions ************************************/
  377. void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
  378. void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
  379. void HAL_PWR_EnterSTANDBYMode(void);
  380. void HAL_PWR_EnableSleepOnExit(void);
  381. void HAL_PWR_DisableSleepOnExit(void);
  382. void HAL_PWR_EnableSEVOnPend(void);
  383. void HAL_PWR_DisableSEVOnPend(void);
  384. void HAL_PWR_PVD_IRQHandler(void);
  385. void HAL_PWR_PVDCallback(void);
  386. /**
  387. * @}
  388. */
  389. /**
  390. * @}
  391. */
  392. /**
  393. * @}
  394. */
  395. /**
  396. * @}
  397. */
  398. #ifdef __cplusplus
  399. }
  400. #endif
  401. #endif /* __STM32L1xx_HAL_PWR_H */
  402. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/