stm32l1xx_hal_iwdg.c 9.6 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l1xx_hal_iwdg.c
  4. * @author MCD Application Team
  5. * @brief IWDG HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Independent Watchdog (IWDG) peripheral:
  8. * + Initialization and Start functions
  9. * + IO operation functions
  10. *
  11. @verbatim
  12. ==============================================================================
  13. ##### IWDG Generic features #####
  14. ==============================================================================
  15. [..]
  16. (+) The IWDG can be started by either software or hardware (configurable
  17. through option byte).
  18. (+) The IWDG is clocked by Low-Speed clock (LSI) and thus stays active even
  19. if the main clock fails.
  20. (+) Once the IWDG is started, the LSI is forced ON and both can not be
  21. disabled. The counter starts counting down from the reset value (0xFFF).
  22. When it reaches the end of count value (0x000) a reset signal is
  23. generated (IWDG reset).
  24. (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
  25. the IWDG_RLR value is reloaded in the counter and the watchdog reset is
  26. prevented.
  27. (+) The IWDG is implemented in the VDD voltage domain that is still functional
  28. in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
  29. IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
  30. reset occurs.
  31. (+) Debug mode : When the microcontroller enters debug mode (core halted),
  32. the IWDG counter either continues to work normally or stops, depending
  33. on DBG_IWDG_STOP configuration bit in DBG module, accessible through
  34. __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros
  35. (+) Min-max timeout value @37KHz (LSI): ~108us / ~28.3s
  36. The IWDG timeout may vary due to LSI frequency dispersion. STM32L1xx
  37. devices provide the capability to measure the LSI frequency (LSI clock
  38. connected internally to TIM10 CH1 input capture). The measured value
  39. can be used to have an IWDG timeout with an acceptable accuracy.
  40. For more information, please refer to the STM32L1xx Reference manual.
  41. ##### How to use this driver #####
  42. ==============================================================================
  43. [..]
  44. (#) Use IWDG using HAL_IWDG_Init() function to :
  45. (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
  46. clock is forced ON and IWDG counter starts downcounting.
  47. (++) Enable write access to configuration register: IWDG_PR, IWDG_RLR.
  48. (++) Configure the IWDG prescaler and counter reload value. This reload
  49. value will be loaded in the IWDG counter each time the watchdog is
  50. reloaded, then the IWDG will start counting down from this value.
  51. (++) wait for status flags to be reset"
  52. (#) Then the application program must refresh the IWDG counter at regular
  53. intervals during normal operation to prevent an MCU reset, using
  54. HAL_IWDG_Refresh() function.
  55. *** IWDG HAL driver macros list ***
  56. ====================================
  57. [..]
  58. Below the list of most used macros in IWDG HAL driver:
  59. (+) __HAL_IWDG_START: Enable the IWDG peripheral
  60. (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
  61. the reload register
  62. @endverbatim
  63. ******************************************************************************
  64. * @attention
  65. *
  66. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  67. *
  68. * Redistribution and use in source and binary forms, with or without modification,
  69. * are permitted provided that the following conditions are met:
  70. * 1. Redistributions of source code must retain the above copyright notice,
  71. * this list of conditions and the following disclaimer.
  72. * 2. Redistributions in binary form must reproduce the above copyright notice,
  73. * this list of conditions and the following disclaimer in the documentation
  74. * and/or other materials provided with the distribution.
  75. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  76. * may be used to endorse or promote products derived from this software
  77. * without specific prior written permission.
  78. *
  79. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  80. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  81. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  82. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  83. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  84. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  85. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  86. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  87. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  88. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  89. *
  90. ******************************************************************************
  91. */
  92. /* Includes ------------------------------------------------------------------*/
  93. #include "stm32l1xx_hal.h"
  94. /** @addtogroup STM32L1xx_HAL_Driver
  95. * @{
  96. */
  97. #ifdef HAL_IWDG_MODULE_ENABLED
  98. /** @addtogroup IWDG
  99. * @brief IWDG HAL module driver.
  100. * @{
  101. */
  102. /* Private typedef -----------------------------------------------------------*/
  103. /* Private define ------------------------------------------------------------*/
  104. /** @defgroup IWDG_Private_Defines IWDG Private Defines
  105. * @{
  106. */
  107. /* Status register need 5 RC LSI divided by prescaler clock to be updated. With
  108. higher prescaler (256), and according to HSI variation, we need to wait at
  109. least 6 cycles so 48 ms. */
  110. #define HAL_IWDG_DEFAULT_TIMEOUT 48u
  111. /**
  112. * @}
  113. */
  114. /* Private macro -------------------------------------------------------------*/
  115. /* Private variables ---------------------------------------------------------*/
  116. /* Private function prototypes -----------------------------------------------*/
  117. /* Exported functions --------------------------------------------------------*/
  118. /** @addtogroup IWDG_Exported_Functions
  119. * @{
  120. */
  121. /** @addtogroup IWDG_Exported_Functions_Group1
  122. * @brief Initialization and Start functions.
  123. *
  124. @verbatim
  125. ===============================================================================
  126. ##### Initialization and Start functions #####
  127. ===============================================================================
  128. [..] This section provides functions allowing to:
  129. (+) Initialize the IWDG according to the specified parameters in the
  130. IWDG_InitTypeDef of associated handle.
  131. (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
  132. is reloaded in order to exit function with correct time base.
  133. @endverbatim
  134. * @{
  135. */
  136. /**
  137. * @brief Initialize the IWDG according to the specified parameters in the
  138. * IWDG_InitTypeDef and start watchdog. Before exiting function,
  139. * watchdog is refreshed in order to have correct time base.
  140. * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
  141. * the configuration information for the specified IWDG module.
  142. * @retval HAL status
  143. */
  144. HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
  145. {
  146. uint32_t tickstart;
  147. /* Check the IWDG handle allocation */
  148. if(hiwdg == NULL)
  149. {
  150. return HAL_ERROR;
  151. }
  152. /* Check the parameters */
  153. assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
  154. assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
  155. assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
  156. /* Enable IWDG. LSI is turned on automaticaly */
  157. __HAL_IWDG_START(hiwdg);
  158. /* Enable write access to IWDG_PR, IWDG_RLR registers by writing
  159. 0x5555 in KR */
  160. IWDG_ENABLE_WRITE_ACCESS(hiwdg);
  161. /* Write to IWDG registers the Prescaler & Reload values to work with */
  162. hiwdg->Instance->PR = hiwdg->Init.Prescaler;
  163. hiwdg->Instance->RLR = hiwdg->Init.Reload;
  164. /* Check pending flag, if previous update not done, return timeout */
  165. tickstart = HAL_GetTick();
  166. /* Wait for register to be updated */
  167. while(hiwdg->Instance->SR != RESET)
  168. {
  169. if((HAL_GetTick() - tickstart ) > HAL_IWDG_DEFAULT_TIMEOUT)
  170. {
  171. return HAL_TIMEOUT;
  172. }
  173. }
  174. /* Reload IWDG counter with value defined in the reload register */
  175. __HAL_IWDG_RELOAD_COUNTER(hiwdg);
  176. /* Return function status */
  177. return HAL_OK;
  178. }
  179. /**
  180. * @}
  181. */
  182. /** @addtogroup IWDG_Exported_Functions_Group2
  183. * @brief IO operation functions
  184. *
  185. @verbatim
  186. ===============================================================================
  187. ##### IO operation functions #####
  188. ===============================================================================
  189. [..] This section provides functions allowing to:
  190. (+) Refresh the IWDG.
  191. @endverbatim
  192. * @{
  193. */
  194. /**
  195. * @brief Refresh the IWDG.
  196. * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
  197. * the configuration information for the specified IWDG module.
  198. * @retval HAL status
  199. */
  200. HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
  201. {
  202. /* Reload IWDG counter with value defined in the reload register */
  203. __HAL_IWDG_RELOAD_COUNTER(hiwdg);
  204. /* Return function status */
  205. return HAL_OK;
  206. }
  207. /**
  208. * @}
  209. */
  210. /**
  211. * @}
  212. */
  213. #endif /* HAL_IWDG_MODULE_ENABLED */
  214. /**
  215. * @}
  216. */
  217. /**
  218. * @}
  219. */
  220. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/