stm32l1xx_hal_spi.c 67 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267
  1. /**
  2. ******************************************************************************
  3. * @file stm32l1xx_hal_spi.c
  4. * @author MCD Application Team
  5. * @brief SPI HAL module driver.
  6. *
  7. * This file provides firmware functions to manage the following
  8. * functionalities of the Serial Peripheral Interface (SPI) peripheral:
  9. * + Initialization and de-initialization functions
  10. * + IO operation functions
  11. * + Peripheral Control functions
  12. * + Peripheral State functions
  13. @verbatim
  14. ==============================================================================
  15. ##### How to use this driver #####
  16. ==============================================================================
  17. [..]
  18. The SPI HAL driver can be used as follows:
  19. (#) Declare a SPI_HandleTypeDef handle structure, for example:
  20. SPI_HandleTypeDef hspi;
  21. (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit ()API:
  22. (##) Enable the SPIx interface clock
  23. (##) SPI pins configuration
  24. (+++) Enable the clock for the SPI GPIOs
  25. (+++) Configure these SPI pins as alternate function push-pull
  26. (##) NVIC configuration if you need to use interrupt process
  27. (+++) Configure the SPIx interrupt priority
  28. (+++) Enable the NVIC SPI IRQ handle
  29. (##) DMA Configuration if you need to use DMA process
  30. (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Channel
  31. (+++) Enable the DMAx clock
  32. (+++) Configure the DMA handle parameters
  33. (+++) Configure the DMA Tx or Rx Channel
  34. (+++) Associate the initilalized hdma_tx(or _rx) handle to the hspi DMA Tx (or Rx) handle
  35. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Channel
  36. (#) Program the Mode, Direction , Data size, Baudrate Prescaler, NSS
  37. management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
  38. (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
  39. (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
  40. by calling the customed HAL_SPI_MspInit() API.
  41. [..]
  42. Circular mode restriction:
  43. (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
  44. (##) Master 2Lines RxOnly
  45. (##) Master 1Line Rx
  46. (#) The CRC feature is not managed when the DMA circular mode is enabled
  47. (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
  48. the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
  49. @endverbatim
  50. ******************************************************************************
  51. * @attention
  52. *
  53. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  54. *
  55. * Redistribution and use in source and binary forms, with or without modification,
  56. * are permitted provided that the following conditions are met:
  57. * 1. Redistributions of source code must retain the above copyright notice,
  58. * this list of conditions and the following disclaimer.
  59. * 2. Redistributions in binary form must reproduce the above copyright notice,
  60. * this list of conditions and the following disclaimer in the documentation
  61. * and/or other materials provided with the distribution.
  62. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  63. * may be used to endorse or promote products derived from this software
  64. * without specific prior written permission.
  65. *
  66. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  67. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  68. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  69. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  70. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  71. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  72. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  73. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  74. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  75. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  76. *
  77. ******************************************************************************
  78. */
  79. /* Includes ------------------------------------------------------------------*/
  80. #include "stm32l1xx_hal.h"
  81. /** @addtogroup STM32L1xx_HAL_Driver
  82. * @{
  83. */
  84. /** @defgroup SPI SPI
  85. * @brief SPI HAL module driver
  86. * @{
  87. */
  88. #ifdef HAL_SPI_MODULE_ENABLED
  89. /* Private typedef -----------------------------------------------------------*/
  90. /* Private define ------------------------------------------------------------*/
  91. /** @defgroup SPI_Private_Constants SPI Private Constants
  92. * @{
  93. */
  94. #define SPI_TIMEOUT_VALUE 10
  95. /**
  96. * @}
  97. */
  98. /* Private macro -------------------------------------------------------------*/
  99. /* Private variables ---------------------------------------------------------*/
  100. /* Private function prototypes -----------------------------------------------*/
  101. /** @defgroup SPI_Private_Functions SPI Private Functions
  102. * @{
  103. */
  104. static void SPI_TxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi);
  105. static void SPI_TxISR(struct __SPI_HandleTypeDef *hspi);
  106. static void SPI_RxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi);
  107. static void SPI_2LinesRxISR(struct __SPI_HandleTypeDef *hspi);
  108. static void SPI_RxISR(struct __SPI_HandleTypeDef *hspi);
  109. static void SPI_DMATransmitCplt(struct __DMA_HandleTypeDef *hdma);
  110. static void SPI_DMAReceiveCplt(struct __DMA_HandleTypeDef *hdma);
  111. static void SPI_DMATransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma);
  112. static void SPI_DMAHalfTransmitCplt(struct __DMA_HandleTypeDef *hdma);
  113. static void SPI_DMAHalfReceiveCplt(struct __DMA_HandleTypeDef *hdma);
  114. static void SPI_DMAHalfTransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma);
  115. static void SPI_DMAError(struct __DMA_HandleTypeDef *hdma);
  116. static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(struct __SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
  117. /**
  118. * @}
  119. */
  120. /* Exported functions ---------------------------------------------------------*/
  121. /** @defgroup SPI_Exported_Functions SPI Exported Functions
  122. * @{
  123. */
  124. /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
  125. * @brief Initialization and Configuration functions
  126. *
  127. @verbatim
  128. ===============================================================================
  129. ##### Initialization and de-initialization functions #####
  130. ===============================================================================
  131. [..] This subsection provides a set of functions allowing to initialize and
  132. de-initialiaze the SPIx peripheral:
  133. (+) User must implement HAL_SPI_MspInit() function in which he configures
  134. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
  135. (+) Call the function HAL_SPI_Init() to configure the selected device with
  136. the selected configuration:
  137. (++) Mode
  138. (++) Direction
  139. (++) Data Size
  140. (++) Clock Polarity and Phase
  141. (++) NSS Management
  142. (++) BaudRate Prescaler
  143. (++) FirstBit
  144. (++) TIMode
  145. (++) CRC Calculation
  146. (++) CRC Polynomial if CRC enabled
  147. (+) Call the function HAL_SPI_DeInit() to restore the default configuration
  148. of the selected SPIx periperal.
  149. @endverbatim
  150. * @{
  151. */
  152. /**
  153. * @brief Initializes the SPI according to the specified parameters
  154. * in the SPI_InitTypeDef and create the associated handle.
  155. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  156. * the configuration information for SPI module.
  157. * @retval HAL status
  158. */
  159. __weak HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
  160. {
  161. /* Prevent unused argument(s) compilation warning */
  162. UNUSED(hspi);
  163. return HAL_ERROR;
  164. }
  165. /**
  166. * @brief DeInitializes the SPI peripheral
  167. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  168. * the configuration information for SPI module.
  169. * @retval HAL status
  170. */
  171. HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
  172. {
  173. /* Check the SPI handle allocation */
  174. if(hspi == NULL)
  175. {
  176. return HAL_ERROR;
  177. }
  178. /* Disable the SPI Peripheral Clock */
  179. __HAL_SPI_DISABLE(hspi);
  180. /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  181. HAL_SPI_MspDeInit(hspi);
  182. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  183. hspi->State = HAL_SPI_STATE_RESET;
  184. /* Release Lock */
  185. __HAL_UNLOCK(hspi);
  186. return HAL_OK;
  187. }
  188. /**
  189. * @brief SPI MSP Init
  190. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  191. * the configuration information for SPI module.
  192. * @retval None
  193. */
  194. __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
  195. {
  196. /* Prevent unused argument(s) compilation warning */
  197. UNUSED(hspi);
  198. /* NOTE : This function Should not be modified, when the callback is needed,
  199. the HAL_SPI_MspInit could be implenetd in the user file
  200. */
  201. }
  202. /**
  203. * @brief SPI MSP DeInit
  204. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  205. * the configuration information for SPI module.
  206. * @retval None
  207. */
  208. __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
  209. {
  210. /* Prevent unused argument(s) compilation warning */
  211. UNUSED(hspi);
  212. /* NOTE : This function Should not be modified, when the callback is needed,
  213. the HAL_SPI_MspDeInit could be implenetd in the user file
  214. */
  215. }
  216. /**
  217. * @}
  218. */
  219. /** @defgroup SPI_Exported_Functions_Group2 IO operation functions
  220. * @brief Data transfers functions
  221. *
  222. @verbatim
  223. ==============================================================================
  224. ##### IO operation functions #####
  225. ===============================================================================
  226. This subsection provides a set of functions allowing to manage the SPI
  227. data transfers.
  228. [..] The SPI supports master and slave mode :
  229. (#) There are two modes of transfer:
  230. (++) Blocking mode: The communication is performed in polling mode.
  231. The HAL status of all data processing is returned by the same function
  232. after finishing transfer.
  233. (++) No-Blocking mode: The communication is performed using Interrupts
  234. or DMA, These APIs return the HAL status.
  235. The end of the data processing will be indicated through the
  236. dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
  237. using DMA mode.
  238. The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
  239. will be executed respectivelly at the end of the transmit or Receive process
  240. The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
  241. (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
  242. exist for 1Line (simplex) and 2Lines (full duplex) modes.
  243. @endverbatim
  244. * @{
  245. */
  246. /**
  247. * @brief Transmit an amount of data in blocking mode
  248. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  249. * the configuration information for SPI module.
  250. * @param pData: pointer to data buffer
  251. * @param Size: amount of data to be sent
  252. * @param Timeout: Timeout duration
  253. * @retval HAL status
  254. */
  255. HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  256. {
  257. if(hspi->State == HAL_SPI_STATE_READY)
  258. {
  259. if((pData == NULL ) || (Size == 0))
  260. {
  261. return HAL_ERROR;
  262. }
  263. /* Check the parameters */
  264. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  265. /* Process Locked */
  266. __HAL_LOCK(hspi);
  267. /* Configure communication */
  268. hspi->State = HAL_SPI_STATE_BUSY_TX;
  269. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  270. hspi->pTxBuffPtr = pData;
  271. hspi->TxXferSize = Size;
  272. hspi->TxXferCount = Size;
  273. /*Init field not used in handle to zero */
  274. hspi->TxISR = 0;
  275. hspi->RxISR = 0;
  276. hspi->pRxBuffPtr = NULL;
  277. hspi->RxXferSize = 0;
  278. hspi->RxXferCount = 0;
  279. /* Reset CRC Calculation */
  280. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  281. {
  282. SPI_RESET_CRC(hspi);
  283. }
  284. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  285. {
  286. /* Configure communication direction : 1Line */
  287. SPI_1LINE_TX(hspi);
  288. }
  289. /* Check if the SPI is already enabled */
  290. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  291. {
  292. /* Enable SPI peripheral */
  293. __HAL_SPI_ENABLE(hspi);
  294. }
  295. /* Transmit data in 8 Bit mode */
  296. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  297. {
  298. if((hspi->Init.Mode == SPI_MODE_SLAVE)|| (hspi->TxXferCount == 0x01))
  299. {
  300. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  301. hspi->TxXferCount--;
  302. }
  303. while(hspi->TxXferCount > 0)
  304. {
  305. /* Wait until TXE flag is set to send data */
  306. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  307. {
  308. return HAL_TIMEOUT;
  309. }
  310. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  311. hspi->TxXferCount--;
  312. }
  313. /* Enable CRC Transmission */
  314. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  315. {
  316. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  317. }
  318. }
  319. /* Transmit data in 16 Bit mode */
  320. else
  321. {
  322. if((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01))
  323. {
  324. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  325. hspi->pTxBuffPtr+=2;
  326. hspi->TxXferCount--;
  327. }
  328. while(hspi->TxXferCount > 0)
  329. {
  330. /* Wait until TXE flag is set to send data */
  331. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  332. {
  333. return HAL_TIMEOUT;
  334. }
  335. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  336. hspi->pTxBuffPtr+=2;
  337. hspi->TxXferCount--;
  338. }
  339. /* Enable CRC Transmission */
  340. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  341. {
  342. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  343. }
  344. }
  345. /* Wait until TXE flag is set to send data */
  346. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  347. {
  348. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  349. return HAL_TIMEOUT;
  350. }
  351. /* Wait until Busy flag is reset before disabling SPI */
  352. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
  353. {
  354. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  355. return HAL_TIMEOUT;
  356. }
  357. /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
  358. if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  359. {
  360. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  361. }
  362. hspi->State = HAL_SPI_STATE_READY;
  363. /* Process Unlocked */
  364. __HAL_UNLOCK(hspi);
  365. return HAL_OK;
  366. }
  367. else
  368. {
  369. return HAL_BUSY;
  370. }
  371. }
  372. /**
  373. * @brief Receive an amount of data in blocking mode
  374. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  375. * the configuration information for SPI module.
  376. * @param pData: pointer to data buffer
  377. * @param Size: amount of data to be sent
  378. * @param Timeout: Timeout duration
  379. * @retval HAL status
  380. */
  381. HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  382. {
  383. __IO uint16_t tmpreg = 0;
  384. if(hspi->State == HAL_SPI_STATE_READY)
  385. {
  386. if((pData == NULL ) || (Size == 0))
  387. {
  388. return HAL_ERROR;
  389. }
  390. /* Process Locked */
  391. __HAL_LOCK(hspi);
  392. /* Configure communication */
  393. hspi->State = HAL_SPI_STATE_BUSY_RX;
  394. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  395. hspi->pRxBuffPtr = pData;
  396. hspi->RxXferSize = Size;
  397. hspi->RxXferCount = Size;
  398. /*Init field not used in handle to zero */
  399. hspi->RxISR = 0;
  400. hspi->TxISR = 0;
  401. hspi->pTxBuffPtr = NULL;
  402. hspi->TxXferSize = 0;
  403. hspi->TxXferCount = 0;
  404. /* Configure communication direction : 1Line */
  405. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  406. {
  407. SPI_1LINE_RX(hspi);
  408. }
  409. /* Reset CRC Calculation */
  410. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  411. {
  412. SPI_RESET_CRC(hspi);
  413. }
  414. if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
  415. {
  416. /* Process Unlocked */
  417. __HAL_UNLOCK(hspi);
  418. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  419. return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
  420. }
  421. /* Check if the SPI is already enabled */
  422. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  423. {
  424. /* Enable SPI peripheral */
  425. __HAL_SPI_ENABLE(hspi);
  426. }
  427. /* Receive data in 8 Bit mode */
  428. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  429. {
  430. while(hspi->RxXferCount > 1)
  431. {
  432. /* Wait until RXNE flag is set */
  433. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  434. {
  435. return HAL_TIMEOUT;
  436. }
  437. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  438. hspi->RxXferCount--;
  439. }
  440. /* Enable CRC Transmission */
  441. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  442. {
  443. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  444. }
  445. }
  446. /* Receive data in 16 Bit mode */
  447. else
  448. {
  449. while(hspi->RxXferCount > 1)
  450. {
  451. /* Wait until RXNE flag is set to read data */
  452. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  453. {
  454. return HAL_TIMEOUT;
  455. }
  456. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  457. hspi->pRxBuffPtr+=2;
  458. hspi->RxXferCount--;
  459. }
  460. /* Enable CRC Transmission */
  461. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  462. {
  463. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  464. }
  465. }
  466. /* Wait until RXNE flag is set */
  467. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  468. {
  469. return HAL_TIMEOUT;
  470. }
  471. /* Receive last data in 8 Bit mode */
  472. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  473. {
  474. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  475. }
  476. /* Receive last data in 16 Bit mode */
  477. else
  478. {
  479. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  480. hspi->pRxBuffPtr+=2;
  481. }
  482. hspi->RxXferCount--;
  483. /* Wait until RXNE flag is set: CRC Received */
  484. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  485. {
  486. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  487. {
  488. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  489. return HAL_TIMEOUT;
  490. }
  491. /* Read CRC to Flush RXNE flag */
  492. tmpreg = hspi->Instance->DR;
  493. UNUSED(tmpreg);
  494. }
  495. if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  496. {
  497. /* Disable SPI peripheral */
  498. __HAL_SPI_DISABLE(hspi);
  499. }
  500. hspi->State = HAL_SPI_STATE_READY;
  501. /* Check if CRC error occurred */
  502. if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
  503. {
  504. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  505. /* Reset CRC Calculation */
  506. SPI_RESET_CRC(hspi);
  507. /* Process Unlocked */
  508. __HAL_UNLOCK(hspi);
  509. return HAL_ERROR;
  510. }
  511. /* Process Unlocked */
  512. __HAL_UNLOCK(hspi);
  513. return HAL_OK;
  514. }
  515. else
  516. {
  517. return HAL_BUSY;
  518. }
  519. }
  520. /**
  521. * @brief Transmit and Receive an amount of data in blocking mode
  522. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  523. * the configuration information for SPI module.
  524. * @param pTxData: pointer to transmission data buffer
  525. * @param pRxData: pointer to reception data buffer to be
  526. * @param Size: amount of data to be sent
  527. * @param Timeout: Timeout duration
  528. * @retval HAL status
  529. */
  530. HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
  531. {
  532. __IO uint16_t tmpreg = 0;
  533. if((hspi->State == HAL_SPI_STATE_READY) || (hspi->State == HAL_SPI_STATE_BUSY_RX))
  534. {
  535. if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
  536. {
  537. return HAL_ERROR;
  538. }
  539. /* Check the parameters */
  540. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  541. /* Process Locked */
  542. __HAL_LOCK(hspi);
  543. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  544. if(hspi->State == HAL_SPI_STATE_READY)
  545. {
  546. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  547. }
  548. /* Configure communication */
  549. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  550. hspi->pRxBuffPtr = pRxData;
  551. hspi->RxXferSize = Size;
  552. hspi->RxXferCount = Size;
  553. hspi->pTxBuffPtr = pTxData;
  554. hspi->TxXferSize = Size;
  555. hspi->TxXferCount = Size;
  556. /*Init field not used in handle to zero */
  557. hspi->RxISR = 0;
  558. hspi->TxISR = 0;
  559. /* Reset CRC Calculation */
  560. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  561. {
  562. SPI_RESET_CRC(hspi);
  563. }
  564. /* Check if the SPI is already enabled */
  565. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  566. {
  567. /* Enable SPI peripheral */
  568. __HAL_SPI_ENABLE(hspi);
  569. }
  570. /* Transmit and Receive data in 16 Bit mode */
  571. if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
  572. {
  573. if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
  574. {
  575. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  576. hspi->pTxBuffPtr+=2;
  577. hspi->TxXferCount--;
  578. }
  579. if(hspi->TxXferCount == 0)
  580. {
  581. /* Enable CRC Transmission */
  582. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  583. {
  584. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  585. }
  586. /* Wait until RXNE flag is set */
  587. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  588. {
  589. return HAL_TIMEOUT;
  590. }
  591. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  592. hspi->pRxBuffPtr+=2;
  593. hspi->RxXferCount--;
  594. }
  595. else
  596. {
  597. while(hspi->TxXferCount > 0)
  598. {
  599. /* Wait until TXE flag is set to send data */
  600. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  601. {
  602. return HAL_TIMEOUT;
  603. }
  604. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  605. hspi->pTxBuffPtr+=2;
  606. hspi->TxXferCount--;
  607. /* Enable CRC Transmission */
  608. if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  609. {
  610. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  611. }
  612. /* Wait until RXNE flag is set */
  613. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  614. {
  615. return HAL_TIMEOUT;
  616. }
  617. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  618. hspi->pRxBuffPtr+=2;
  619. hspi->RxXferCount--;
  620. }
  621. /* Receive the last byte */
  622. if(hspi->Init.Mode == SPI_MODE_SLAVE)
  623. {
  624. /* Wait until RXNE flag is set */
  625. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  626. {
  627. return HAL_TIMEOUT;
  628. }
  629. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  630. hspi->pRxBuffPtr+=2;
  631. hspi->RxXferCount--;
  632. }
  633. }
  634. }
  635. /* Transmit and Receive data in 8 Bit mode */
  636. else
  637. {
  638. if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
  639. {
  640. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  641. hspi->TxXferCount--;
  642. }
  643. if(hspi->TxXferCount == 0)
  644. {
  645. /* Enable CRC Transmission */
  646. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  647. {
  648. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  649. }
  650. /* Wait until RXNE flag is set */
  651. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  652. {
  653. return HAL_TIMEOUT;
  654. }
  655. (*hspi->pRxBuffPtr) = hspi->Instance->DR;
  656. hspi->RxXferCount--;
  657. }
  658. else
  659. {
  660. while(hspi->TxXferCount > 0)
  661. {
  662. /* Wait until TXE flag is set to send data */
  663. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  664. {
  665. return HAL_TIMEOUT;
  666. }
  667. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  668. hspi->TxXferCount--;
  669. /* Enable CRC Transmission */
  670. if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  671. {
  672. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  673. }
  674. /* Wait until RXNE flag is set */
  675. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  676. {
  677. return HAL_TIMEOUT;
  678. }
  679. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  680. hspi->RxXferCount--;
  681. }
  682. if(hspi->Init.Mode == SPI_MODE_SLAVE)
  683. {
  684. /* Wait until RXNE flag is set */
  685. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  686. {
  687. return HAL_TIMEOUT;
  688. }
  689. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  690. hspi->RxXferCount--;
  691. }
  692. }
  693. }
  694. /* Read CRC from DR to close CRC calculation process */
  695. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  696. {
  697. /* Wait until RXNE flag is set */
  698. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  699. {
  700. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  701. return HAL_TIMEOUT;
  702. }
  703. /* Read CRC */
  704. tmpreg = hspi->Instance->DR;
  705. UNUSED(tmpreg);
  706. }
  707. /* Wait until Busy flag is reset before disabling SPI */
  708. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
  709. {
  710. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  711. return HAL_TIMEOUT;
  712. }
  713. hspi->State = HAL_SPI_STATE_READY;
  714. /* Check if CRC error occurred */
  715. if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
  716. {
  717. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  718. /* Reset CRC Calculation */
  719. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  720. {
  721. SPI_RESET_CRC(hspi);
  722. }
  723. /* Process Unlocked */
  724. __HAL_UNLOCK(hspi);
  725. return HAL_ERROR;
  726. }
  727. /* Process Unlocked */
  728. __HAL_UNLOCK(hspi);
  729. return HAL_OK;
  730. }
  731. else
  732. {
  733. return HAL_BUSY;
  734. }
  735. }
  736. /**
  737. * @brief Transmit an amount of data in no-blocking mode with Interrupt
  738. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  739. * the configuration information for SPI module.
  740. * @param pData: pointer to data buffer
  741. * @param Size: amount of data to be sent
  742. * @retval HAL status
  743. */
  744. HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  745. {
  746. if(hspi->State == HAL_SPI_STATE_READY)
  747. {
  748. if((pData == NULL) || (Size == 0))
  749. {
  750. return HAL_ERROR;
  751. }
  752. /* Check the parameters */
  753. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  754. /* Process Locked */
  755. __HAL_LOCK(hspi);
  756. /* Configure communication */
  757. hspi->State = HAL_SPI_STATE_BUSY_TX;
  758. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  759. hspi->TxISR = &SPI_TxISR;
  760. hspi->pTxBuffPtr = pData;
  761. hspi->TxXferSize = Size;
  762. hspi->TxXferCount = Size;
  763. /*Init field not used in handle to zero */
  764. hspi->RxISR = 0;
  765. hspi->pRxBuffPtr = NULL;
  766. hspi->RxXferSize = 0;
  767. hspi->RxXferCount = 0;
  768. /* Configure communication direction : 1Line */
  769. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  770. {
  771. SPI_1LINE_TX(hspi);
  772. }
  773. /* Reset CRC Calculation */
  774. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  775. {
  776. SPI_RESET_CRC(hspi);
  777. }
  778. if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  779. {
  780. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE));
  781. }else
  782. {
  783. /* Enable TXE and ERR interrupt */
  784. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
  785. }
  786. /* Process Unlocked */
  787. __HAL_UNLOCK(hspi);
  788. /* Check if the SPI is already enabled */
  789. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  790. {
  791. /* Enable SPI peripheral */
  792. __HAL_SPI_ENABLE(hspi);
  793. }
  794. return HAL_OK;
  795. }
  796. else
  797. {
  798. return HAL_BUSY;
  799. }
  800. }
  801. /**
  802. * @brief Receive an amount of data in no-blocking mode with Interrupt
  803. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  804. * the configuration information for SPI module.
  805. * @param pData: pointer to data buffer
  806. * @param Size: amount of data to be sent
  807. * @retval HAL status
  808. */
  809. HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  810. {
  811. if(hspi->State == HAL_SPI_STATE_READY)
  812. {
  813. if((pData == NULL) || (Size == 0))
  814. {
  815. return HAL_ERROR;
  816. }
  817. /* Process Locked */
  818. __HAL_LOCK(hspi);
  819. /* Configure communication */
  820. hspi->State = HAL_SPI_STATE_BUSY_RX;
  821. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  822. hspi->RxISR = &SPI_RxISR;
  823. hspi->pRxBuffPtr = pData;
  824. hspi->RxXferSize = Size;
  825. hspi->RxXferCount = Size ;
  826. /*Init field not used in handle to zero */
  827. hspi->TxISR = 0;
  828. hspi->pTxBuffPtr = NULL;
  829. hspi->TxXferSize = 0;
  830. hspi->TxXferCount = 0;
  831. /* Configure communication direction : 1Line */
  832. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  833. {
  834. SPI_1LINE_RX(hspi);
  835. }
  836. else if((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
  837. {
  838. /* Process Unlocked */
  839. __HAL_UNLOCK(hspi);
  840. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  841. return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
  842. }
  843. /* Reset CRC Calculation */
  844. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  845. {
  846. SPI_RESET_CRC(hspi);
  847. }
  848. /* Enable TXE and ERR interrupt */
  849. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
  850. /* Process Unlocked */
  851. __HAL_UNLOCK(hspi);
  852. /* Note : The SPI must be enabled after unlocking current process
  853. to avoid the risk of SPI interrupt handle execution before current
  854. process unlock */
  855. /* Check if the SPI is already enabled */
  856. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  857. {
  858. /* Enable SPI peripheral */
  859. __HAL_SPI_ENABLE(hspi);
  860. }
  861. return HAL_OK;
  862. }
  863. else
  864. {
  865. return HAL_BUSY;
  866. }
  867. }
  868. /**
  869. * @brief Transmit and Receive an amount of data in no-blocking mode with Interrupt
  870. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  871. * the configuration information for SPI module.
  872. * @param pTxData: pointer to transmission data buffer
  873. * @param pRxData: pointer to reception data buffer to be
  874. * @param Size: amount of data to be sent
  875. * @retval HAL status
  876. */
  877. HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
  878. {
  879. if((hspi->State == HAL_SPI_STATE_READY) || \
  880. ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
  881. {
  882. if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
  883. {
  884. return HAL_ERROR;
  885. }
  886. /* Check the parameters */
  887. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  888. /* Process locked */
  889. __HAL_LOCK(hspi);
  890. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  891. if(hspi->State != HAL_SPI_STATE_BUSY_RX)
  892. {
  893. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  894. }
  895. /* Configure communication */
  896. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  897. hspi->TxISR = &SPI_TxISR;
  898. hspi->pTxBuffPtr = pTxData;
  899. hspi->TxXferSize = Size;
  900. hspi->TxXferCount = Size;
  901. hspi->RxISR = &SPI_2LinesRxISR;
  902. hspi->pRxBuffPtr = pRxData;
  903. hspi->RxXferSize = Size;
  904. hspi->RxXferCount = Size;
  905. /* Reset CRC Calculation */
  906. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  907. {
  908. SPI_RESET_CRC(hspi);
  909. }
  910. /* Enable TXE, RXNE and ERR interrupt */
  911. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  912. /* Process Unlocked */
  913. __HAL_UNLOCK(hspi);
  914. /* Check if the SPI is already enabled */
  915. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  916. {
  917. /* Enable SPI peripheral */
  918. __HAL_SPI_ENABLE(hspi);
  919. }
  920. return HAL_OK;
  921. }
  922. else
  923. {
  924. return HAL_BUSY;
  925. }
  926. }
  927. /**
  928. * @brief Transmit an amount of data in no-blocking mode with DMA
  929. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  930. * the configuration information for SPI module.
  931. * @param pData: pointer to data buffer
  932. * @param Size: amount of data to be sent
  933. * @retval HAL status
  934. */
  935. HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  936. {
  937. if(hspi->State == HAL_SPI_STATE_READY)
  938. {
  939. if((pData == NULL) || (Size == 0))
  940. {
  941. return HAL_ERROR;
  942. }
  943. /* Check the parameters */
  944. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  945. /* Process Locked */
  946. __HAL_LOCK(hspi);
  947. /* Configure communication */
  948. hspi->State = HAL_SPI_STATE_BUSY_TX;
  949. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  950. hspi->pTxBuffPtr = pData;
  951. hspi->TxXferSize = Size;
  952. hspi->TxXferCount = Size;
  953. /*Init field not used in handle to zero */
  954. hspi->TxISR = 0;
  955. hspi->RxISR = 0;
  956. hspi->pRxBuffPtr = NULL;
  957. hspi->RxXferSize = 0;
  958. hspi->RxXferCount = 0;
  959. /* Configure communication direction : 1Line */
  960. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  961. {
  962. SPI_1LINE_TX(hspi);
  963. }
  964. /* Reset CRC Calculation */
  965. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  966. {
  967. SPI_RESET_CRC(hspi);
  968. }
  969. /* Set the SPI TxDMA Half transfer complete callback */
  970. hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
  971. /* Set the SPI TxDMA transfer complete callback */
  972. hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
  973. /* Set the DMA error callback */
  974. hspi->hdmatx->XferErrorCallback = SPI_DMAError;
  975. /* Enable the Tx DMA Channel */
  976. HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
  977. /* Enable Tx DMA Request */
  978. SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  979. /* Process Unlocked */
  980. __HAL_UNLOCK(hspi);
  981. /* Check if the SPI is already enabled */
  982. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  983. {
  984. /* Enable SPI peripheral */
  985. __HAL_SPI_ENABLE(hspi);
  986. }
  987. return HAL_OK;
  988. }
  989. else
  990. {
  991. return HAL_BUSY;
  992. }
  993. }
  994. /**
  995. * @brief Receive an amount of data in no-blocking mode with DMA
  996. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  997. * the configuration information for SPI module.
  998. * @param pData: pointer to data buffer
  999. * @note When the CRC feature is enabled the pData Length must be Size + 1.
  1000. * @param Size: amount of data to be sent
  1001. * @retval HAL status
  1002. */
  1003. HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1004. {
  1005. if(hspi->State == HAL_SPI_STATE_READY)
  1006. {
  1007. if((pData == NULL) || (Size == 0))
  1008. {
  1009. return HAL_ERROR;
  1010. }
  1011. /* Process Locked */
  1012. __HAL_LOCK(hspi);
  1013. /* Configure communication */
  1014. hspi->State = HAL_SPI_STATE_BUSY_RX;
  1015. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1016. hspi->pRxBuffPtr = pData;
  1017. hspi->RxXferSize = Size;
  1018. hspi->RxXferCount = Size;
  1019. /*Init field not used in handle to zero */
  1020. hspi->RxISR = 0;
  1021. hspi->TxISR = 0;
  1022. hspi->pTxBuffPtr = NULL;
  1023. hspi->TxXferSize = 0;
  1024. hspi->TxXferCount = 0;
  1025. /* Configure communication direction : 1Line */
  1026. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1027. {
  1028. SPI_1LINE_RX(hspi);
  1029. }
  1030. else if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
  1031. {
  1032. /* Process Unlocked */
  1033. __HAL_UNLOCK(hspi);
  1034. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  1035. return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
  1036. }
  1037. /* Reset CRC Calculation */
  1038. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1039. {
  1040. SPI_RESET_CRC(hspi);
  1041. }
  1042. /* Set the SPI RxDMA Half transfer complete callback */
  1043. hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
  1044. /* Set the SPI Rx DMA transfer complete callback */
  1045. hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
  1046. /* Set the DMA error callback */
  1047. hspi->hdmarx->XferErrorCallback = SPI_DMAError;
  1048. /* Enable the Rx DMA Channel */
  1049. HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
  1050. /* Enable Rx DMA Request */
  1051. SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1052. /* Process Unlocked */
  1053. __HAL_UNLOCK(hspi);
  1054. /* Check if the SPI is already enabled */
  1055. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1056. {
  1057. /* Enable SPI peripheral */
  1058. __HAL_SPI_ENABLE(hspi);
  1059. }
  1060. return HAL_OK;
  1061. }
  1062. else
  1063. {
  1064. return HAL_BUSY;
  1065. }
  1066. }
  1067. /**
  1068. * @brief Transmit and Receive an amount of data in no-blocking mode with DMA
  1069. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1070. * the configuration information for SPI module.
  1071. * @param pTxData: pointer to transmission data buffer
  1072. * @param pRxData: pointer to reception data buffer
  1073. * @note When the CRC feature is enabled the pRxData Length must be Size + 1
  1074. * @param Size: amount of data to be sent
  1075. * @retval HAL status
  1076. */
  1077. HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
  1078. {
  1079. if((hspi->State == HAL_SPI_STATE_READY) || \
  1080. ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
  1081. {
  1082. if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
  1083. {
  1084. return HAL_ERROR;
  1085. }
  1086. /* Check the parameters */
  1087. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  1088. /* Process locked */
  1089. __HAL_LOCK(hspi);
  1090. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  1091. if(hspi->State != HAL_SPI_STATE_BUSY_RX)
  1092. {
  1093. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  1094. }
  1095. /* Configure communication */
  1096. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1097. hspi->pTxBuffPtr = (uint8_t*)pTxData;
  1098. hspi->TxXferSize = Size;
  1099. hspi->TxXferCount = Size;
  1100. hspi->pRxBuffPtr = (uint8_t*)pRxData;
  1101. hspi->RxXferSize = Size;
  1102. hspi->RxXferCount = Size;
  1103. /*Init field not used in handle to zero */
  1104. hspi->RxISR = 0;
  1105. hspi->TxISR = 0;
  1106. /* Reset CRC Calculation */
  1107. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1108. {
  1109. SPI_RESET_CRC(hspi);
  1110. }
  1111. /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
  1112. if(hspi->State == HAL_SPI_STATE_BUSY_RX)
  1113. {
  1114. /* Set the SPI Rx DMA Half transfer complete callback */
  1115. hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
  1116. hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
  1117. }
  1118. else
  1119. {
  1120. /* Set the SPI Tx/Rx DMA Half transfer complete callback */
  1121. hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
  1122. hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
  1123. }
  1124. /* Set the DMA error callback */
  1125. hspi->hdmarx->XferErrorCallback = SPI_DMAError;
  1126. /* Enable the Rx DMA Channel */
  1127. HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
  1128. /* Enable Rx DMA Request */
  1129. SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1130. /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
  1131. is performed in DMA reception complete callback */
  1132. if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1133. {
  1134. /* Set the DMA error callback */
  1135. hspi->hdmatx->XferErrorCallback = SPI_DMAError;
  1136. }
  1137. else
  1138. {
  1139. hspi->hdmatx->XferErrorCallback = NULL;
  1140. }
  1141. /* Enable the Tx DMA Channel */
  1142. HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
  1143. /* Check if the SPI is already enabled */
  1144. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1145. {
  1146. /* Enable SPI peripheral */
  1147. __HAL_SPI_ENABLE(hspi);
  1148. }
  1149. /* Enable Tx DMA Request */
  1150. SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1151. /* Process Unlocked */
  1152. __HAL_UNLOCK(hspi);
  1153. return HAL_OK;
  1154. }
  1155. else
  1156. {
  1157. return HAL_BUSY;
  1158. }
  1159. }
  1160. /**
  1161. * @brief Pauses the DMA Transfer.
  1162. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1163. * the configuration information for the specified SPI module.
  1164. * @retval HAL status
  1165. */
  1166. HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
  1167. {
  1168. /* Process Locked */
  1169. __HAL_LOCK(hspi);
  1170. /* Disable the SPI DMA Tx & Rx requests */
  1171. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1172. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1173. /* Process Unlocked */
  1174. __HAL_UNLOCK(hspi);
  1175. return HAL_OK;
  1176. }
  1177. /**
  1178. * @brief Resumes the DMA Transfer.
  1179. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1180. * the configuration information for the specified SPI module.
  1181. * @retval HAL status
  1182. */
  1183. HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
  1184. {
  1185. /* Process Locked */
  1186. __HAL_LOCK(hspi);
  1187. /* Enable the SPI DMA Tx & Rx requests */
  1188. SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1189. SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1190. /* Process Unlocked */
  1191. __HAL_UNLOCK(hspi);
  1192. return HAL_OK;
  1193. }
  1194. /**
  1195. * @brief Stops the DMA Transfer.
  1196. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1197. * the configuration information for the specified UART module.
  1198. * @retval HAL status
  1199. */
  1200. HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
  1201. {
  1202. /* The Lock is not implemented on this API to allow the user application
  1203. to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
  1204. when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
  1205. and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
  1206. */
  1207. /* Abort the SPI DMA tx Channel */
  1208. if(hspi->hdmatx != NULL)
  1209. {
  1210. HAL_DMA_Abort(hspi->hdmatx);
  1211. }
  1212. /* Abort the SPI DMA rx Channel */
  1213. if(hspi->hdmarx != NULL)
  1214. {
  1215. HAL_DMA_Abort(hspi->hdmarx);
  1216. }
  1217. /* Disable the SPI DMA Tx & Rx requests */
  1218. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1219. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1220. hspi->State = HAL_SPI_STATE_READY;
  1221. return HAL_OK;
  1222. }
  1223. /**
  1224. * @brief This function handles SPI interrupt request.
  1225. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1226. * the configuration information for SPI module.
  1227. * @retval HAL status
  1228. */
  1229. void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
  1230. {
  1231. /* SPI in mode Receiver and Overrun not occurred ---------------------------*/
  1232. if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) == RESET))
  1233. {
  1234. hspi->RxISR(hspi);
  1235. return;
  1236. }
  1237. /* SPI in mode Tramitter ---------------------------------------------------*/
  1238. if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE) != RESET))
  1239. {
  1240. hspi->TxISR(hspi);
  1241. return;
  1242. }
  1243. if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_ERR) != RESET)
  1244. {
  1245. /* SPI CRC error interrupt occurred ---------------------------------------*/
  1246. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1247. {
  1248. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1249. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1250. }
  1251. /* SPI Mode Fault error interrupt occurred --------------------------------*/
  1252. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_MODF) != RESET)
  1253. {
  1254. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
  1255. __HAL_SPI_CLEAR_MODFFLAG(hspi);
  1256. }
  1257. /* SPI Overrun error interrupt occurred -----------------------------------*/
  1258. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) != RESET)
  1259. {
  1260. if(hspi->State != HAL_SPI_STATE_BUSY_TX)
  1261. {
  1262. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
  1263. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1264. }
  1265. }
  1266. /* SPI Frame error interrupt occurred -------------------------------------*/
  1267. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_FRE) != RESET)
  1268. {
  1269. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
  1270. __HAL_SPI_CLEAR_FREFLAG(hspi);
  1271. }
  1272. /* Call the Error call Back in case of Errors */
  1273. if(hspi->ErrorCode!=HAL_SPI_ERROR_NONE)
  1274. {
  1275. __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
  1276. hspi->State = HAL_SPI_STATE_READY;
  1277. HAL_SPI_ErrorCallback(hspi);
  1278. }
  1279. }
  1280. }
  1281. /**
  1282. * @brief Tx Transfer completed callbacks
  1283. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1284. * the configuration information for SPI module.
  1285. * @retval None
  1286. */
  1287. __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
  1288. {
  1289. /* Prevent unused argument(s) compilation warning */
  1290. UNUSED(hspi);
  1291. /* NOTE : This function Should not be modified, when the callback is needed,
  1292. the HAL_SPI_TxCpltCallback could be implenetd in the user file
  1293. */
  1294. }
  1295. /**
  1296. * @brief Rx Transfer completed callbacks
  1297. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1298. * the configuration information for SPI module.
  1299. * @retval None
  1300. */
  1301. __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
  1302. {
  1303. /* Prevent unused argument(s) compilation warning */
  1304. UNUSED(hspi);
  1305. /* NOTE : This function Should not be modified, when the callback is needed,
  1306. the HAL_SPI_RxCpltCallback() could be implenetd in the user file
  1307. */
  1308. }
  1309. /**
  1310. * @brief Tx and Rx Transfer completed callbacks
  1311. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1312. * the configuration information for SPI module.
  1313. * @retval None
  1314. */
  1315. __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
  1316. {
  1317. /* Prevent unused argument(s) compilation warning */
  1318. UNUSED(hspi);
  1319. /* NOTE : This function Should not be modified, when the callback is needed,
  1320. the HAL_SPI_TxRxCpltCallback() could be implenetd in the user file
  1321. */
  1322. }
  1323. /**
  1324. * @brief Tx Half Transfer completed callbacks
  1325. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1326. * the configuration information for SPI module.
  1327. * @retval None
  1328. */
  1329. __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1330. {
  1331. /* Prevent unused argument(s) compilation warning */
  1332. UNUSED(hspi);
  1333. /* NOTE : This function Should not be modified, when the callback is needed,
  1334. the HAL_SPI_TxHalfCpltCallback could be implenetd in the user file
  1335. */
  1336. }
  1337. /**
  1338. * @brief Rx Half Transfer completed callbacks
  1339. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1340. * the configuration information for SPI module.
  1341. * @retval None
  1342. */
  1343. __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1344. {
  1345. /* Prevent unused argument(s) compilation warning */
  1346. UNUSED(hspi);
  1347. /* NOTE : This function Should not be modified, when the callback is needed,
  1348. the HAL_SPI_RxHalfCpltCallback() could be implenetd in the user file
  1349. */
  1350. }
  1351. /**
  1352. * @brief Tx and Rx Transfer completed callbacks
  1353. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1354. * the configuration information for SPI module.
  1355. * @retval None
  1356. */
  1357. __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1358. {
  1359. /* Prevent unused argument(s) compilation warning */
  1360. UNUSED(hspi);
  1361. /* NOTE : This function Should not be modified, when the callback is needed,
  1362. the HAL_SPI_TxRxHalfCpltCallback() could be implenetd in the user file
  1363. */
  1364. }
  1365. /**
  1366. * @brief SPI error callbacks
  1367. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1368. * the configuration information for SPI module.
  1369. * @retval None
  1370. */
  1371. __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
  1372. {
  1373. /* Prevent unused argument(s) compilation warning */
  1374. UNUSED(hspi);
  1375. /* NOTE : - This function Should not be modified, when the callback is needed,
  1376. the HAL_SPI_ErrorCallback() could be implenetd in the user file.
  1377. - The ErrorCode parameter in the hspi handle is updated by the SPI processes
  1378. and user can use HAL_SPI_GetError() API to check the latest error occurred.
  1379. */
  1380. }
  1381. /**
  1382. * @}
  1383. */
  1384. /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
  1385. * @brief SPI control functions
  1386. *
  1387. @verbatim
  1388. ===============================================================================
  1389. ##### Peripheral State and Errors functions #####
  1390. ===============================================================================
  1391. [..]
  1392. This subsection provides a set of functions allowing to control the SPI.
  1393. (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
  1394. (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
  1395. @endverbatim
  1396. * @{
  1397. */
  1398. /**
  1399. * @brief Return the SPI state
  1400. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1401. * the configuration information for SPI module.
  1402. * @retval HAL state
  1403. */
  1404. HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
  1405. {
  1406. return hspi->State;
  1407. }
  1408. /**
  1409. * @brief Return the SPI error code
  1410. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1411. * the configuration information for SPI module.
  1412. * @retval SPI Error Code
  1413. */
  1414. uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
  1415. {
  1416. return hspi->ErrorCode;
  1417. }
  1418. /**
  1419. * @}
  1420. */
  1421. /**
  1422. * @}
  1423. */
  1424. /** @addtogroup SPI_Private_Functions
  1425. * @{
  1426. */
  1427. /**
  1428. * @brief Interrupt Handler to close Tx transfer
  1429. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1430. * the configuration information for SPI module.
  1431. * @retval void
  1432. */
  1433. static void SPI_TxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi)
  1434. {
  1435. /* Wait until TXE flag is set to send data */
  1436. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1437. {
  1438. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1439. }
  1440. /* Disable TXE interrupt */
  1441. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE ));
  1442. /* Disable ERR interrupt if Receive process is finished */
  1443. if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) == RESET)
  1444. {
  1445. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
  1446. /* Wait until Busy flag is reset before disabling SPI */
  1447. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1448. {
  1449. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1450. }
  1451. /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
  1452. if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  1453. {
  1454. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1455. }
  1456. /* Check if Errors has been detected during transfer */
  1457. if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
  1458. {
  1459. /* Check if we are in Tx or in Rx/Tx Mode */
  1460. if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1461. {
  1462. /* Set state to READY before run the Callback Complete */
  1463. hspi->State = HAL_SPI_STATE_READY;
  1464. HAL_SPI_TxRxCpltCallback(hspi);
  1465. }
  1466. else
  1467. {
  1468. /* Set state to READY before run the Callback Complete */
  1469. hspi->State = HAL_SPI_STATE_READY;
  1470. HAL_SPI_TxCpltCallback(hspi);
  1471. }
  1472. }
  1473. else
  1474. {
  1475. /* Set state to READY before run the Callback Complete */
  1476. hspi->State = HAL_SPI_STATE_READY;
  1477. /* Call Error call back in case of Error */
  1478. HAL_SPI_ErrorCallback(hspi);
  1479. }
  1480. }
  1481. }
  1482. /**
  1483. * @brief Interrupt Handler to transmit amount of data in no-blocking mode
  1484. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1485. * the configuration information for SPI module.
  1486. * @retval void
  1487. */
  1488. static void SPI_TxISR(struct __SPI_HandleTypeDef *hspi)
  1489. {
  1490. /* Transmit data in 8 Bit mode */
  1491. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1492. {
  1493. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  1494. }
  1495. /* Transmit data in 16 Bit mode */
  1496. else
  1497. {
  1498. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  1499. hspi->pTxBuffPtr+=2;
  1500. }
  1501. hspi->TxXferCount--;
  1502. if(hspi->TxXferCount == 0)
  1503. {
  1504. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1505. {
  1506. /* calculate and transfer CRC on Tx line */
  1507. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  1508. }
  1509. SPI_TxCloseIRQHandler(hspi);
  1510. }
  1511. }
  1512. /**
  1513. * @brief Interrupt Handler to close Rx transfer
  1514. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1515. * the configuration information for SPI module.
  1516. * @retval void
  1517. */
  1518. static void SPI_RxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi)
  1519. {
  1520. __IO uint16_t tmpreg = 0;
  1521. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1522. {
  1523. /* Wait until RXNE flag is set to send data */
  1524. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1525. {
  1526. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1527. }
  1528. /* Read CRC to reset RXNE flag */
  1529. tmpreg = hspi->Instance->DR;
  1530. UNUSED(tmpreg);
  1531. /* Wait until RXNE flag is set to send data */
  1532. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1533. {
  1534. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1535. }
  1536. /* Check if CRC error occurred */
  1537. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1538. {
  1539. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1540. /* Reset CRC Calculation */
  1541. SPI_RESET_CRC(hspi);
  1542. }
  1543. }
  1544. /* Disable RXNE interrupt */
  1545. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE));
  1546. /* if Transmit process is finished */
  1547. if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) == RESET)
  1548. {
  1549. /* Disable ERR interrupt */
  1550. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
  1551. if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  1552. {
  1553. /* Disable SPI peripheral */
  1554. __HAL_SPI_DISABLE(hspi);
  1555. }
  1556. /* Check if Errors has been detected during transfer */
  1557. if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
  1558. {
  1559. /* Check if we are in Rx or in Rx/Tx Mode */
  1560. if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1561. {
  1562. /* Set state to READY before run the Callback Complete */
  1563. hspi->State = HAL_SPI_STATE_READY;
  1564. HAL_SPI_TxRxCpltCallback(hspi);
  1565. }
  1566. else
  1567. {
  1568. /* Set state to READY before run the Callback Complete */
  1569. hspi->State = HAL_SPI_STATE_READY;
  1570. HAL_SPI_RxCpltCallback(hspi);
  1571. }
  1572. }
  1573. else
  1574. {
  1575. /* Set state to READY before run the Callback Complete */
  1576. hspi->State = HAL_SPI_STATE_READY;
  1577. /* Call Error call back in case of Error */
  1578. HAL_SPI_ErrorCallback(hspi);
  1579. }
  1580. }
  1581. }
  1582. /**
  1583. * @brief Interrupt Handler to receive amount of data in 2Lines mode
  1584. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1585. * the configuration information for SPI module.
  1586. * @retval void
  1587. */
  1588. static void SPI_2LinesRxISR(struct __SPI_HandleTypeDef *hspi)
  1589. {
  1590. /* Receive data in 8 Bit mode */
  1591. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1592. {
  1593. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  1594. }
  1595. /* Receive data in 16 Bit mode */
  1596. else
  1597. {
  1598. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  1599. hspi->pRxBuffPtr+=2;
  1600. }
  1601. hspi->RxXferCount--;
  1602. if(hspi->RxXferCount==0)
  1603. {
  1604. SPI_RxCloseIRQHandler(hspi);
  1605. }
  1606. }
  1607. /**
  1608. * @brief Interrupt Handler to receive amount of data in no-blocking mode
  1609. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1610. * the configuration information for SPI module.
  1611. * @retval void
  1612. */
  1613. static void SPI_RxISR(struct __SPI_HandleTypeDef *hspi)
  1614. {
  1615. /* Receive data in 8 Bit mode */
  1616. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1617. {
  1618. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  1619. }
  1620. /* Receive data in 16 Bit mode */
  1621. else
  1622. {
  1623. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  1624. hspi->pRxBuffPtr+=2;
  1625. }
  1626. hspi->RxXferCount--;
  1627. /* Enable CRC Transmission */
  1628. if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  1629. {
  1630. /* Set CRC Next to calculate CRC on Rx side */
  1631. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  1632. }
  1633. if(hspi->RxXferCount == 0)
  1634. {
  1635. SPI_RxCloseIRQHandler(hspi);
  1636. }
  1637. }
  1638. /**
  1639. * @brief DMA SPI transmit process complete callback
  1640. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1641. * the configuration information for the specified DMA module.
  1642. * @retval None
  1643. */
  1644. static void SPI_DMATransmitCplt(struct __DMA_HandleTypeDef *hdma)
  1645. {
  1646. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1647. /* DMA Normal Mode */
  1648. if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
  1649. {
  1650. /* Wait until TXE flag is set to send data */
  1651. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1652. {
  1653. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1654. }
  1655. /* Disable Tx DMA Request */
  1656. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1657. /* Wait until Busy flag is reset before disabling SPI */
  1658. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1659. {
  1660. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1661. }
  1662. hspi->TxXferCount = 0;
  1663. hspi->State = HAL_SPI_STATE_READY;
  1664. }
  1665. /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
  1666. if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  1667. {
  1668. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1669. }
  1670. /* Check if Errors has been detected during transfer */
  1671. if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1672. {
  1673. HAL_SPI_ErrorCallback(hspi);
  1674. }
  1675. else
  1676. {
  1677. HAL_SPI_TxCpltCallback(hspi);
  1678. }
  1679. }
  1680. /**
  1681. * @brief DMA SPI receive process complete callback
  1682. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1683. * the configuration information for the specified DMA module.
  1684. * @retval None
  1685. */
  1686. static void SPI_DMAReceiveCplt(struct __DMA_HandleTypeDef *hdma)
  1687. {
  1688. __IO uint16_t tmpreg = 0;
  1689. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1690. /* DMA Normal mode */
  1691. if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
  1692. {
  1693. if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  1694. {
  1695. /* Disable SPI peripheral */
  1696. __HAL_SPI_DISABLE(hspi);
  1697. }
  1698. /* Disable Rx DMA Request */
  1699. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1700. /* Disable Tx DMA Request (done by default to handle the case Master RX direction 2 lines) */
  1701. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1702. /* Reset CRC Calculation */
  1703. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1704. {
  1705. /* Wait until RXNE flag is set to send data */
  1706. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1707. {
  1708. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1709. }
  1710. /* Read CRC */
  1711. tmpreg = hspi->Instance->DR;
  1712. UNUSED(tmpreg);
  1713. /* Wait until RXNE flag is set */
  1714. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1715. {
  1716. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1717. }
  1718. /* Check if CRC error occurred */
  1719. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1720. {
  1721. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1722. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1723. }
  1724. }
  1725. hspi->RxXferCount = 0;
  1726. hspi->State = HAL_SPI_STATE_READY;
  1727. /* Check if Errors has been detected during transfer */
  1728. if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1729. {
  1730. HAL_SPI_ErrorCallback(hspi);
  1731. }
  1732. else
  1733. {
  1734. HAL_SPI_RxCpltCallback(hspi);
  1735. }
  1736. }
  1737. else
  1738. {
  1739. HAL_SPI_RxCpltCallback(hspi);
  1740. }
  1741. }
  1742. /**
  1743. * @brief DMA SPI transmit receive process complete callback
  1744. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1745. * the configuration information for the specified DMA module.
  1746. * @retval None
  1747. */
  1748. static void SPI_DMATransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma)
  1749. {
  1750. __IO uint16_t tmpreg = 0;
  1751. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1752. if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
  1753. {
  1754. /* Reset CRC Calculation */
  1755. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1756. {
  1757. /* Check if CRC is done on going (RXNE flag set) */
  1758. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK)
  1759. {
  1760. /* Wait until RXNE flag is set to send data */
  1761. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1762. {
  1763. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1764. }
  1765. }
  1766. /* Read CRC */
  1767. tmpreg = hspi->Instance->DR;
  1768. UNUSED(tmpreg);
  1769. /* Check if CRC error occurred */
  1770. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1771. {
  1772. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1773. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1774. }
  1775. }
  1776. /* Wait until TXE flag is set to send data */
  1777. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1778. {
  1779. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1780. }
  1781. /* Disable Tx DMA Request */
  1782. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1783. /* Wait until Busy flag is reset before disabling SPI */
  1784. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1785. {
  1786. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1787. }
  1788. /* Disable Rx DMA Request */
  1789. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1790. hspi->TxXferCount = 0;
  1791. hspi->RxXferCount = 0;
  1792. hspi->State = HAL_SPI_STATE_READY;
  1793. /* Check if Errors has been detected during transfer */
  1794. if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1795. {
  1796. HAL_SPI_ErrorCallback(hspi);
  1797. }
  1798. else
  1799. {
  1800. HAL_SPI_TxRxCpltCallback(hspi);
  1801. }
  1802. }
  1803. else
  1804. {
  1805. HAL_SPI_TxRxCpltCallback(hspi);
  1806. }
  1807. }
  1808. /**
  1809. * @brief DMA SPI half transmit process complete callback
  1810. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1811. * the configuration information for the specified DMA module.
  1812. * @retval None
  1813. */
  1814. static void SPI_DMAHalfTransmitCplt(struct __DMA_HandleTypeDef *hdma)
  1815. {
  1816. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1817. HAL_SPI_TxHalfCpltCallback(hspi);
  1818. }
  1819. /**
  1820. * @brief DMA SPI half receive process complete callback
  1821. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1822. * the configuration information for the specified DMA module.
  1823. * @retval None
  1824. */
  1825. static void SPI_DMAHalfReceiveCplt(struct __DMA_HandleTypeDef *hdma)
  1826. {
  1827. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1828. HAL_SPI_RxHalfCpltCallback(hspi);
  1829. }
  1830. /**
  1831. * @brief DMA SPI Half transmit receive process complete callback
  1832. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1833. * the configuration information for the specified DMA module.
  1834. * @retval None
  1835. */
  1836. static void SPI_DMAHalfTransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma)
  1837. {
  1838. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1839. HAL_SPI_TxRxHalfCpltCallback(hspi);
  1840. }
  1841. /**
  1842. * @brief DMA SPI communication error callback
  1843. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1844. * the configuration information for the specified DMA module.
  1845. * @retval None
  1846. */
  1847. static void SPI_DMAError(struct __DMA_HandleTypeDef *hdma)
  1848. {
  1849. SPI_HandleTypeDef* hspi = (SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1850. hspi->TxXferCount = 0;
  1851. hspi->RxXferCount = 0;
  1852. hspi->State= HAL_SPI_STATE_READY;
  1853. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
  1854. HAL_SPI_ErrorCallback(hspi);
  1855. }
  1856. /**
  1857. * @brief This function handles SPI Communication Timeout.
  1858. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1859. * the configuration information for SPI module.
  1860. * @param Flag: SPI flag to check
  1861. * @param Status: Flag status to check: RESET or set
  1862. * @param Timeout: Timeout duration
  1863. * @retval HAL status
  1864. */
  1865. static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(struct __SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
  1866. {
  1867. uint32_t tickstart = 0;
  1868. /* Get tick */
  1869. tickstart = HAL_GetTick();
  1870. /* Wait until flag is set */
  1871. if(Status == RESET)
  1872. {
  1873. while(__HAL_SPI_GET_FLAG(hspi, Flag) == RESET)
  1874. {
  1875. if(Timeout != HAL_MAX_DELAY)
  1876. {
  1877. if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
  1878. {
  1879. /* Disable the SPI and reset the CRC: the CRC value should be cleared
  1880. on both master and slave sides in order to resynchronize the master
  1881. and slave for their respective CRC calculation */
  1882. /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  1883. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  1884. /* Disable SPI peripheral */
  1885. __HAL_SPI_DISABLE(hspi);
  1886. /* Reset CRC Calculation */
  1887. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1888. {
  1889. SPI_RESET_CRC(hspi);
  1890. }
  1891. hspi->State= HAL_SPI_STATE_READY;
  1892. /* Process Unlocked */
  1893. __HAL_UNLOCK(hspi);
  1894. return HAL_TIMEOUT;
  1895. }
  1896. }
  1897. }
  1898. }
  1899. else
  1900. {
  1901. while(__HAL_SPI_GET_FLAG(hspi, Flag) != RESET)
  1902. {
  1903. if(Timeout != HAL_MAX_DELAY)
  1904. {
  1905. if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
  1906. {
  1907. /* Disable the SPI and reset the CRC: the CRC value should be cleared
  1908. on both master and slave sides in order to resynchronize the master
  1909. and slave for their respective CRC calculation */
  1910. /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  1911. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  1912. /* Disable SPI peripheral */
  1913. __HAL_SPI_DISABLE(hspi);
  1914. /* Reset CRC Calculation */
  1915. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1916. {
  1917. SPI_RESET_CRC(hspi);
  1918. }
  1919. hspi->State= HAL_SPI_STATE_READY;
  1920. /* Process Unlocked */
  1921. __HAL_UNLOCK(hspi);
  1922. return HAL_TIMEOUT;
  1923. }
  1924. }
  1925. }
  1926. }
  1927. return HAL_OK;
  1928. }
  1929. /**
  1930. * @}
  1931. */
  1932. #endif /* HAL_SPI_MODULE_ENABLED */
  1933. /**
  1934. * @}
  1935. */
  1936. /**
  1937. * @}
  1938. */
  1939. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/