PciVnaEmul/constr/xilinx_pcie_7x_ep_x1g1.xdc

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##-----------------------------------------------------------------------------
## Project    : Series-7 Integrated Block for PCI Express
## File       : xilinx_pcie_7x_ep_x1g1.xdc
## Version    : 3.3
#
###############################################################################
# User Configuration
# Link Width   - x1
# Link Speed   - gen1
# Family       - artix7
# Part         - xc7a100t
# Package      - fgg484
# Speed grade  - -2
# PCIe Block   - X0Y0
###############################################################################
#
###############################################################################
# User Time Names / User Time Groups / Time Specs
###############################################################################

###############################################################################
# User Physical Constraints
###############################################################################


###############################################################################
# Pinout and Related I/O Constraints
###############################################################################

#
# SYS reset (input) signal.  The sys_reset_n signal should be
# obtained from the PCI Express interface if possible.  For
# slot based form factors, a system reset signal is usually
# present on the connector.  For cable based form factors, a
# system reset signal may not be available.  In this case, the
# system reset signal must be generated locally by some form of
# supervisory circuit.  You may change the IOSTANDARD and LOC
# to suit your requirements and VCCO voltage banking rules.
# Some 7 series devices do not have 3.3 V I/Os available.
# Therefore the appropriate level shift is required to operate
# with these devices that contain only 1.8 V banks.
#

set_property IOSTANDARD LVCMOS33 [get_ports sys_rst_n]
set_property PULLTYPE PULLUP [get_ports sys_rst_n]

###############################################################################
# Physical Constraints
###############################################################################
#
# SYS clock 100 MHz (input) signal. The sys_clk_p and sys_clk_n
# signals are the PCI Express reference clock. Virtex-7 GT
# Transceiver architecture requires the use of a dedicated clock
# resources (FPGA input pins) associated with each GT Transceiver.
# To use these pins an IBUFDS primitive (refclk_ibuf) is
# instantiated in user's design.
# Please refer to the Virtex-7 GT Transceiver User Guide
# (UG) for guidelines regarding clock resource selection.
#

set_property LOC IBUFDS_GTE2_X0Y3 [get_cells refclk_ibuf]

###############################################################################
# Timing Constraints
###############################################################################
#
create_clock -period 10.000 -name sys_clk [get_ports sys_clk_p]
#
#
set_false_path -to [get_pins {pcie1234_support_i/pipe_clock_i/pclk_i1_bufgctrl.pclk_i1/S0}]
set_false_path -to [get_pins {pcie1234_support_i/pipe_clock_i/pclk_i1_bufgctrl.pclk_i1/S1}]
#
#
set_case_analysis 1 [get_pins {pcie1234_support_i/pipe_clock_i/pclk_i1_bufgctrl.pclk_i1/S0}]
set_case_analysis 0 [get_pins {pcie1234_support_i/pipe_clock_i/pclk_i1_bufgctrl.pclk_i1/S1}]
set_property DONT_TOUCH true [get_cells -of [get_nets -of [get_pins {pcie1234_support_i/pipe_clock_i/pclk_i1_bufgctrl.pclk_i1/S0}]]]

#
#
# Timing ignoring the below pins to avoid CDC analysis, but care has been taken in RTL to sync properly to other clock domain.
#
#
##############################################################################
# Tandem Configuration Constraints
###############################################################################

set_false_path -from [get_ports sys_rst_n]

###############################################################################
# End
###############################################################################

set_property PACKAGE_PIN F10 [get_ports sys_clk_p]
set_property PACKAGE_PIN J20 [get_ports sys_rst_n]
set_property LOC GTPE2_CHANNEL_X0Y4 [get_cells {EP/pcie1234_support/pcie1234_i/inst/inst/gt_top.gt_top_i/pipe_wrapper_i/pipe_lane[1].gt_wrapper_i/gtp_channel.gtpe2_channel_i}]
set_property PACKAGE_PIN A8 [get_ports {pci_exp_rxn[1]}]
set_property PACKAGE_PIN B8 [get_ports {pci_exp_rxp[1]}]
set_property DRIVE 12 [get_ports {pci_exp_txn[1]}]
set_property LOC GTPE2_CHANNEL_X0Y5 [get_cells {EP/pcie1234_support/pcie1234_i/inst/inst/gt_top.gt_top_i/pipe_wrapper_i/pipe_lane[0].gt_wrapper_i/gtp_channel.gtpe2_channel_i}]
set_property PACKAGE_PIN C11 [get_ports {pci_exp_rxn[0]}]

set_property LOC GTPE2_CHANNEL_X0Y4 [get_cells {PciVnaEmulTop/pcie1234_support/pcie1234_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[1].gt_wrapper_i/gtp_channel.gtpe2_channel_i}]

set_property LOC GTPE2_CHANNEL_X0Y5 [get_cells {PciVnaEmulTop/pcie1234_support/pcie1234_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[0].gt_wrapper_i/gtp_channel.gtpe2_channel_i}]



connect_debug_port u_ila_0/clk [get_nets [list EP/pcie1234_support/pipe_clock_i/pclk_sel_reg_0]]
connect_debug_port u_ila_0/probe0 [get_nets [list {EP/pcie1234_support/pclk_sel_reg1_reg[1][0]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][1]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][2]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][3]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][4]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][5]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][6]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][7]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][8]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][9]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][10]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][11]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][12]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][13]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][14]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][15]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][16]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][17]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][18]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][19]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][20]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][21]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][22]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][23]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][24]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][25]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][26]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][27]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][28]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][29]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][30]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][31]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][32]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][33]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][34]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][35]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][36]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][37]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][38]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][39]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][40]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][41]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][42]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][43]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][44]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][45]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][46]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][47]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][48]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][49]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][50]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][51]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][52]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][53]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][54]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][55]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][56]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][57]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][58]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][59]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][60]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][61]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][62]} {EP/pcie1234_support/pclk_sel_reg1_reg[1][63]}]]
connect_debug_port dbg_hub/clk [get_nets u_ila_0_pclk_sel_reg_0]




connect_debug_port u_ila_0/probe10 [get_nets [list EP/app/PIO/PIO_EP_inst/IntermediateLogic/valToCfgPos]]




connect_debug_port u_ila_0/probe11 [get_nets [list {FPGA_M/PGen[3].TestPgen/nextState[0]}]]
connect_debug_port u_ila_0/probe19 [get_nets [list {FPGA_M/PGen[3].TestPgen/delayDone0}]]
connect_debug_port u_ila_0/probe29 [get_nets [list {FPGA_M/PGen[3].TestPgen/patternDone1}]]
connect_debug_port u_ila_0/probe39 [get_nets [list {FPGA_M/PGen[0].TestPgen/delayDone0}]]

connect_debug_port u_ila_0/probe2 [get_nets [list {FPGA_M/PGen[0].TestPgen/currState[0]} {FPGA_M/PGen[0].TestPgen/currState[1]}]]
connect_debug_port u_ila_0/probe3 [get_nets [list {FPGA_M/PGen[3].TestPgen/currState[0]} {FPGA_M/PGen[3].TestPgen/currState[1]}]]
connect_debug_port u_ila_0/probe4 [get_nets [list {FPGA_M/PGen[0].TestPgen/currWidthValue[0]}]]
connect_debug_port u_ila_0/probe5 [get_nets [list {FPGA_M/PGen[3].TestPgen/delayCnt_reg[0]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[1]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[2]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[3]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[4]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[5]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[6]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[7]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[8]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[9]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[10]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[11]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[12]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[13]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[14]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[15]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[16]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[17]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[18]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[19]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[20]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[21]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[22]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[23]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[24]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[25]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[26]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[27]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[28]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[29]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[30]} {FPGA_M/PGen[3].TestPgen/delayCnt_reg[31]}]]
connect_debug_port u_ila_0/probe6 [get_nets [list {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[0]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[1]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[2]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[3]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[4]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[5]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[6]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[7]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[8]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[9]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[10]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[11]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[12]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[13]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[14]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[15]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[16]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[17]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[18]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[19]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[20]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[21]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[22]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[23]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[24]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[25]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[26]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[27]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[28]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[29]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[30]} {FPGA_M/PGen[3].TestPgen/pulseCnt_reg[31]}]]
connect_debug_port u_ila_0/probe7 [get_nets [list {FPGA_M/PGen[3].TestPgen/widthCnt_reg[0]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[1]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[2]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[3]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[4]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[5]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[6]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[7]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[8]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[9]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[10]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[11]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[12]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[13]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[14]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[15]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[16]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[17]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[18]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[19]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[20]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[21]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[22]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[23]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[24]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[25]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[26]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[27]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[28]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[29]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[30]} {FPGA_M/PGen[3].TestPgen/widthCnt_reg[31]}]]
connect_debug_port u_ila_0/probe8 [get_nets [list {FPGA_M/PGen[0].TestPgen/nextState[0]} {FPGA_M/PGen[0].TestPgen/nextState[1]}]]
connect_debug_port u_ila_0/probe9 [get_nets [list {FPGA_M/PGen[3].TestPgen/currWidthValue[0]}]]
connect_debug_port u_ila_0/probe10 [get_nets [list {FPGA_M/PGen[0].TestPgen/delayCnt_reg[0]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[1]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[2]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[3]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[4]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[5]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[6]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[7]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[8]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[9]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[10]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[11]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[12]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[13]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[14]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[15]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[16]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[17]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[18]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[19]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[20]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[21]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[22]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[23]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[24]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[25]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[26]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[27]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[28]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[29]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[30]} {FPGA_M/PGen[0].TestPgen/delayCnt_reg[31]}]]
connect_debug_port u_ila_0/probe11 [get_nets [list {FPGA_M/PGen[0].TestPgen/widthCnt_reg[0]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[1]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[2]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[3]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[4]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[5]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[6]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[7]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[8]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[9]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[10]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[11]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[12]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[13]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[14]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[15]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[16]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[17]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[18]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[19]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[20]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[21]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[22]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[23]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[24]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[25]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[26]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[27]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[28]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[29]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[30]} {FPGA_M/PGen[0].TestPgen/widthCnt_reg[31]}]]
connect_debug_port u_ila_0/probe19 [get_nets [list {FPGA_M/PGen[0].TestPgen/EnPulse_i}]]
connect_debug_port u_ila_0/probe20 [get_nets [list {FPGA_M/PGen[3].TestPgen/EnPulse_i}]]
connect_debug_port u_ila_0/probe21 [get_nets [list {FPGA_M/PGen[0].TestPgen/enPulseR}]]
connect_debug_port u_ila_0/probe22 [get_nets [list {FPGA_M/PGen[3].TestPgen/enPulseR}]]
connect_debug_port u_ila_0/probe23 [get_nets [list {FPGA_M/PGen[0].TestPgen/enPulseR_reg_n_0}]]
connect_debug_port u_ila_0/probe31 [get_nets [list {FPGA_M/PGen[3].TestPgen/Pulse_o}]]
connect_debug_port u_ila_0/probe32 [get_nets [list {FPGA_M/PGen[0].TestPgen/Pulse_o}]]
connect_debug_port u_ila_0/probe33 [get_nets [list {FPGA_M/PGen[0].TestPgen/pulseDone0}]]
connect_debug_port u_ila_0/probe34 [get_nets [list {FPGA_M/PGen[3].TestPgen/pulseDone0}]]



connect_debug_port u_ila_0/clk [get_nets [list EP/pcie1234_support/pipe_clock_i/CLK_PCLK]]
connect_debug_port dbg_hub/clk [get_nets u_ila_0_CLK_PCLK]



create_debug_core u_ila_0 ila
set_property ALL_PROBE_SAME_MU true [get_debug_cores u_ila_0]
set_property ALL_PROBE_SAME_MU_CNT 1 [get_debug_cores u_ila_0]
set_property C_ADV_TRIGGER false [get_debug_cores u_ila_0]
set_property C_DATA_DEPTH 2048 [get_debug_cores u_ila_0]
set_property C_EN_STRG_QUAL false [get_debug_cores u_ila_0]
set_property C_INPUT_PIPE_STAGES 0 [get_debug_cores u_ila_0]
set_property C_TRIGIN_EN false [get_debug_cores u_ila_0]
set_property C_TRIGOUT_EN false [get_debug_cores u_ila_0]
set_property port_width 1 [get_debug_ports u_ila_0/clk]
connect_debug_port u_ila_0/clk [get_nets [list EP/pcie1234_support/pipe_clock_i/pclk_i1_bufgctrl.pclk_i1_0]]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe0]
set_property port_width 288 [get_debug_ports u_ila_0/probe0]
connect_debug_port u_ila_0/probe0 [get_nets [list {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[0]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[1]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[2]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[3]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[4]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[5]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[6]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[7]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[8]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[9]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[10]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[11]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[12]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[13]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[14]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[15]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[16]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[17]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[18]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[19]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[20]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[21]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[22]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[23]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[24]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[25]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[26]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[27]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[28]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[29]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[30]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[31]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[32]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[33]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[34]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[35]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[36]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[37]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[38]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[39]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[40]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[41]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[42]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[43]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[44]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[45]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[46]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[47]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[48]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[49]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[50]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[51]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[52]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[53]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[54]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[55]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[56]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[57]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[58]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[59]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[60]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[61]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[62]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[63]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[64]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[65]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[66]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[67]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[68]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[69]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[70]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[71]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[72]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[73]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[74]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[75]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[76]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[77]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[78]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[79]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[80]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[81]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[82]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[83]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[84]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[85]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[86]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[87]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[88]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[89]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[90]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[91]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[92]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[93]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[94]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[95]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[96]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[97]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[98]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[99]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[100]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[101]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[102]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[103]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[104]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[105]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[106]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[107]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[108]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[109]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[110]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[111]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[112]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[113]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[114]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[115]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[116]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[117]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[118]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[119]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[120]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[121]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[122]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[123]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[124]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[125]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[126]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[127]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[128]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[129]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[130]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[131]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[132]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[133]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[134]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[135]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[136]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[137]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[138]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[139]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[140]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[141]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[142]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[143]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[144]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[145]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[146]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[147]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[148]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[149]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[150]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[151]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[152]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[153]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[154]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[155]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[156]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[157]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[158]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[159]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[160]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[161]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[162]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[163]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[164]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[165]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[166]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[167]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[168]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[169]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[170]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[171]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[172]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[173]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[174]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[175]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[176]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[177]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[178]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[179]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[180]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[181]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[182]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[183]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[184]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[185]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[186]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[187]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[188]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[189]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[190]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[191]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[192]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[193]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[194]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[195]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[196]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[197]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[198]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[199]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[200]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[201]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[202]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[203]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[204]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[205]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[206]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[207]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[208]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[209]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[210]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[211]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[212]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[213]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[214]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[215]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[216]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[217]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[218]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[219]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[220]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[221]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[222]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[223]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[224]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[225]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[226]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[227]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[228]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[229]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[230]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[231]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[232]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[233]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[234]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[235]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[236]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[237]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[238]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[239]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[240]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[241]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[242]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[243]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[244]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[245]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[246]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[247]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[248]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[249]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[250]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[251]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[252]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[253]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[254]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[255]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[256]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[257]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[258]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[259]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[260]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[261]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[262]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[263]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[264]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[265]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[266]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[267]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[268]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[269]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[270]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[271]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[272]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[273]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[274]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[275]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[276]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[277]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[278]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[279]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[280]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[281]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[282]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[283]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[284]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[285]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[286]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasData_i[287]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe1]
set_property port_width 288 [get_debug_ports u_ila_0/probe1]
connect_debug_port u_ila_0/probe1 [get_nets [list {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[0]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[1]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[2]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[3]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[4]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[5]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[6]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[7]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[8]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[9]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[10]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[11]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[12]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[13]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[14]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[15]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[16]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[17]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[18]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[19]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[20]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[21]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[22]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[23]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[24]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[25]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[26]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[27]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[28]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[29]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[30]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[31]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[32]} 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{EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[50]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[51]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[52]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[53]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[54]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[55]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[56]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[57]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[58]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[59]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[60]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[61]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[62]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[63]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[64]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[65]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[66]} 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{EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[203]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[204]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[205]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[206]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[207]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[208]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[209]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[210]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[211]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[212]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[213]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[214]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[215]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[216]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[217]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[218]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[219]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[220]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[221]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[222]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[223]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[224]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[225]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[226]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[227]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[228]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[229]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[230]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[231]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[232]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[233]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[234]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[235]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[236]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[237]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[238]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[239]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[240]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[241]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[242]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[243]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[244]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[245]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[246]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[247]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[248]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[249]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[250]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[251]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[252]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[253]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[254]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[255]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[256]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[257]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[258]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[259]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[260]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[261]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[262]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[263]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[264]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[265]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[266]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[267]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[268]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[269]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[270]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[271]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[272]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[273]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[274]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[275]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[276]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[277]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[278]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[279]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[280]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[281]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[282]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[283]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[284]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[285]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[286]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDataR[287]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe2]
set_property port_width 4 [get_debug_ports u_ila_0/probe2]
connect_debug_port u_ila_0/probe2 [get_nets [list {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDwCnt_reg[0]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDwCnt_reg[1]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDwCnt_reg[2]} {EP/app/PIO/PIO_EP_inst/IntermediateLogic/measDwCnt_reg[3]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe3]
set_property port_width 32 [get_debug_ports u_ila_0/probe3]
connect_debug_port u_ila_0/probe3 [get_nets [list {EP/app/PIO/PIO_EP_inst/rd_data[0]} {EP/app/PIO/PIO_EP_inst/rd_data[1]} {EP/app/PIO/PIO_EP_inst/rd_data[2]} {EP/app/PIO/PIO_EP_inst/rd_data[3]} {EP/app/PIO/PIO_EP_inst/rd_data[4]} {EP/app/PIO/PIO_EP_inst/rd_data[5]} {EP/app/PIO/PIO_EP_inst/rd_data[6]} {EP/app/PIO/PIO_EP_inst/rd_data[7]} {EP/app/PIO/PIO_EP_inst/rd_data[8]} {EP/app/PIO/PIO_EP_inst/rd_data[9]} {EP/app/PIO/PIO_EP_inst/rd_data[10]} {EP/app/PIO/PIO_EP_inst/rd_data[11]} {EP/app/PIO/PIO_EP_inst/rd_data[12]} {EP/app/PIO/PIO_EP_inst/rd_data[13]} {EP/app/PIO/PIO_EP_inst/rd_data[14]} {EP/app/PIO/PIO_EP_inst/rd_data[15]} {EP/app/PIO/PIO_EP_inst/rd_data[16]} {EP/app/PIO/PIO_EP_inst/rd_data[17]} {EP/app/PIO/PIO_EP_inst/rd_data[18]} {EP/app/PIO/PIO_EP_inst/rd_data[19]} {EP/app/PIO/PIO_EP_inst/rd_data[20]} {EP/app/PIO/PIO_EP_inst/rd_data[21]} {EP/app/PIO/PIO_EP_inst/rd_data[22]} {EP/app/PIO/PIO_EP_inst/rd_data[23]} {EP/app/PIO/PIO_EP_inst/rd_data[24]} {EP/app/PIO/PIO_EP_inst/rd_data[25]} {EP/app/PIO/PIO_EP_inst/rd_data[26]} {EP/app/PIO/PIO_EP_inst/rd_data[27]} {EP/app/PIO/PIO_EP_inst/rd_data[28]} {EP/app/PIO/PIO_EP_inst/rd_data[29]} {EP/app/PIO/PIO_EP_inst/rd_data[30]} {EP/app/PIO/PIO_EP_inst/rd_data[31]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe4]
set_property port_width 288 [get_debug_ports u_ila_0/probe4]
connect_debug_port u_ila_0/probe4 [get_nets [list {EP/app/PIO/PIO_EP_inst/MeasData_o[0]} {EP/app/PIO/PIO_EP_inst/MeasData_o[1]} {EP/app/PIO/PIO_EP_inst/MeasData_o[2]} {EP/app/PIO/PIO_EP_inst/MeasData_o[3]} {EP/app/PIO/PIO_EP_inst/MeasData_o[4]} {EP/app/PIO/PIO_EP_inst/MeasData_o[5]} {EP/app/PIO/PIO_EP_inst/MeasData_o[6]} {EP/app/PIO/PIO_EP_inst/MeasData_o[7]} {EP/app/PIO/PIO_EP_inst/MeasData_o[8]} {EP/app/PIO/PIO_EP_inst/MeasData_o[9]} {EP/app/PIO/PIO_EP_inst/MeasData_o[10]} {EP/app/PIO/PIO_EP_inst/MeasData_o[11]} {EP/app/PIO/PIO_EP_inst/MeasData_o[12]} {EP/app/PIO/PIO_EP_inst/MeasData_o[13]} {EP/app/PIO/PIO_EP_inst/MeasData_o[14]} {EP/app/PIO/PIO_EP_inst/MeasData_o[15]} {EP/app/PIO/PIO_EP_inst/MeasData_o[16]} {EP/app/PIO/PIO_EP_inst/MeasData_o[17]} {EP/app/PIO/PIO_EP_inst/MeasData_o[18]} {EP/app/PIO/PIO_EP_inst/MeasData_o[19]} {EP/app/PIO/PIO_EP_inst/MeasData_o[20]} {EP/app/PIO/PIO_EP_inst/MeasData_o[21]} {EP/app/PIO/PIO_EP_inst/MeasData_o[22]} {EP/app/PIO/PIO_EP_inst/MeasData_o[23]} {EP/app/PIO/PIO_EP_inst/MeasData_o[24]} {EP/app/PIO/PIO_EP_inst/MeasData_o[25]} {EP/app/PIO/PIO_EP_inst/MeasData_o[26]} {EP/app/PIO/PIO_EP_inst/MeasData_o[27]} {EP/app/PIO/PIO_EP_inst/MeasData_o[28]} {EP/app/PIO/PIO_EP_inst/MeasData_o[29]} {EP/app/PIO/PIO_EP_inst/MeasData_o[30]} {EP/app/PIO/PIO_EP_inst/MeasData_o[31]} {EP/app/PIO/PIO_EP_inst/MeasData_o[32]} {EP/app/PIO/PIO_EP_inst/MeasData_o[33]} {EP/app/PIO/PIO_EP_inst/MeasData_o[34]} {EP/app/PIO/PIO_EP_inst/MeasData_o[35]} {EP/app/PIO/PIO_EP_inst/MeasData_o[36]} {EP/app/PIO/PIO_EP_inst/MeasData_o[37]} {EP/app/PIO/PIO_EP_inst/MeasData_o[38]} {EP/app/PIO/PIO_EP_inst/MeasData_o[39]} {EP/app/PIO/PIO_EP_inst/MeasData_o[40]} {EP/app/PIO/PIO_EP_inst/MeasData_o[41]} {EP/app/PIO/PIO_EP_inst/MeasData_o[42]} {EP/app/PIO/PIO_EP_inst/MeasData_o[43]} {EP/app/PIO/PIO_EP_inst/MeasData_o[44]} {EP/app/PIO/PIO_EP_inst/MeasData_o[45]} {EP/app/PIO/PIO_EP_inst/MeasData_o[46]} {EP/app/PIO/PIO_EP_inst/MeasData_o[47]} {EP/app/PIO/PIO_EP_inst/MeasData_o[48]} {EP/app/PIO/PIO_EP_inst/MeasData_o[49]} {EP/app/PIO/PIO_EP_inst/MeasData_o[50]} {EP/app/PIO/PIO_EP_inst/MeasData_o[51]} {EP/app/PIO/PIO_EP_inst/MeasData_o[52]} {EP/app/PIO/PIO_EP_inst/MeasData_o[53]} {EP/app/PIO/PIO_EP_inst/MeasData_o[54]} {EP/app/PIO/PIO_EP_inst/MeasData_o[55]} {EP/app/PIO/PIO_EP_inst/MeasData_o[56]} {EP/app/PIO/PIO_EP_inst/MeasData_o[57]} {EP/app/PIO/PIO_EP_inst/MeasData_o[58]} {EP/app/PIO/PIO_EP_inst/MeasData_o[59]} {EP/app/PIO/PIO_EP_inst/MeasData_o[60]} {EP/app/PIO/PIO_EP_inst/MeasData_o[61]} {EP/app/PIO/PIO_EP_inst/MeasData_o[62]} {EP/app/PIO/PIO_EP_inst/MeasData_o[63]} {EP/app/PIO/PIO_EP_inst/MeasData_o[64]} {EP/app/PIO/PIO_EP_inst/MeasData_o[65]} {EP/app/PIO/PIO_EP_inst/MeasData_o[66]} {EP/app/PIO/PIO_EP_inst/MeasData_o[67]} {EP/app/PIO/PIO_EP_inst/MeasData_o[68]} {EP/app/PIO/PIO_EP_inst/MeasData_o[69]} {EP/app/PIO/PIO_EP_inst/MeasData_o[70]} {EP/app/PIO/PIO_EP_inst/MeasData_o[71]} {EP/app/PIO/PIO_EP_inst/MeasData_o[72]} {EP/app/PIO/PIO_EP_inst/MeasData_o[73]} {EP/app/PIO/PIO_EP_inst/MeasData_o[74]} {EP/app/PIO/PIO_EP_inst/MeasData_o[75]} {EP/app/PIO/PIO_EP_inst/MeasData_o[76]} {EP/app/PIO/PIO_EP_inst/MeasData_o[77]} {EP/app/PIO/PIO_EP_inst/MeasData_o[78]} {EP/app/PIO/PIO_EP_inst/MeasData_o[79]} {EP/app/PIO/PIO_EP_inst/MeasData_o[80]} {EP/app/PIO/PIO_EP_inst/MeasData_o[81]} {EP/app/PIO/PIO_EP_inst/MeasData_o[82]} {EP/app/PIO/PIO_EP_inst/MeasData_o[83]} {EP/app/PIO/PIO_EP_inst/MeasData_o[84]} {EP/app/PIO/PIO_EP_inst/MeasData_o[85]} {EP/app/PIO/PIO_EP_inst/MeasData_o[86]} {EP/app/PIO/PIO_EP_inst/MeasData_o[87]} {EP/app/PIO/PIO_EP_inst/MeasData_o[88]} {EP/app/PIO/PIO_EP_inst/MeasData_o[89]} {EP/app/PIO/PIO_EP_inst/MeasData_o[90]} {EP/app/PIO/PIO_EP_inst/MeasData_o[91]} {EP/app/PIO/PIO_EP_inst/MeasData_o[92]} {EP/app/PIO/PIO_EP_inst/MeasData_o[93]} {EP/app/PIO/PIO_EP_inst/MeasData_o[94]} {EP/app/PIO/PIO_EP_inst/MeasData_o[95]} {EP/app/PIO/PIO_EP_inst/MeasData_o[96]} {EP/app/PIO/PIO_EP_inst/MeasData_o[97]} {EP/app/PIO/PIO_EP_inst/MeasData_o[98]} {EP/app/PIO/PIO_EP_inst/MeasData_o[99]} {EP/app/PIO/PIO_EP_inst/MeasData_o[100]} {EP/app/PIO/PIO_EP_inst/MeasData_o[101]} {EP/app/PIO/PIO_EP_inst/MeasData_o[102]} {EP/app/PIO/PIO_EP_inst/MeasData_o[103]} {EP/app/PIO/PIO_EP_inst/MeasData_o[104]} {EP/app/PIO/PIO_EP_inst/MeasData_o[105]} {EP/app/PIO/PIO_EP_inst/MeasData_o[106]} {EP/app/PIO/PIO_EP_inst/MeasData_o[107]} {EP/app/PIO/PIO_EP_inst/MeasData_o[108]} {EP/app/PIO/PIO_EP_inst/MeasData_o[109]} {EP/app/PIO/PIO_EP_inst/MeasData_o[110]} {EP/app/PIO/PIO_EP_inst/MeasData_o[111]} {EP/app/PIO/PIO_EP_inst/MeasData_o[112]} {EP/app/PIO/PIO_EP_inst/MeasData_o[113]} {EP/app/PIO/PIO_EP_inst/MeasData_o[114]} {EP/app/PIO/PIO_EP_inst/MeasData_o[115]} {EP/app/PIO/PIO_EP_inst/MeasData_o[116]} {EP/app/PIO/PIO_EP_inst/MeasData_o[117]} {EP/app/PIO/PIO_EP_inst/MeasData_o[118]} {EP/app/PIO/PIO_EP_inst/MeasData_o[119]} {EP/app/PIO/PIO_EP_inst/MeasData_o[120]} {EP/app/PIO/PIO_EP_inst/MeasData_o[121]} {EP/app/PIO/PIO_EP_inst/MeasData_o[122]} {EP/app/PIO/PIO_EP_inst/MeasData_o[123]} {EP/app/PIO/PIO_EP_inst/MeasData_o[124]} {EP/app/PIO/PIO_EP_inst/MeasData_o[125]} {EP/app/PIO/PIO_EP_inst/MeasData_o[126]} {EP/app/PIO/PIO_EP_inst/MeasData_o[127]} {EP/app/PIO/PIO_EP_inst/MeasData_o[128]} {EP/app/PIO/PIO_EP_inst/MeasData_o[129]} {EP/app/PIO/PIO_EP_inst/MeasData_o[130]} {EP/app/PIO/PIO_EP_inst/MeasData_o[131]} {EP/app/PIO/PIO_EP_inst/MeasData_o[132]} {EP/app/PIO/PIO_EP_inst/MeasData_o[133]} {EP/app/PIO/PIO_EP_inst/MeasData_o[134]} {EP/app/PIO/PIO_EP_inst/MeasData_o[135]} {EP/app/PIO/PIO_EP_inst/MeasData_o[136]} {EP/app/PIO/PIO_EP_inst/MeasData_o[137]} {EP/app/PIO/PIO_EP_inst/MeasData_o[138]} {EP/app/PIO/PIO_EP_inst/MeasData_o[139]} {EP/app/PIO/PIO_EP_inst/MeasData_o[140]} {EP/app/PIO/PIO_EP_inst/MeasData_o[141]} {EP/app/PIO/PIO_EP_inst/MeasData_o[142]} {EP/app/PIO/PIO_EP_inst/MeasData_o[143]} {EP/app/PIO/PIO_EP_inst/MeasData_o[144]} {EP/app/PIO/PIO_EP_inst/MeasData_o[145]} {EP/app/PIO/PIO_EP_inst/MeasData_o[146]} {EP/app/PIO/PIO_EP_inst/MeasData_o[147]} {EP/app/PIO/PIO_EP_inst/MeasData_o[148]} {EP/app/PIO/PIO_EP_inst/MeasData_o[149]} {EP/app/PIO/PIO_EP_inst/MeasData_o[150]} {EP/app/PIO/PIO_EP_inst/MeasData_o[151]} {EP/app/PIO/PIO_EP_inst/MeasData_o[152]} {EP/app/PIO/PIO_EP_inst/MeasData_o[153]} {EP/app/PIO/PIO_EP_inst/MeasData_o[154]} {EP/app/PIO/PIO_EP_inst/MeasData_o[155]} {EP/app/PIO/PIO_EP_inst/MeasData_o[156]} {EP/app/PIO/PIO_EP_inst/MeasData_o[157]} {EP/app/PIO/PIO_EP_inst/MeasData_o[158]} {EP/app/PIO/PIO_EP_inst/MeasData_o[159]} {EP/app/PIO/PIO_EP_inst/MeasData_o[160]} {EP/app/PIO/PIO_EP_inst/MeasData_o[161]} {EP/app/PIO/PIO_EP_inst/MeasData_o[162]} {EP/app/PIO/PIO_EP_inst/MeasData_o[163]} {EP/app/PIO/PIO_EP_inst/MeasData_o[164]} {EP/app/PIO/PIO_EP_inst/MeasData_o[165]} {EP/app/PIO/PIO_EP_inst/MeasData_o[166]} {EP/app/PIO/PIO_EP_inst/MeasData_o[167]} {EP/app/PIO/PIO_EP_inst/MeasData_o[168]} {EP/app/PIO/PIO_EP_inst/MeasData_o[169]} {EP/app/PIO/PIO_EP_inst/MeasData_o[170]} {EP/app/PIO/PIO_EP_inst/MeasData_o[171]} {EP/app/PIO/PIO_EP_inst/MeasData_o[172]} {EP/app/PIO/PIO_EP_inst/MeasData_o[173]} {EP/app/PIO/PIO_EP_inst/MeasData_o[174]} {EP/app/PIO/PIO_EP_inst/MeasData_o[175]} {EP/app/PIO/PIO_EP_inst/MeasData_o[176]} {EP/app/PIO/PIO_EP_inst/MeasData_o[177]} {EP/app/PIO/PIO_EP_inst/MeasData_o[178]} {EP/app/PIO/PIO_EP_inst/MeasData_o[179]} {EP/app/PIO/PIO_EP_inst/MeasData_o[180]} {EP/app/PIO/PIO_EP_inst/MeasData_o[181]} {EP/app/PIO/PIO_EP_inst/MeasData_o[182]} {EP/app/PIO/PIO_EP_inst/MeasData_o[183]} {EP/app/PIO/PIO_EP_inst/MeasData_o[184]} {EP/app/PIO/PIO_EP_inst/MeasData_o[185]} {EP/app/PIO/PIO_EP_inst/MeasData_o[186]} {EP/app/PIO/PIO_EP_inst/MeasData_o[187]} {EP/app/PIO/PIO_EP_inst/MeasData_o[188]} {EP/app/PIO/PIO_EP_inst/MeasData_o[189]} {EP/app/PIO/PIO_EP_inst/MeasData_o[190]} {EP/app/PIO/PIO_EP_inst/MeasData_o[191]} {EP/app/PIO/PIO_EP_inst/MeasData_o[192]} {EP/app/PIO/PIO_EP_inst/MeasData_o[193]} {EP/app/PIO/PIO_EP_inst/MeasData_o[194]} {EP/app/PIO/PIO_EP_inst/MeasData_o[195]} {EP/app/PIO/PIO_EP_inst/MeasData_o[196]} {EP/app/PIO/PIO_EP_inst/MeasData_o[197]} {EP/app/PIO/PIO_EP_inst/MeasData_o[198]} {EP/app/PIO/PIO_EP_inst/MeasData_o[199]} {EP/app/PIO/PIO_EP_inst/MeasData_o[200]} {EP/app/PIO/PIO_EP_inst/MeasData_o[201]} {EP/app/PIO/PIO_EP_inst/MeasData_o[202]} {EP/app/PIO/PIO_EP_inst/MeasData_o[203]} {EP/app/PIO/PIO_EP_inst/MeasData_o[204]} {EP/app/PIO/PIO_EP_inst/MeasData_o[205]} {EP/app/PIO/PIO_EP_inst/MeasData_o[206]} {EP/app/PIO/PIO_EP_inst/MeasData_o[207]} {EP/app/PIO/PIO_EP_inst/MeasData_o[208]} {EP/app/PIO/PIO_EP_inst/MeasData_o[209]} {EP/app/PIO/PIO_EP_inst/MeasData_o[210]} {EP/app/PIO/PIO_EP_inst/MeasData_o[211]} {EP/app/PIO/PIO_EP_inst/MeasData_o[212]} {EP/app/PIO/PIO_EP_inst/MeasData_o[213]} {EP/app/PIO/PIO_EP_inst/MeasData_o[214]} {EP/app/PIO/PIO_EP_inst/MeasData_o[215]} {EP/app/PIO/PIO_EP_inst/MeasData_o[216]} {EP/app/PIO/PIO_EP_inst/MeasData_o[217]} {EP/app/PIO/PIO_EP_inst/MeasData_o[218]} {EP/app/PIO/PIO_EP_inst/MeasData_o[219]} {EP/app/PIO/PIO_EP_inst/MeasData_o[220]} {EP/app/PIO/PIO_EP_inst/MeasData_o[221]} {EP/app/PIO/PIO_EP_inst/MeasData_o[222]} {EP/app/PIO/PIO_EP_inst/MeasData_o[223]} {EP/app/PIO/PIO_EP_inst/MeasData_o[224]} {EP/app/PIO/PIO_EP_inst/MeasData_o[225]} {EP/app/PIO/PIO_EP_inst/MeasData_o[226]} {EP/app/PIO/PIO_EP_inst/MeasData_o[227]} {EP/app/PIO/PIO_EP_inst/MeasData_o[228]} {EP/app/PIO/PIO_EP_inst/MeasData_o[229]} {EP/app/PIO/PIO_EP_inst/MeasData_o[230]} {EP/app/PIO/PIO_EP_inst/MeasData_o[231]} {EP/app/PIO/PIO_EP_inst/MeasData_o[232]} {EP/app/PIO/PIO_EP_inst/MeasData_o[233]} {EP/app/PIO/PIO_EP_inst/MeasData_o[234]} {EP/app/PIO/PIO_EP_inst/MeasData_o[235]} {EP/app/PIO/PIO_EP_inst/MeasData_o[236]} {EP/app/PIO/PIO_EP_inst/MeasData_o[237]} {EP/app/PIO/PIO_EP_inst/MeasData_o[238]} {EP/app/PIO/PIO_EP_inst/MeasData_o[239]} {EP/app/PIO/PIO_EP_inst/MeasData_o[240]} {EP/app/PIO/PIO_EP_inst/MeasData_o[241]} {EP/app/PIO/PIO_EP_inst/MeasData_o[242]} {EP/app/PIO/PIO_EP_inst/MeasData_o[243]} {EP/app/PIO/PIO_EP_inst/MeasData_o[244]} {EP/app/PIO/PIO_EP_inst/MeasData_o[245]} {EP/app/PIO/PIO_EP_inst/MeasData_o[246]} {EP/app/PIO/PIO_EP_inst/MeasData_o[247]} {EP/app/PIO/PIO_EP_inst/MeasData_o[248]} {EP/app/PIO/PIO_EP_inst/MeasData_o[249]} {EP/app/PIO/PIO_EP_inst/MeasData_o[250]} {EP/app/PIO/PIO_EP_inst/MeasData_o[251]} {EP/app/PIO/PIO_EP_inst/MeasData_o[252]} {EP/app/PIO/PIO_EP_inst/MeasData_o[253]} {EP/app/PIO/PIO_EP_inst/MeasData_o[254]} {EP/app/PIO/PIO_EP_inst/MeasData_o[255]} {EP/app/PIO/PIO_EP_inst/MeasData_o[256]} {EP/app/PIO/PIO_EP_inst/MeasData_o[257]} {EP/app/PIO/PIO_EP_inst/MeasData_o[258]} {EP/app/PIO/PIO_EP_inst/MeasData_o[259]} {EP/app/PIO/PIO_EP_inst/MeasData_o[260]} {EP/app/PIO/PIO_EP_inst/MeasData_o[261]} {EP/app/PIO/PIO_EP_inst/MeasData_o[262]} {EP/app/PIO/PIO_EP_inst/MeasData_o[263]} {EP/app/PIO/PIO_EP_inst/MeasData_o[264]} {EP/app/PIO/PIO_EP_inst/MeasData_o[265]} {EP/app/PIO/PIO_EP_inst/MeasData_o[266]} {EP/app/PIO/PIO_EP_inst/MeasData_o[267]} {EP/app/PIO/PIO_EP_inst/MeasData_o[268]} {EP/app/PIO/PIO_EP_inst/MeasData_o[269]} {EP/app/PIO/PIO_EP_inst/MeasData_o[270]} {EP/app/PIO/PIO_EP_inst/MeasData_o[271]} {EP/app/PIO/PIO_EP_inst/MeasData_o[272]} {EP/app/PIO/PIO_EP_inst/MeasData_o[273]} {EP/app/PIO/PIO_EP_inst/MeasData_o[274]} {EP/app/PIO/PIO_EP_inst/MeasData_o[275]} {EP/app/PIO/PIO_EP_inst/MeasData_o[276]} {EP/app/PIO/PIO_EP_inst/MeasData_o[277]} {EP/app/PIO/PIO_EP_inst/MeasData_o[278]} {EP/app/PIO/PIO_EP_inst/MeasData_o[279]} {EP/app/PIO/PIO_EP_inst/MeasData_o[280]} {EP/app/PIO/PIO_EP_inst/MeasData_o[281]} {EP/app/PIO/PIO_EP_inst/MeasData_o[282]} {EP/app/PIO/PIO_EP_inst/MeasData_o[283]} {EP/app/PIO/PIO_EP_inst/MeasData_o[284]} {EP/app/PIO/PIO_EP_inst/MeasData_o[285]} {EP/app/PIO/PIO_EP_inst/MeasData_o[286]} {EP/app/PIO/PIO_EP_inst/MeasData_o[287]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe5]
set_property port_width 1 [get_debug_ports u_ila_0/probe5]
connect_debug_port u_ila_0/probe5 [get_nets [list endMeas]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe6]
set_property port_width 1 [get_debug_ports u_ila_0/probe6]
connect_debug_port u_ila_0/probe6 [get_nets [list EP/app/PIO/PIO_EP_inst/IntermediateLogic/fifoEmpty]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe7]
set_property port_width 1 [get_debug_ports u_ila_0/probe7]
connect_debug_port u_ila_0/probe7 [get_nets [list EP/app/PIO/PIO_EP_inst/IntermediateLogic/fifoFull]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe8]
set_property port_width 1 [get_debug_ports u_ila_0/probe8]
connect_debug_port u_ila_0/probe8 [get_nets [list EP/app/PIO/PIO_EP_inst/IntermediateLogic/MeasEnd_i]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe9]
set_property port_width 1 [get_debug_ports u_ila_0/probe9]
connect_debug_port u_ila_0/probe9 [get_nets [list FPGA_M/InternalDsp/MeasEnd_o]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe10]
set_property port_width 1 [get_debug_ports u_ila_0/probe10]
connect_debug_port u_ila_0/probe10 [get_nets [list EP/app/PIO/PIO_EP_inst/IntermediateLogic/measEndR]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe11]
set_property port_width 1 [get_debug_ports u_ila_0/probe11]
connect_debug_port u_ila_0/probe11 [get_nets [list EP/app/PIO/PIO_EP_inst/IntermediateLogic/measEndRR]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe12]
set_property port_width 1 [get_debug_ports u_ila_0/probe12]
connect_debug_port u_ila_0/probe12 [get_nets [list FPGA_M/measStart]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe13]
set_property port_width 1 [get_debug_ports u_ila_0/probe13]
connect_debug_port u_ila_0/probe13 [get_nets [list EP/app/PIO/PIO_EP_inst/IntermediateLogic/rdEn]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe14]
set_property port_width 1 [get_debug_ports u_ila_0/probe14]
connect_debug_port u_ila_0/probe14 [get_nets [list EP/app/PIO/PIO_EP_inst/req_compl]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe15]
set_property port_width 1 [get_debug_ports u_ila_0/probe15]
connect_debug_port u_ila_0/probe15 [get_nets [list EP/app/PIO/PIO_EP_inst/IntermediateLogic/Rst_i]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe16]
set_property port_width 1 [get_debug_ports u_ila_0/probe16]
connect_debug_port u_ila_0/probe16 [get_nets [list FPGA_M/startMeasSyncRR]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe17]
set_property port_width 1 [get_debug_ports u_ila_0/probe17]
connect_debug_port u_ila_0/probe17 [get_nets [list EP/app/PIO/PIO_EP_inst/valToCfgReg]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe18]
set_property port_width 1 [get_debug_ports u_ila_0/probe18]
connect_debug_port u_ila_0/probe18 [get_nets [list EP/app/PIO/PIO_EP_inst/valToMeasData]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe19]
set_property port_width 1 [get_debug_ports u_ila_0/probe19]
connect_debug_port u_ila_0/probe19 [get_nets [list EP/app/PIO/PIO_EP_inst/IntermediateLogic/wrEn]]
set_property C_CLK_INPUT_FREQ_HZ 300000000 [get_debug_cores dbg_hub]
set_property C_ENABLE_CLK_DIVIDER false [get_debug_cores dbg_hub]
set_property C_USER_SCAN_CHAIN 1 [get_debug_cores dbg_hub]
connect_debug_port dbg_hub/clk [get_nets u_ila_0_pclk_i1_bufgctrl.pclk_i1_0]