module CicDecimator #
(
    parameter InDataWidth = 18,
    parameter DECIM_WIDTH = 4 // Decimation factor width
)
(
    input logic                                 	Clk_i,
    input logic                                 	Rst_i,
    input logic            [DECIM_WIDTH-1:0]    	DecimFactor_i, 
    input logic     signed [InDataWidth-1:0]    	Data_i,
    input logic                                 	DataVal_i,

    output logic    signed [InDataWidth-1:0]    	Data_o,
    output logic                                	DataVal_o
);

//================================================================================
//								REG/WIRE
//================================================================================
logic           [DECIM_WIDTH -1 : 0 ]                  	decimCnt;
logic           [DECIM_WIDTH-1  : 0 ]                	decimFactor;

logic signed    [InDataWidth - 1 : 0]   			decimDataReg;
logic                                   			decimDataValReg;

//================================================================================
//								ASSIGNMENTS
//================================================================================
 /* If decimation factor is 1, just pass the data through */
assign Data_o       = (DecimFactor_i <= 1) ? Data_i     :   decimDataReg;
assign DataVal_o    = (DecimFactor_i <= 1) ? DataVal_i  :   decimDataValReg;

//================================================================================
//								CODING
//================================================================================
always_ff @(posedge Clk_i) begin 
    if (Rst_i) begin 
        decimCnt <= 0;
    end
    else begin 
        if (DataVal_i) begin
            if (decimCnt == DecimFactor_i - 1) begin
                decimCnt <= 0;
            end
            else begin
                decimCnt <= decimCnt + 1;
            end
        end  
    end
end

always_ff @(posedge Clk_i) begin 
    if (Rst_i) begin 
        decimDataReg <= 0;
        decimDataValReg <= 0;
    end
    else begin 
        if (DataVal_i) begin
            if (decimCnt == DecimFactor_i - 1) begin
                decimDataReg <= Data_i;
                decimDataValReg <= 1;
            end
            else begin
                decimDataValReg <= 0;
            end
        end
        else begin
            decimDataValReg <= 0; 
        end
    end
end

endmodule