module combFilterBlock 
#(
	parameter	M=4,
	parameter	inOutDataWidth	=	18,
	parameter	filteredDataWidth	=	25
)
(
	input Clk_i,
	input Rst_i,
	input [inOutDataWidth-1:0] Data_i,
	input DataNd_i,
	output [inOutDataWidth-1:0] Data_o,
	output DataValid_o
);


	
reg signed	[inOutDataWidth-1:0] sumResult;
reg	dataValid;
reg	signed	[inOutDataWidth-1:0] delData;

assign Data_o = sumResult;
assign DataValid_o = dataValid;
	
always @(posedge Clk_i) begin
	if (Rst_i) begin
		delData <= 0;
	end else begin
		if (DataNd_i) begin
			delData	<= Data_i;
		end
	end
end

always @(posedge Clk_i or posedge Rst_i) begin
	if (Rst_i) begin
		sumResult <= 0;
		dataValid <= 1'b0;
	end else begin
		if (DataNd_i) begin
			sumResult <= Data_i-delData;
			dataValid <= 1'b1;
		end else begin
			dataValid <= 1'b0;
		end
	end
end


endmodule