module CicBlock
#(
	parameter 	M = 1,			
	parameter	InDataWidth	=	14,
	parameter	OutDataWidth	=	15
)
(
	input Clk_i,
	input Rst_i,
	input [InDataWidth-1:0] Data_i,
	input DataNd_i,
	output [OutDataWidth-1:0] Data_o,
	output DataValid_o
);

wire	[OutDataWidth-1:0]	intFilteredData;
wire	intFilteredDataValid;
wire	intDataVal;

	intFilterBlock 
	#(	
		.InDataWidth	(InDataWidth),
		.OutDataWidth	(OutDataWidth)
	)
	intFilterBlockInst
	(
		.Clk_i(Clk_i),
		.Rst_i(Rst_i),
		.Data_i(Data_i),
		.DataNd_i(DataNd_i),
		.Data_o(intFilteredData),
		.DataValid_o(intFilteredDataValid)
	);
		
	combFilterBlock 
	#(	
		.M(M),
		.InOutDataWidth	(OutDataWidth)
	)
	combFilterBlockInst
	(
		.Clk_i(Clk_i),
		.Rst_i(Rst_i),
		.Data_i(intFilteredData),
		.DataNd_i(intFilteredDataValid),
		.Data_o(Data_o),
		.DataValid_o(DataValid_o)
	);

endmodule