|
|
@@ -22,7 +22,7 @@ module DecimFilterWrapper
|
|
|
#(
|
|
|
parameter AdcDataWidth = 14,
|
|
|
parameter N = 8,
|
|
|
- parameter M = 2,
|
|
|
+ parameter M = 1,
|
|
|
parameter FilteredDataWidth = 38,
|
|
|
parameter FirOutDataWidth = 48,
|
|
|
parameter FirOutCutBit = 42
|
|
|
@@ -37,6 +37,8 @@ module DecimFilterWrapper
|
|
|
input [24-1:0] IfFtwH_i,
|
|
|
|
|
|
input signed [AdcDataWidth-1:0] AdcData_i,
|
|
|
+ input signed [AdcDataWidth-1:0] DeltaPulse_i,
|
|
|
+ input DeltaPulseValid_i,
|
|
|
|
|
|
output signed [16-1:0] FilteredAdcDataI_o,
|
|
|
output signed [16-1:0] FilteredAdcDataQ_o,
|
|
|
@@ -88,10 +90,12 @@ module DecimFilterWrapper
|
|
|
reg [15:0] outDataI;
|
|
|
reg [15:0] outDataQ;
|
|
|
|
|
|
- reg [1:0] currState;
|
|
|
+(* DONT_TOUCH = "true" *) reg [1:0] currState;
|
|
|
reg [1:0] nextState;
|
|
|
|
|
|
- reg [2:0] decimFactorReg;
|
|
|
+(* DONT_TOUCH = "true" *)reg [2:0] decimFactorReg;
|
|
|
+(* DONT_TOUCH = "true" *)reg enReload;
|
|
|
+
|
|
|
|
|
|
reg [3:0] coeffCnt;
|
|
|
reg [4:0] delayCnt;
|
|
|
@@ -116,7 +120,7 @@ module DecimFilterWrapper
|
|
|
localparam CONFIG_STATE = 2'd3;
|
|
|
|
|
|
|
|
|
- localparam DELAY_VALUE = 2*8-1;
|
|
|
+ localparam DELAY_VALUE = 1;
|
|
|
|
|
|
wire [39:0] firData;
|
|
|
wire firDataVal;
|
|
|
@@ -125,7 +129,9 @@ module DecimFilterWrapper
|
|
|
//================================================================================
|
|
|
|
|
|
// assign FilteredAdcDataI_o = outDataI;
|
|
|
- assign FilteredAdcDataI_o = firData[33-:16];
|
|
|
+ assign FilteredAdcDataI_o = (DecimFactor_i == 3'd1 || DecimFactor_i == 3'd0 )? {{14{AdcData_i[AdcDataWidth-1]}},AdcData_i} :firData[33-:16];
|
|
|
+
|
|
|
+ // assign FilteredAdcDataI_o = (DecimFactor_i == 3'd0 || DecimFactor_i == 3'd1 ) ? ((firDataVal)? {AdcData_i,2'b0} : 16'h0 ) : firData[33-:16];
|
|
|
|
|
|
// assign FilteredDataVal_o = decimDataValIR;
|
|
|
assign FilteredDataVal_o = firDataVal;
|
|
|
@@ -148,6 +154,21 @@ always @(posedge Clk_i) begin
|
|
|
decimFactorReg <= DecimFactor_i;
|
|
|
end
|
|
|
|
|
|
+always @(posedge Clk_i) begin
|
|
|
+ if (Rst_i) begin
|
|
|
+ enReload <= 1'b0;
|
|
|
+ end
|
|
|
+ else begin
|
|
|
+ if (decimFactorReg != DecimFactor_i && (DecimFactor_i != 0 && DecimFactor_i != 1)) begin
|
|
|
+ enReload <= 1'b1;
|
|
|
+ end
|
|
|
+ else begin
|
|
|
+ enReload <= 1'b0;
|
|
|
+ end
|
|
|
+ end
|
|
|
+end
|
|
|
+
|
|
|
+
|
|
|
|
|
|
|
|
|
always @(posedge Clk_i) begin
|
|
|
@@ -278,7 +299,7 @@ always @(posedge Clk_i) begin
|
|
|
if (currState == RECONFIG) begin
|
|
|
coeffCnt <= coeffCnt + 1;
|
|
|
end
|
|
|
- else begin
|
|
|
+ else if (currState == IDLE) begin
|
|
|
coeffCnt <= 4'd0;
|
|
|
end
|
|
|
end
|
|
|
@@ -320,33 +341,42 @@ always @(*) begin
|
|
|
if (Rst_i) begin
|
|
|
nextState = IDLE;
|
|
|
end
|
|
|
- else begin
|
|
|
- case (currState)
|
|
|
- IDLE: begin
|
|
|
- if (decimFactorReg != DecimFactor_i && axiReloadReady) begin
|
|
|
- nextState = RECONFIG;
|
|
|
- end
|
|
|
- end
|
|
|
- RECONFIG: begin
|
|
|
- if (coeffCnt == 4'd7) begin
|
|
|
- nextState = WAIT_READY;
|
|
|
- end
|
|
|
- end
|
|
|
- WAIT_READY: begin
|
|
|
- if (delayCnt == DELAY_VALUE) begin
|
|
|
- nextState = CONFIG_STATE;
|
|
|
- end
|
|
|
- end
|
|
|
- CONFIG_STATE: begin
|
|
|
- if (configCnt == 2) begin
|
|
|
+ else begin
|
|
|
+ if (DecimFactor_i != 3'd0 && DecimFactor_i != 3'd1) begin
|
|
|
+ case (currState)
|
|
|
+ IDLE: begin
|
|
|
+ if (enReload && axiReloadReady) begin
|
|
|
+ nextState = RECONFIG;
|
|
|
+ end
|
|
|
+ else begin
|
|
|
nextState = IDLE;
|
|
|
end
|
|
|
- end
|
|
|
- default: begin
|
|
|
- nextState = IDLE;
|
|
|
- end
|
|
|
- endcase
|
|
|
- end
|
|
|
+ end
|
|
|
+ RECONFIG: begin
|
|
|
+ if (coeffCnt == 4'd7) begin
|
|
|
+ nextState = WAIT_READY;
|
|
|
+ end
|
|
|
+ else begin
|
|
|
+ nextState = RECONFIG;
|
|
|
+ end
|
|
|
+ end
|
|
|
+ WAIT_READY: begin
|
|
|
+ if (delayCnt == DELAY_VALUE) begin
|
|
|
+ nextState = CONFIG_STATE;
|
|
|
+ end
|
|
|
+ else begin
|
|
|
+ nextState = WAIT_READY;
|
|
|
+ end
|
|
|
+ end
|
|
|
+ CONFIG_STATE: begin
|
|
|
+ nextState = IDLE;
|
|
|
+ end
|
|
|
+ endcase
|
|
|
+ end
|
|
|
+ else begin
|
|
|
+ nextState = IDLE;
|
|
|
+ end
|
|
|
+ end
|
|
|
end
|
|
|
|
|
|
|
|
|
@@ -359,11 +389,12 @@ end
|
|
|
|
|
|
|
|
|
|
|
|
-
|
|
|
ReloadCoeffRam ReloadCoeffRam (
|
|
|
.Clk_i (Clk_i),
|
|
|
.Rst_i (Rst_i),
|
|
|
.ReadEn_i (axiReloadValid),
|
|
|
+ .CurrState_i (currState),
|
|
|
+ .DecimFactor_i (DecimFactor_i),
|
|
|
.Data_o (axiReloadDataRam)
|
|
|
|
|
|
|