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Исправлены ошибки в упаковке данных для FFT.

ChStepan hace 1 año
padre
commit
a04fbd63c2

La diferencia del archivo ha sido suprimido porque es demasiado grande
+ 52 - 0
src/constrs/S5243Top.xdc


+ 9 - 76
src/src/FftDataFiltering/DecimFilterWrapperTest.v

@@ -21,7 +21,7 @@
 module	DecimFilterWrapperTest
 #(	
 	parameter	AdcDataWidth		=	14,
-	parameter	N	=	8,
+	parameter	N	=	9,
 	parameter	M	=	1,
 	parameter	FilteredDataWidth	=	32,
 	parameter	FirOutDataWidth		=	48,
@@ -71,91 +71,23 @@ module	DecimFilterWrapperTest
 	wire [17:0] coefData;
 	wire coefDataVal;
 	
-	wire	oscWindVal;
-	
+	reg dataValReg;
+	wire dataValNeg = !DataVal_i&dataValReg;
 //================================================================================
 //	ASSIGNMENTS
 //================================================================================
-	assign oscWindVal = DataVal_i&(!coefDataVal);
 
-	// assign Data_o	=	(bypassFlag)? adcExtData[LsbForR1-1-:16]:outDataReg[15-:16];
 	assign Data_o	=	(bypassFlag)? adcExtData:decimData;
-	// assign Data_o	=	decimData;
 	assign DataVal_o	=	(bypassFlag)? DataVal_i:decimDataVal;
 
 //================================================================================
 //	CODING
 //================================================================================
-	always	@(posedge	Clk_i)	begin
-		if	(!Rst_i)	begin
-			case(DecimFactor_i)
-				3'd0:	begin
-							outDataReg		<=	adcExtData[LsbForR1-1-:16];
-							decimDataValR	<=	DataVal_i;
-						end
-				3'd1:	begin
-							outDataReg		<=	adcExtData[LsbForR1-1-:16];
-							decimDataValR	<=	DataVal_i;
-						end
-				3'd2:	begin
-							outDataReg		<=	decimData[LsbForR2-1-:16];
-							decimDataValR	<=	decimDataVal;
-						end
-				// 3'd3:	begin
-							// outDataReg	<=	decimData[maxWidthForR3-1-:16];
-							// decimDataValR	<=	decimDataVal;
-						// end
-				// 3'd4:	begin
-							// outDataReg	<=	decimDataI[LsbForR4-1-:16];
-							// decimDataValR	<=	decimDataVal;
-						// end
-				// 3'd5:	begin
-							// outDataReg	<=	decimDataI[maxWidthForR5-1-:16];
-							// decimDataValR	<=	decimDataVal;
-						// end
-				// 3'd6:	begin
-							// outDataReg	<=	decimDataI[maxWidthForR6-1-:16];
-							// decimDataValR	<=	decimDataVal;
-						// end
-				// 3'd7:	begin
-							// outDataReg	<=	decimDataI[maxWidthForR7-:16];
-							// decimDataValR	<=	decimDataVal;
-						// end
-			endcase
-		end	else	begin
-			outDataReg	<=	16'd0;
-			decimDataValR	<=	1'b0;
-		end
-	end
-
 	always @(posedge Clk_i) begin
 		if (!Rst_i) begin
-			case(DecimFactor_i)
-				3'd0:	begin
-							currDecimFactor <= 3'd1;
-						end
-				3'd1:	begin
-							currDecimFactor <= 3'd1;
-						end
-				3'd2:	begin
-							currDecimFactor <= 3'd2;
-						end
-				3'd3:	begin
-							currDecimFactor <= 3'd4;
-						end
-				3'd4:	begin
-							currDecimFactor <= 3'd4;
-						end
-				3'd5:	begin
-							currDecimFactor <= 3'd6;
-						end
-				3'd6:	begin
-							currDecimFactor <= 3'd6;
-						end
-				3'd7:	begin
-							currDecimFactor <= 3'd7;
-						end
-			endcase
+			dataValReg <= DataVal_i;
+		end else begin
+			dataValReg <= 0;
 		end
 	end
 	
@@ -170,8 +102,9 @@ cicFilterTest
 cicFilterInstI
 (
 	.Clk_i			(Clk_i),
-	.Rst_i			(Rst_i),
-	.DecimFactor_i	(currDecimFactor),
+	.Rst_i			(Rst_i|dataValNeg),
+	// .DecimFactor_i	(currDecimFactor),
+	.DecimFactor_i	(DecimFactor_i),
 	.Data_i			({{extendBitNum{Data_i[AdcDataWidth-1]}},Data_i}),
 	.DataNd_i		(DataVal_i),
 	.Data_o			(decimData),

+ 8 - 3
src/src/MeasDataFifo/OscDataFormer.v

@@ -67,11 +67,12 @@ module OscDataFormer
 		if	(!Rst_i)	begin
 			if	(OscWind_i)	begin
 				if	(oscDataBusValReg)	begin
-					oscDataBusRegReg	<=	{oscDataBusReg[16*12-1-:64],oscDataBusReg[16*4-1-:64],oscDataBusReg[16*16-1-:64],oscDataBusReg[16*8-1-:64]};
+					oscDataBusRegReg	<=	{oscDataBusReg[32*6-1-:64],oscDataBusReg[32*2-1-:64],oscDataBusReg[32*8-1-:64],oscDataBusReg[32*4-1-:64]};
 					// oscDataBusRegReg	<=	{oscDataBusReg[127:0], oscDataBusReg[OutDataWidth-1:128]};
 					// oscDataBusRegReg	<=	oscDataBusReg;
 					// oscDataBusRegReg	<=	{16'h7,16'h6,16'h5,16'h4,16'h3,16'h2,16'h1,16'h0,16'hF,16'hE,16'hD,16'hC,16'hB,16'hA,16'h9,16'h8};
-					// oscDataBusRegReg	<=	{16'hB,16'hA,16'h9,16'h8,      16'h3,16'h2,16'h1,16'h0,         16'hF,16'hE,16'hD,16'hC,       16'h7,16'h6,16'h5,16'h4};
+					// oscDataBusRegReg	<=	{32'hB,32'hA,32'h9,32'h8,      32'h3,32'h2,32'h1,32'h0,         32'hF,32'hE,32'hD,32'hC,       32'h7,32'h6,32'h5,32'h4};
+					// oscDataBusRegReg	<=	{32'h6,32'h5,	32'h2,32'h1,	32'h8,32'h7,	32'h4,32'h3};
 				end	
 			end	else	begin
 				oscDataBusRegReg	<=	0;
@@ -85,7 +86,11 @@ module OscDataFormer
 		if	(!Rst_i)	begin
 			if	(OscWind_i)	begin
 				if	(AdcDataVal_i)	begin
-					cycleCnt	<=	cycleCnt+4'd1;
+					if (cycleCnt	!=	DataValCycles-1) begin
+						cycleCnt	<=	cycleCnt+4'd1;
+					end else begin
+						cycleCnt	<= 0;
+					end 
 				end
 			end	else	begin
 				cycleCnt	<=	0;

+ 3 - 2
src/src/Sim/S5243TopPulseProfileTb.v

@@ -70,7 +70,7 @@ module S5243TopPulseProfileTb;
 	localparam	[4:0]	SMPLSTRBMUXCMD	=	5'd3;
 	
 	//COMMANDS	FOR REG_MAP
-	parameter	[31:0]	MeasCmdBypass	=	{8'h11,8'h0,8'h63,8'h9};
+	parameter	[31:0]	MeasCmdBypass	=	{8'h11,8'h0,8'h63,8'h5};
 	// parameter	[31:0]	MeasCmdFft 		=	{8'h11,8'h0,8'h63,7'h5,1'b1};
 	// parameter	[31:0]	MeasCmd 		=	{8'h11,8'h0,8'h53,8'h0};
 	// parameter	[31:0]	MeasCmd =	{8'h11,8'h3e,8'h63,8'h0};
@@ -261,7 +261,8 @@ wire	Adc1DataDa0P;
 wire	Adc1DataDa1P;
 
 wire	[31:0]	ncoPhInc1	=	32'h051eb851;
-wire	[31:0]	ncoPhInc2	=	32'h33333333;
+// wire	[31:0]	ncoPhInc2	=	32'h0a3d70a3;
+wire	[31:0]	ncoPhInc2	=	32'h28f5c28f;
 CordicNco		
 #(	.ODatWidth	(14),
 	.PhIncWidth	(32),

+ 51 - 51
src/src/Top/S5243Top.v

@@ -684,15 +684,15 @@ ExternalDspInterface
 	
 	.OscDataRdFlag_o	(oscDataRdFlag),
 	
-	// .Adc1ChT1Data_i		(adc1ChT1Data),	
-	// .Adc1ChR1Data_i		(adc1ChR1Data),	
-	// .Adc2ChR2Data_i		(adc2ChT2Data),	
-	// .Adc2ChT2Data_i		(adc2ChR2Data),	
+	.Adc1ChT1Data_i		(adc1ChT1Data),	
+	.Adc1ChR1Data_i		(adc1ChR1Data),	
+	.Adc2ChR2Data_i		(adc2ChT2Data),	
+	.Adc2ChT2Data_i		(adc2ChR2Data),	
 
-	.Adc1ChT1Data_i		(AdcData_i),	
-	.Adc1ChR1Data_i		(AdcData_i),	
-	.Adc2ChR2Data_i		(AdcData_i),	
-	.Adc2ChT2Data_i		(AdcData_i),	
+	// .Adc1ChT1Data_i		(AdcData_i),	
+	// .Adc1ChR1Data_i		(AdcData_i),	
+	// .Adc2ChR2Data_i		(AdcData_i),	
+	// .Adc2ChT2Data_i		(AdcData_i),	
 	
 	// .Adc1ChT1Data_i		(sinAdd),	
 	// .Adc1ChR1Data_i		(sinAdd),	
@@ -779,8 +779,8 @@ InternalDsp
 	
 	.GatingPulse_i		(gatingPulse),
 	
-	// .StartMeas_i		(measStart),
-	.StartMeas_i		(sampleStrobe),
+	.StartMeas_i		(measStart),
+	// .StartMeas_i		(sampleStrobe),
 	.StartMeasDsp_i		(startMeasSync),
 	.OscDataRdFlag_i	(oscDataRdFlag),
 	
@@ -982,52 +982,52 @@ endgenerate
 //	Gain Control module	
 //--------------------------------------------------------------------------------	
 genvar g;
-// generate
-	// for	(g=0;	g<ChNum;	g=g+1)	begin	:GainControl
-	// GainControlWrapper
-	// #(	
-		// .AdcDataWidth		(AdcDataWidth),
-		// .ThresholdWidth		(ThresholdWidth),
-		// .PhIncWidth			(PhIncWidth),
-		// .IfNcoOutWidth		(NcoWidth),
-		// .MeasPeriod			(MeasPeriod)
-	// )	
-	// GainControlModule
-	// (
-		// .Rst_i				(initRst),
-		// .Clk_i				(gclk),	
-		// .StartMeas_i		(sampleStrobe),
+generate
+	for	(g=0;	g<ChNum;	g=g+1)	begin	:GainControl
+	GainControlWrapper
+	#(	
+		.AdcDataWidth		(AdcDataWidth),
+		.ThresholdWidth		(ThresholdWidth),
+		.PhIncWidth			(PhIncWidth),
+		.IfNcoOutWidth		(NcoWidth),
+		.MeasPeriod			(MeasPeriod)
+	)	
+	GainControlModule
+	(
+		.Rst_i				(initRst),
+		.Clk_i				(gclk),	
+		.StartMeas_i		(sampleStrobe),
 		
-		// .NcoSin_i			(ncoSin),
-		// .NcoCos_i			(ncoCos),
+		.NcoSin_i			(ncoSin),
+		.NcoCos_i			(ncoCos),
 		
-		// .AdcData_i			(adcDataBus[g]),
+		.AdcData_i			(adcDataBus[g]),
 		// .AdcData_i			(AdcData_i),
 		
-		// .GainLowThreshold_i	(gainLowThresholdBus[g]),
-		// .GainHighThreshold_i(gainHighThresholdBus[g]),
-		// .GainAutoEn_i		(gainAutoEn[g]),
-		// .GainManualState_i	(gainManual[g]),
+		.GainLowThreshold_i	(gainLowThresholdBus[g]),
+		.GainHighThreshold_i(gainHighThresholdBus[g]),
+		.GainAutoEn_i		(gainAutoEn[g]),
+		.GainManualState_i	(gainManual[g]),
 		
-		// .AmpEnNewState_o	(ampEnNewStates[g]),
-		// .SensEn_o			(sensEn[g]),
-		// .MeasStart_o		(measStartBus[g])
-	// );
-	// end
-// endgenerate
-
-// StartAfterGainSel	
-// #(	
-	// .ChNum	(ChNum)
-// )	
-// StartAfterGainSelInst
-// (
-	// .Rst_i			(initRst),
-	// .GainCtrl_i		(gainAutoEn),
-	// .MeasStart_i	(measStartBus),
-	
-	// .MeasStart_o	(measStart)
-// );
+		.AmpEnNewState_o	(ampEnNewStates[g]),
+		.SensEn_o			(sensEn[g]),
+		.MeasStart_o		(measStartBus[g])
+	);
+	end
+endgenerate
+
+StartAfterGainSel	
+#(	
+	.ChNum	(ChNum)
+)	
+StartAfterGainSelInst
+(
+	.Rst_i			(initRst),
+	.GainCtrl_i		(gainAutoEn),
+	.MeasStart_i	(measStartBus),
+	
+	.MeasStart_o	(measStart)
+);
 //--------------------------------------------------------------------------------
 //	Trig TO/FROM DSP	
 //--------------------------------------------------------------------------------