Тестовые изменения.

src/src/FftDataFiltering/DecimFilterWrapper.v

@@ -79,46 +79,46 @@ module	DecimFilterWrapper
 	wire	bypassData = (DecimFactor_i==3'd0 | DecimFactor_i==3'd1);
 	
 	wire	[17:0]	adcExtData	=	{{extendBitNum{AdcData_i[AdcDataWidth-1]}},AdcData_i};
+	
+	wire [8:0] coefAddr;
+	wire [17:0] coefData;
+	wire coefDataVal;
+	
+	wire	oscWindVal;
 //================================================================================
 //	ASSIGNMENTS
 //================================================================================
+	assign oscWindVal = !coefDataVal&OscWind_i;
 
-	assign	FilteredAdcDataI_o	=	decimData;
-
-	assign	FilteredDataVal_o	=	decimDataVal;
+	assign FilteredAdcDataI_o	=	decimData;
+	assign FilteredDataVal_o	=	decimDataVal;
 
 //================================================================================
 //	CODING
 //================================================================================
 
-wire [8:0] coefAddr;
-wire [17:0] coefData;
-
-reg [8:0] testAddrCnt;
-
-always @(posedge Clk_i) begin
-	if (!Rst_i) begin
-		if (OscWind_i) begin
-			testAddrCnt<=testAddrCnt+10;
-		end else begin
-			testAddrCnt<=0;
-		end
-	end else begin
-		testAddrCnt	<=0;
-	end 
-end
+RomCtrl	RomCtrl
+(
+	.Clk_i		(Clk_i),
+	.Rst_i		(Rst_i),
+	.OscWind_i	(OscWind_i),
+	.CoefDataVal_o	(coefDataVal),
+	.DecimFactor_i	(DecimFactor_i),
+	.CoefAddr_o	(coefAddr)
+);
 
 CoefROM CoefRom (
-  // .a(coefAddr),      // input wire [8 : 0] a
-  .a(testAddrCnt),      // input wire [8 : 0] a
+  .a(coefAddr),      // input wire [8 : 0] a
   .spo(coefData)  // output wire [17 : 0] spo
 );
 
 systolicFilter DataFitler (
 	.Clk_i(Clk_i), 
 	.Rst_i(Rst_i), 
+	.CoefData_i(coefData),
+	.CoefDataVal_i(coefDataVal),
 	.Data_i(adcExtData), 
-	.DataNd_i(OscWind_i), 
+	.DataNd_i(oscWindVal), 
 	.Data_o(filteredData), 
 	.DataValid_o(filteredDataVal)
 );

src/src/FftDataFiltering/RomCtrl.v

@@ -0,0 +1,140 @@
+`timescale 1ns / 1ps
+//////////////////////////////////////////////////////////////////////////////////
+// Company: 
+// Engineer: 
+// 
+// Create Date:    12:42:08 10/27/2020 
+// Design Name: 
+// Module Name:    decimBlock 
+// Project Name: 
+// Target Devices: 
+// Tool versions: 
+// Description: 
+//
+// Dependencies: 
+//
+// Revision: 
+// Revision 0.01 - File Created
+// Additional Comments: 
+//
+//////////////////////////////////////////////////////////////////////////////////
+module RomCtrl
+#(	
+	parameter	OutWidth	=	9,
+	parameter [8:0] BaseAddrR2 = 0,
+	parameter [8:0] BaseAddrR3 = 64,
+	parameter [8:0] BaseAddrR4 = 128,
+	parameter [8:0] BaseAddrR5 = 192,
+	parameter [8:0] BaseAddrR6 = 256,
+	parameter [8:0] BaseAddrR7 = 320
+)
+(
+	input Clk_i,
+	input Rst_i,
+	input OscWind_i,
+	input CoefDataVal_o,
+	input [2:0]	DecimFactor_i,
+	output [OutWidth-1:0] CoefAddr_o
+);
+
+
+//================================================================================
+//	REG/WIRE
+//================================================================================
+reg	[2:0] decimFactor;
+reg [OutWidth-1:0] currBaseAddr;
+reg [8:0] coefAddr;
+
+reg	changeFlag;
+reg	coefDataVal;
+
+//================================================================================
+//	ASSIGNMENTS
+//================================================================================
+// assign changeFlag = (decimFactor!= DecimFactor_i);
+assign CoefAddr_o = coefAddr;
+assign CoefDataVal_o = coefDataVal;
+	
+//================================================================================
+//	CODING
+//================================================================================
+always @(posedge Clk_i) begin
+	if (!Rst_i) begin
+		decimFactor <= DecimFactor_i;
+	end else begin
+		decimFactor <= 0;
+	end 
+end
+
+always @(posedge Clk_i) begin
+	if (!Rst_i) begin	
+		if (decimFactor!= DecimFactor_i) begin
+			changeFlag <= 1'b1;
+		end else begin
+			changeFlag <= 1'b0;
+		end
+	end else begin
+		changeFlag <= 1'b0;
+	end 
+end
+
+always @(posedge Clk_i) begin
+	if (!Rst_i) begin
+		if (changeFlag) begin
+			coefDataVal <= 1'b1;
+		end 
+		if (coefAddr==currBaseAddr+64) begin
+			coefDataVal <= 1'b0;
+		end
+	end else begin
+		coefDataVal <= 1'b0;
+	end 
+end
+
+always @(*) begin
+	if (!Rst_i) begin
+		if (changeFlag) begin
+			case (DecimFactor_i) 
+				2:	begin
+						currBaseAddr <= BaseAddrR2;
+					end
+				3:	begin
+						currBaseAddr <= BaseAddrR3;
+					end
+				4:	begin
+						currBaseAddr <= BaseAddrR4;
+					end
+				5:	begin
+						currBaseAddr <= BaseAddrR5;
+					end
+				6:	begin
+						currBaseAddr <= BaseAddrR6;
+					end
+				7:	begin
+						currBaseAddr <= BaseAddrR7;
+					end
+				default: begin
+							currBaseAddr	<=	BaseAddrR2;
+						 end
+			endcase
+		end
+	end else begin
+		currBaseAddr <= 0;
+	end 
+end 
+
+always @(posedge Clk_i) begin
+	if (!Rst_i) begin
+		if (coefDataVal) begin
+			if (coefAddr!=currBaseAddr+65) begin
+				coefAddr<=coefAddr+1;
+			end
+		end else begin
+			coefAddr <= currBaseAddr;
+		end 
+	end else begin
+		coefAddr <=0;
+	end 
+end
+
+endmodule

src/src/Sim/DecimFilterWrapperTb.v

@@ -71,9 +71,8 @@ parameter	[31:0]	Nco3PhaseInc	=	32'h428f5c28;
 initial begin
 	Clk50		=	1'b1;
 	Rst			=	1'b1;
-	decimFactor	=	3'd2;
-#100;
-	Rst		=	1'b0;
+#200;
+	Rst			=	1'b0;
 end	
 
 
@@ -119,6 +118,16 @@ always @ (posedge Clk50)	begin
 	end
 end
 	
+always	@(posedge	Clk50)	begin
+	if	(!Rst)	begin
+		if (tbCnt == 100) begin
+			decimFactor	<=	7;
+		end
+	end else begin
+	 decimFactor <= 0;
+	end 
+end
+
 CordicNco		
 #(	
 	.ODatWidth	(14),

src/src/Sim/S5243TopSpectrumTb.v

@@ -37,11 +37,12 @@ module S5243TopSpectrumTb;
 	localparam	[4:0]	MUXFASTMODCMD	=	5'd1;
 	localparam	[4:0]	GATINGMUXCMD	=	5'd2;
 	localparam	[4:0]	SMPLSTRBMUXCMD	=	5'd3;
+	localparam	[6:0]	DECIMFACTOR		=	7'd7;
 	
 	localparam	[1:0]	CURRADCCHANNEL	=	2'h3;
 	//COMMANDS	FOR REG_MAP
 	// parameter	[31:0]	MeasCmdBypass	=	{8'h11,8'h0,8'h63,7'h1,1'h1};
-	parameter	[31:0]	MeasCmdFft 		=	{8'h11,8'h0,8'h63,7'h1,1'b1};
+	parameter	[31:0]	MeasCmdFft 		=	{8'h11,8'h0,8'h63,DECIMFACTOR,1'b1};
 	parameter	[31:0]	AdcCtrl =	{8'h12,24'h2};
 	parameter	[31:0]	SensCtrlCmd =	{1'b0,21'h0,CURRADCCHANNEL,4'h0,4'h1};
 	parameter	[31:0]	DitherCmd 	= {8'h0E,8'd9,4'h0,4'h1,4'd11,4'h3};
@@ -49,7 +50,7 @@ module S5243TopSpectrumTb;
 	parameter	[31:0]	IfFtwL 	=	{8'h16,24'h000000};
 	parameter	[31:0]	FilterCorrCmdH 		=	{8'h17,24'hD70A3D};
 	parameter	[31:0]	FilterCorrCmdL 		=	{8'h18,24'hD70A3D};
-	parameter	[31:0]	MeasNum0RegCmd		=	{8'h58,24'd1};
+	parameter	[31:0]	MeasNum0RegCmd		=	{8'h58,24'd100};
 	parameter	[31:0]	MeasNum1RegCmd		=	{8'h59,MUXSLOWMODCMD,MUXFASTMODCMD,DSPTRIGINCMD,25'd0};
 	//===========================================================================================
 	
@@ -320,7 +321,8 @@ S5243Top MasterFpga
 	.AmpEn_o				(),	//	0-adc1ChA 1-adc1ChB 2-adc2ChA 3-adc2ChB
 	// .AdcData_i				(sin_value[17-:14])
 	// .AdcData_i			(DelpaPulse)
-	.AdcData_i			(sinAdd)
+	// .AdcData_i			(sinAdd)
+	.AdcData_i			(Data_i)
 );
 parameter	IDLE	=	2'h0;
 parameter	CMD		=	2'h1;

src/src/Sim/firFilter/systolicFilter.v

@@ -2,11 +2,13 @@ module systolicFilter
 #(	parameter	filteredDataWidth	=	38,
 	parameter	inOutDataWidth	=	18,
 	parameter	decimCntWidth	=	7,
-	parameter	CoeffCount		=	38
+	parameter	CoeffCount		=	65
 )
 (
 	input Clk_i,
 	input Rst_i,
+	input [inOutDataWidth-1:0] CoefData_i,
+	input CoefDataVal_i,
 	input [inOutDataWidth-1:0] Data_i,
 	input DataNd_i,
 	output [inOutDataWidth-1:0] Data_o,
@@ -23,12 +25,13 @@ module systolicFilter
 		.Clk_i(Clk_i),
 		.Rst_i(Rst_i),
 		.Data_i(Data_i),
+		.CoefData_i(CoefData_i),
+		.CoefDataVal_i(CoefDataVal_i),
 		.DataNd_i(DataNd_i),
 		.Data_o(outData),
 		.DataValid_o(outDataValid)
 	);
 	
-	wire dataValid;
 	roundSymmetric #
 	( 
 		.inDataWidth(filteredDataWidth),

src/src/Sim/firFilter/systolicFilterBlock.v

@@ -1,72 +1,20 @@
 module systolicFilterBlock # (
-	parameter CoeffCount = 25
+	parameter CoeffCount = 65
 )
 (
 	input Clk_i,
 	input Rst_i,
 	input [17:0] Data_i,
+	input CoefDataVal_i,
+	input [17:0] CoefData_i,
 	input DataNd_i,
 	output [47:0] Data_o,
 	output DataValid_o
 );
 
-	wire signed [17:0] coeff[0:CoeffCount-1];
+	reg signed [17:0] coeff[0:CoeffCount-1];
+
 
-	// assign coeff[0] = 18'h3e6c9;
-	// assign coeff[1] = 18'h3c349;
-	// assign coeff[2] = 18'h3cfde;
-	// assign coeff[3] = 18'h3f440;
-	// assign coeff[4] = 18'h05e4b;
-	// assign coeff[5] = 18'h0e79f;
-	// assign coeff[6] = 18'h172aa;
-	// assign coeff[7] = 18'h1c760;
-	// assign coeff[8] = 18'h1c760;
-	// assign coeff[9] = 18'h172aa;
-	// assign coeff[10] = 18'h0e79f;
-	// assign coeff[11] = 18'h05e4b;
-	// assign coeff[12] = 18'h3f440;
-	// assign coeff[13] = 18'h3cfde;
-	// assign coeff[14] = 18'h3c349;
-	// assign coeff[15] = 18'h3e6c9;	
-	
-	assign coeff[0]  = 18'h000db;
-	assign coeff[1]  = 18'h001f5;
-	assign coeff[2]  = 18'h000ee;
-	assign coeff[3]  = 18'h3fbe4;
-	assign coeff[4]  = 18'h3f5ef;
-	assign coeff[5]  = 18'h3f642;
-	assign coeff[6]  = 18'h3ff5b;
-	assign coeff[7]  = 18'h0085c;
-	assign coeff[8]  = 18'h0051e;
-	assign coeff[9]  = 18'h3f76d;
-	assign coeff[10] = 18'h3f1c7;
-	assign coeff[11] = 18'h000d9;
-	assign coeff[12] = 18'h014f2;
-	assign coeff[13] = 18'h00f01;
-	assign coeff[14] = 18'h3eb66;
-	assign coeff[15] = 18'h3d5bc;
-	assign coeff[16] = 18'h000cc;
-	assign coeff[17] = 18'h066cd;
-	assign coeff[18] = 18'h0becc;
-	assign coeff[19] = 18'h0becc;
-	assign coeff[20] = 18'h066cd;
-	assign coeff[21] = 18'h000cc;
-	assign coeff[22] = 18'h3d5bc;
-	assign coeff[23] = 18'h3eb66;
-	assign coeff[24] = 18'h00f01;
-	assign coeff[25] = 18'h014f2;
-	assign coeff[26] = 18'h000d9;
-	assign coeff[27] = 18'h3f1c7;
-	assign coeff[28] = 18'h3f76d;
-	assign coeff[29] = 18'h0051e;
-	assign coeff[30] = 18'h0085c;
-	assign coeff[31] = 18'h3ff5b;
-	assign coeff[32] = 18'h3f642;
-	assign coeff[33] = 18'h3f5ef;
-	assign coeff[34] = 18'h3fbe4;
-	assign coeff[35] = 18'h000ee;
-	assign coeff[36] = 18'h001f5;
-	assign coeff[37] = 18'h000db;
 
 	wire signed [17:0] dataIn = Data_i;
 	reg [3:0] ndShReg;
@@ -83,6 +31,28 @@ module systolicFilterBlock # (
 	reg signed [34:0] multResult[0:CoeffCount-1];
 	reg signed [47:0] sumResult[0:CoeffCount-1];
 	
+	reg [8:0] addrCnt;
+	
+	
+	always @(posedge Clk_i) begin
+		if (!Rst_i) begin
+			if (CoefDataVal_i) begin
+				addrCnt <= addrCnt+1;
+			end else begin
+				addrCnt <= 0;
+			end
+		end else begin
+			addrCnt <= 0;
+		end 
+	end
+	
+	always @(*) begin
+		if (!Rst_i) begin
+			if (CoefDataVal_i) begin
+				coeff[addrCnt] = CoefData_i;
+			end
+		end 
+	end
 	
 	genvar i;
 	generate

src/src/Top/S5243Top.v

@@ -679,15 +679,15 @@ ExternalDspInterface
 	
 	.OscDataRdFlag_o	(oscDataRdFlag),
 	
-	.Adc1ChT1Data_i		(adc1ChT1Data),	
-	.Adc1ChR1Data_i		(adc1ChR1Data),	
-	.Adc2ChR2Data_i		(adc2ChT2Data),	
-	.Adc2ChT2Data_i		(adc2ChR2Data),	
-
-	// .Adc1ChT1Data_i		(AdcData_i),	
-	// .Adc1ChR1Data_i		(AdcData_i),	
-	// .Adc2ChR2Data_i		(AdcData_i),	
-	// .Adc2ChT2Data_i		(AdcData_i),	
+	// .Adc1ChT1Data_i		(adc1ChT1Data),	
+	// .Adc1ChR1Data_i		(adc1ChR1Data),	
+	// .Adc2ChR2Data_i		(adc2ChT2Data),	
+	// .Adc2ChT2Data_i		(adc2ChR2Data),	
+
+	.Adc1ChT1Data_i		(AdcData_i),	
+	.Adc1ChR1Data_i		(AdcData_i),	
+	.Adc2ChR2Data_i		(AdcData_i),	
+	.Adc2ChT2Data_i		(AdcData_i),	
 	
 	// .Adc1ChT1Data_i		(sinAdd),	
 	// .Adc1ChR1Data_i		(sinAdd),