Поменяны местами пины двух АЦП

S5443_M/S5443.srcs/constrs_1/new/S5243Top.xdc

@@ -1,12 +1,23 @@
-set_property PACKAGE_PIN U17 [get_ports Adc1DataDa0P_i]
-set_property PACKAGE_PIN R18 [get_ports Adc1DataDa1P_i]
-set_property PACKAGE_PIN M18 [get_ports Adc1DataDb0P_i]
-set_property PACKAGE_PIN L17 [get_ports Adc1DataDb1P_i]
-set_property PACKAGE_PIN H18 [get_ports Adc2DataDa0P_i]
-set_property PACKAGE_PIN F18 [get_ports Adc2DataDa1P_i]
-set_property PACKAGE_PIN C17 [get_ports Adc2DataDb0P_i]
-set_property PACKAGE_PIN B17 [get_ports Adc2DataDb1P_i]
+# set_property PACKAGE_PIN U17 [get_ports Adc1DataDa0P_i]
+# set_property PACKAGE_PIN R18 [get_ports Adc1DataDa1P_i]
+# set_property PACKAGE_PIN M18 [get_ports Adc1DataDb0P_i]
+# set_property PACKAGE_PIN L17 [get_ports Adc1DataDb1P_i]
 
+# set_property PACKAGE_PIN H18 [get_ports Adc2DataDa0P_i]
+# set_property PACKAGE_PIN F18 [get_ports Adc2DataDa1P_i]
+# set_property PACKAGE_PIN C17 [get_ports Adc2DataDb0P_i]
+# set_property PACKAGE_PIN B17 [get_ports Adc2DataDb1P_i]
+
+
+set_property PACKAGE_PIN H18 [get_ports Adc1DataDa0P_i]
+set_property PACKAGE_PIN F18 [get_ports Adc1DataDa1P_i]
+set_property PACKAGE_PIN C17 [get_ports Adc1DataDb0P_i]
+set_property PACKAGE_PIN B17 [get_ports Adc1DataDb1P_i]
+
+set_property PACKAGE_PIN U17 [get_ports Adc2DataDa0P_i]
+set_property PACKAGE_PIN R18 [get_ports Adc2DataDa1P_i]
+set_property PACKAGE_PIN M18 [get_ports Adc2DataDb0P_i]
+set_property PACKAGE_PIN L17 [get_ports Adc2DataDb1P_i]
 
 #==========================================================================
 #   TIMING CONSTRAINTS
@@ -23,7 +34,7 @@ create_clock -period 20.000 [get_ports ClkP_i]
 #==========================================================================
 #	ADC1
 
-set_property PACKAGE_PIN R16 [get_ports Adc1FclkP_i]
+set_property PACKAGE_PIN D18 [get_ports Adc1FclkP_i]
 set_property IOSTANDARD LVDS_25 [get_ports Adc1FclkP_i]
 set_property IOSTANDARD LVDS_25 [get_ports Adc1FclkN_i]
 
@@ -42,7 +53,7 @@ set_property IOSTANDARD LVDS_25 [get_ports Adc1DataDb1N_i]
 #==========================================================================
 #	ADC2
 
-set_property PACKAGE_PIN D18 [get_ports Adc2FclkP_i]
+set_property PACKAGE_PIN R16 [get_ports Adc2FclkP_i]
 set_property IOSTANDARD LVDS_25 [get_ports Adc2FclkP_i]
 set_property IOSTANDARD LVDS_25 [get_ports Adc2FclkN_i]
 
@@ -117,24 +128,24 @@ set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[15]}]
 #==========================================================================
 #  ADC SPI
 
-set_property PACKAGE_PIN N15 [get_ports Adc1InitMosi_o]
+set_property PACKAGE_PIN E15 [get_ports Adc1InitMosi_o]
 set_property IOSTANDARD LVCMOS25 [get_ports Adc1InitMosi_o]
-set_property PACKAGE_PIN E15 [get_ports Adc2InitMosi_o]
+set_property PACKAGE_PIN N15 [get_ports Adc2InitMosi_o]
 set_property IOSTANDARD LVCMOS25 [get_ports Adc2InitMosi_o]
 
-set_property PACKAGE_PIN P16 [get_ports Adc1InitClk_o]
+set_property PACKAGE_PIN F15 [get_ports Adc1InitClk_o]
 set_property IOSTANDARD LVCMOS25 [get_ports Adc1InitClk_o]
-set_property PACKAGE_PIN F15 [get_ports Adc2InitClk_o]
+set_property PACKAGE_PIN P16 [get_ports Adc2InitClk_o]
 set_property IOSTANDARD LVCMOS25 [get_ports Adc2InitClk_o]
 
-set_property PACKAGE_PIN P15 [get_ports Adc1InitCs_o]
+set_property PACKAGE_PIN G15 [get_ports Adc1InitCs_o]
 set_property IOSTANDARD LVCMOS25 [get_ports Adc1InitCs_o]
-set_property PACKAGE_PIN G15 [get_ports Adc2InitCs_o]
+set_property PACKAGE_PIN P15 [get_ports Adc2InitCs_o]
 set_property IOSTANDARD LVCMOS25 [get_ports Adc2InitCs_o]
 
-set_property PACKAGE_PIN R15 [get_ports Adc1InitRst_o]
+set_property PACKAGE_PIN H15 [get_ports Adc1InitRst_o]
 set_property IOSTANDARD LVCMOS25 [get_ports Adc1InitRst_o]
-set_property PACKAGE_PIN H15 [get_ports Adc2InitRst_o]
+set_property PACKAGE_PIN R15 [get_ports Adc2InitRst_o]
 set_property IOSTANDARD LVCMOS25 [get_ports Adc2InitRst_o]
 #
 #==========================================================================
@@ -244,10 +255,10 @@ set_property IOSTANDARD LVCMOS25 [get_ports {Trig6to1Dir_o[4]}]
 set_property PACKAGE_PIN A15 [get_ports {Trig6to1Dir_o[5]}]
 set_property IOSTANDARD LVCMOS25 [get_ports {Trig6to1Dir_o[5]}]
 
-set_property PACKAGE_PIN V15 [get_ports DitherCtrlCh1_o]
+set_property PACKAGE_PIN A16 [get_ports DitherCtrlCh1_o]
 set_property IOSTANDARD LVCMOS25 [get_ports DitherCtrlCh1_o]
 
-set_property PACKAGE_PIN A16 [get_ports DitherCtrlCh2_o]
+set_property PACKAGE_PIN V15 [get_ports DitherCtrlCh2_o]
 set_property IOSTANDARD LVCMOS25 [get_ports DitherCtrlCh2_o]
 
 set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets Ss_i_IBUF]