`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 		Churbanov S.
// 
// Create Date:    15:24:31 08/20/2019 
// Design Name: 
// Module Name:  
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.02 - File Modified
// Additional Comments: 16.09.2019 file modified in assotiate with task.
//
//////////////////////////////////////////////////////////////////////////////////
module StartAfterGainSel
#(	
	parameter	ChNum	=	4
)	
(
	input	Rst_i,	
	input	[ChNum-1:0]	MeasStart_i,
	input	[ChNum-1:0]	GainCtrl_i,
	
	output	MeasStart_o
);

//================================================================================
//  LOCALPARAMS

//================================================================================
//  REG/WIRE
	reg	measStart;
//================================================================================
//  ASSIGNMENTS
	assign	MeasStart_o	=	measStart;
//================================================================================
//  CODING

always	@(*)	begin
	if	(!Rst_i)	begin
		case(GainCtrl_i)
			4'd0:	begin
						measStart	=	&MeasStart_i;
					end
			4'd1:	begin
						measStart	=	MeasStart_i[0];
					end
			4'd2:	begin
						measStart	=	MeasStart_i[1];
					end
			4'd3:	begin
						measStart	=	MeasStart_i[0]&MeasStart_i[1];
					end
			4'd4:	begin
						measStart	=	&MeasStart_i[2];
					end
			4'd5:	begin
						measStart	=	MeasStart_i[0]&MeasStart_i[2];
					end
			4'd6:	begin
						measStart	=	MeasStart_i[1]&MeasStart_i[2];
					end
			4'd7:	begin
						measStart	=	MeasStart_i[0]&MeasStart_i[1]&MeasStart_i[2];
					end
			4'd8:	begin
						measStart	=	MeasStart_i[3];
					end
			4'd9:	begin
						measStart	=	MeasStart_i[0]&MeasStart_i[3];
					end
			4'd10:	begin
						measStart	=	MeasStart_i[1]&MeasStart_i[3];
					end
			4'd11:	begin
						measStart	=	MeasStart_i[0]&MeasStart_i[1]&MeasStart_i[3];
					end
			4'd12:	begin
						measStart	=	MeasStart_i[2]&MeasStart_i[3];
					end
			4'd13:	begin
						measStart	=	MeasStart_i[0]&MeasStart_i[2]&MeasStart_i[3];
					end
			4'd14:	begin
						measStart	=	MeasStart_i[1]&MeasStart_i[2]&MeasStart_i[3];
					end
			4'd15:	begin
						measStart	=	&MeasStart_i;
					end		
		endcase
	end
end

endmodule