S5443/S5443_M/S5443.srcs/sources_1/new/MeasDataFifo/MeasDataFifoWrapper.v

`timescale 1ns / 1ps
	
module MeasDataFifoWrapper	
#(	
	parameter	DataWidth	=	32,
	parameter	ChNum		=	4
)
(
	input	Clk_i, 
	input	ClkPpiOut_i, 
	input	Rst_i,	
	input	PpiBusy_i,	
	
	input	[DataWidth*(ChNum*2)-1:0]	MeasDataBus_i,
	input	MeasDataVal_i,
	
	output	[DataWidth*(ChNum*2)-1:0]	MeasDataBus_o,
	output	MeasDataVal_o
);
//================================================================================
//  REG/WIRE
//================================================================================

	wire	fullFlag;
	wire	emptyFlag;
	wire	wrEn;
	wire	rdEn;
	wire	fifoRst;

//================================================================================
//  ASSIGNMENTS
//================================================================================
	assign	MeasDataVal_o	=	rdEn;	
//================================================================================
//  CODING
//================================================================================		

	
MeasDataFifo	MeasDataFifoInst
(
	.clk	(Clk_i),
	// .srst	(fifoRst),
	// .srst	(Rst_i|fifoRst),
	.srst	(Rst_i),
	.din	(MeasDataBus_i),
	.wr_en	(wrEn),
	.rd_en	(rdEn),
	.dout	(MeasDataBus_o),
	.full	(fullFlag),
	.empty	(emptyFlag)
);

  
FifoController	FifoControllerInst
(
	.Clk_i			(Clk_i), 
	.Rst_i			(Rst_i),	
	.PpiBusy_i		(PpiBusy_i),	
	.MeasDataVal_i	(MeasDataVal_i),
	.FullFlag_i		(fullFlag),
	.EmptyFlag_i	(emptyFlag),
	
	.MeasDataVal_o	(),
	.WrEn_o			(wrEn),
	.RdEn_o			(rdEn)
);

endmodule