| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231 |
- `timescale 1ns / 1ps
- module TriggerCtrlTb;
-
- parameter [31:0] DirectWriteCmd = {1'b0,7'h13,24'h5};
- parameter [31:0] NotDirectWriteCmd = {1'b0,7'h9,24'h5};
- parameter [31:0] DirectReadCmd = {1'b1,7'h13,24'h5};
- parameter [31:0] NotDirectReadCmd = {1'b1,7'h10,24'b1};
- parameter [31:0] DirectReadAns = {1'b0,7'h13,24'h5};
-
- parameter [31:0] ExtPosTrig0Cmd = {8'hE,16'h32,8'h7};
- parameter [31:0] ExtNegTrig0Cmd = {8'hE,16'h32,8'h5};
- parameter [31:0] IntPosTrig0Cmd = {8'hE,16'h32,8'h3};
- parameter [31:0] IntNegTrig0Cmd = {8'hE,16'h32,8'h1};
-
- reg clk_50;
- reg [31:0] tb_cnt=4'd0;
- reg rst;
- reg mosi_i = 1'b0;
- reg Miso_i = 1'b0;
- reg ss_i;
- reg clk_i = 1'b0;
- wire sck_i = (tb_cnt >= 20 && tb_cnt < 52 |tb_cnt >= 110 && tb_cnt < 142|tb_cnt >= 200 && tb_cnt < 232|tb_cnt >= 300 && tb_cnt < 332|tb_cnt >= 400 && tb_cnt < 432) ? clk_i:1'b1;
-
- reg [31:0] DspSpiData;
- reg StartCalcCmdReg ;
-
- wire [35:0] sincos_value_transit;
- wire [13:0] cos_value = sincos_value_transit [35:22];
- wire [13:0] sin_value = sincos_value_transit [17:4];
- wire TrigFromExtDev = (tb_cnt == 60|tb_cnt == 160);
- wire TrigFromExtDSp = (tb_cnt == 250|tb_cnt == 350);
- //==========================================================================================
- //clocks gen
- always #10 clk_50 = ~clk_50;
- always #10 clk_i = ~clk_i;
- //==========================================================================================
- initial begin
- clk_50 = 1'b1;
- rst = 1'b1;
- StartCalcCmdReg = 1'b1;
- #100;
- rst = 1'b0;
- #100;
- StartCalcCmdReg = 1'b0;
- end
- always @(negedge clk_50) begin
- if (!rst) begin
- tb_cnt <= tb_cnt+1;
- end else begin
- tb_cnt <= 0;
- end
- end
- always @(posedge clk_50) begin
- if (tb_cnt >= 20 && tb_cnt < 52 |tb_cnt >= 110 && tb_cnt < 142|tb_cnt >= 200 && tb_cnt < 232|tb_cnt >= 300 && tb_cnt < 332|tb_cnt >= 400 && tb_cnt < 432) begin
- ss_i <= 1'b0;
- end else begin
- ss_i <= 1'b1;
- end
- end
- always @(posedge clk_50) begin
- if (tb_cnt == 19) begin
- DspSpiData <= ExtPosTrig0Cmd;
- end else if (tb_cnt == 109) begin
- DspSpiData <= ExtNegTrig0Cmd;
- end else if (tb_cnt == 199) begin
- DspSpiData <= IntPosTrig0Cmd;
- end else if (tb_cnt == 299) begin
- DspSpiData <= IntNegTrig0Cmd;
- end else if (tb_cnt == 399) begin
- DspSpiData <= ExtPosTrig0Cmd;
- end else begin
- DspSpiData <= DspSpiData<<1;
- end
- end
- always @(posedge clk_50) begin
- if (!rst) begin
- if (tb_cnt >= 20 && tb_cnt < 52 |tb_cnt >= 110 && tb_cnt < 142|tb_cnt >= 200 && tb_cnt < 232|tb_cnt >= 300 && tb_cnt < 332|tb_cnt >= 400 && tb_cnt < 432) begin
- mosi_i <= DspSpiData[31];
- end else begin
- mosi_i <= 1'b1;
- end
- end
- end
- always @(posedge clk_50) begin
- if (tb_cnt >= 100 && tb_cnt < 132) begin
- Miso_i <= DspSpiData[31];
- end else begin
- Miso_i <= 1'b1;
- end
- end
- reg [5:0] testCnt = 0;
- always @(posedge sck_i) begin
- if (~ss_i) begin
- testCnt <= testCnt +1;
- end
- end
- CordicNco
- #( .ODatWidth (14),
- .PhIncWidth (32),
- .IterNum (10),
- .EnSinN (0))
- ncoInst
- (
- .Clk_i (clk_50),
- .Rst_i (rst),
- .Val_i (1'b1),
- .PhaseInc_i (32'h25604189),
- .WindVal_i (1'b1),
- .WinType_i (),
- .Wind_o (),
- .Sin_o (sin_value),
- .Cos_o (),
- .Val_o ()
- );
- S5443Top uut (
- .Clk_i (clk_50),
- .Led_o (),
- //------------------------------------------
- .Adc1FclkP_i (),
- .Adc1FclkN_i (),
-
- .Adc1DataDa0P_i (),
- .Adc1DataDa0N_i (),
- .Adc1DataDa1P_i (),
- .Adc1DataDa1N_i (),
-
- .Adc1DataDb0P_i (),
- .Adc1DataDb0N_i (),
- .Adc1DataDb1P_i (),
- .Adc1DataDb1N_i (),
- //------------------------------------------
- .Adc2FclkP_i (),
- .Adc2FclkN_i (),
-
- .Adc2DataDa0P_i (),
- .Adc2DataDa0N_i (),
- .Adc2DataDa1P_i (),
- .Adc2DataDa1N_i (),
-
- .Adc2DataDb0P_i (),
- .Adc2DataDb0N_i (),
- .Adc2DataDb1P_i (),
- .Adc2DataDb1N_i (),
- //------------------------------------------
- .AdcInitMosi_o (),
- .AdcInitClk_o (),
- .Adc1InitCs_o (),
- .Adc2InitCs_o (),
- .AdcInitRst_o (),
- //------------------------------------------
-
- .Mosi_i (mosi_i),
- .Sck_i (sck_i),
- .Ss_i (ss_i),
- .Miso_i (Miso_i),
-
- .LpOutClk_o (),
- .LpOutFs_o (),
- .LpOutData_o (),
-
- //fpga-dsp signals
- .StartMeas_i (StartCalcCmdReg),
- .StartMeas_o (),
- .StopMeas_i (),
- .Stopmeas_o (),
- .EndMeas_o (),
- .TimersClk_o (),
-
- //trigger's
- .ExtDevTrig0_io (TrigFromExtDev),
- .ExtDevTrig0Dir_o (),
- .ExtDevTrig1_io (),
- .ExtDevTrig1Dir_o (),
-
- .ExtDspTrig0_io (TrigFromExtDSp),
- .ExtDspTrig0Dir_o (),
- .ExtDspTrig1_io (),
- .ExtDspTrig1Dir_o (),
-
- //overload lines
- .Overload_o (),
- .OverloadS_i (),
-
- //gain lines
- .GainControl_o ()// 0-adc1ChA 1-adc1ChB 2-adc2ChA 3-adc2ChB
- );
- endmodule
|