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S5443Top.xdc

S5443Top.xdc 26 KB
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  1. set_property PACKAGE_PIN C1 [get_ports Adc1DataDa0P_i]
    2. 

  2. set_property PACKAGE_PIN D2 [get_ports Adc1DataDa1P_i]
    3. 

  3. set_property PACKAGE_PIN E2 [get_ports Adc1DataDb0P_i]
    4. 

  4. set_property PACKAGE_PIN F2 [get_ports Adc1DataDb1P_i]
    5. 

  5. set_property PACKAGE_PIN B9 [get_ports Adc2DataDa0P_i]
    6. 

  6. set_property PACKAGE_PIN A8 [get_ports Adc2DataDa1P_i]
    7. 

  7. set_property PACKAGE_PIN B6 [get_ports Adc2DataDb0P_i]
    8. 

  8. set_property PACKAGE_PIN A5 [get_ports Adc2DataDb1P_i]
    9. 

  9. 

  10. 

  11. #==========================================================================
    12. 

  12. #   TIMING CONSTRAINTS
    13. 

  13. 

  14. 

  15. #==========================================================================
    16. 

  16. #	INPUT CLOCKS
    17. 

  17. set_property PACKAGE_PIN C15 [get_ports Clk_i]
    18. 

  18. set_property IOSTANDARD LVCMOS25 [get_ports Clk_i]
    19. 

  19. create_clock -period 20.000 [get_ports Clk_i]
    20. 

  20. 

  21. #==========================================================================
    22. 

  22. #	ADC1
    23. 

  23. 

  24. set_property PACKAGE_PIN H1 [get_ports Adc1FclkP_i]
    25. 

  25. set_property IOSTANDARD LVDS_25 [get_ports Adc1FclkP_i]
    26. 

  26. set_property IOSTANDARD LVDS_25 [get_ports Adc1FclkN_i]
    27. 

  27. 

  28. set_property IOSTANDARD LVDS_25 [get_ports Adc1DataDa0P_i]
    29. 

  29. set_property IOSTANDARD LVDS_25 [get_ports Adc1DataDa0N_i]
    30. 

  30. 

  31. set_property IOSTANDARD LVDS_25 [get_ports Adc1DataDa1P_i]
    32. 

  32. set_property IOSTANDARD LVDS_25 [get_ports Adc1DataDa1N_i]
    33. 

  33. 

  34. set_property IOSTANDARD LVDS_25 [get_ports Adc1DataDb0P_i]
    35. 

  35. set_property IOSTANDARD LVDS_25 [get_ports Adc1DataDb0N_i]
    36. 

  36. 

  37. set_property IOSTANDARD LVDS_25 [get_ports Adc1DataDb1P_i]
    38. 

  38. set_property IOSTANDARD LVDS_25 [get_ports Adc1DataDb1N_i]
    39. 

  39. 

  40. #==========================================================================
    41. 

  41. #	ADC2
    42. 

  42. 

  43. set_property PACKAGE_PIN A11 [get_ports Adc2FclkP_i]
    44. 

  44. set_property IOSTANDARD LVDS_25 [get_ports Adc2FclkP_i]
    45. 

  45. set_property IOSTANDARD LVDS_25 [get_ports Adc2FclkN_i]
    46. 

  46. 

  47. set_property IOSTANDARD LVDS_25 [get_ports Adc2DataDa0P_i]
    48. 

  48. set_property IOSTANDARD LVDS_25 [get_ports Adc2DataDa0N_i]
    49. 

  49. 

  50. set_property IOSTANDARD LVDS_25 [get_ports Adc2DataDa1P_i]
    51. 

  51. set_property IOSTANDARD LVDS_25 [get_ports Adc2DataDa1N_i]
    52. 

  52. 

  53. set_property IOSTANDARD LVDS_25 [get_ports Adc2DataDb0P_i]
    54. 

  54. set_property IOSTANDARD LVDS_25 [get_ports Adc2DataDb0N_i]
    55. 

  55. 

  56. set_property IOSTANDARD LVDS_25 [get_ports Adc2DataDb1P_i]
    57. 

  57. set_property IOSTANDARD LVDS_25 [get_ports Adc2DataDb1N_i]
    58. 

  58. 

  59. #==========================================================================
    60. 

  60. # DSP interface
    61. 

  61. 

  62. set_property PACKAGE_PIN H14 [get_ports Miso_o]
    63. 

  63. set_property IOSTANDARD LVCMOS33 [get_ports Miso_o]
    64. 

  64. 

  65. set_property PACKAGE_PIN H15 [get_ports Mosi_i]
    66. 

  66. set_property IOSTANDARD LVCMOS33 [get_ports Mosi_i]
    67. 

  67. 

  68. set_property PACKAGE_PIN J12 [get_ports Ss_i]
    69. 

  69. set_property IOSTANDARD LVCMOS33 [get_ports Ss_i]
    70. 

  70. 

  71. set_property PACKAGE_PIN M9 [get_ports Sck_i]
    72. 

  72. set_property IOSTANDARD LVCMOS33 [get_ports Sck_i]
    73. 

  73. #create_clock -period 24.000 [get_ports Sck_i]
    74. 

  74. create_clock -period 16.000 [get_ports Sck_i]
    75. 

  75. 

  76. set_property PACKAGE_PIN N12 [get_ports LpOutClk_o]
    77. 

  77. set_property IOSTANDARD LVCMOS33 [get_ports LpOutClk_o]
    78. 

  78. 

  79. set_property PACKAGE_PIN P12 [get_ports LpOutFs_o]
    80. 

  80. set_property IOSTANDARD LVCMOS33 [get_ports LpOutFs_o]
    81. 

  81. 

  82. set_property PACKAGE_PIN L15 [get_ports {LpOutData_o[0]}]
    83. 

  83. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[0]}]
    84. 

  84. set_property PACKAGE_PIN L14 [get_ports {LpOutData_o[1]}]
    85. 

  85. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[1]}]
    86. 

  86. set_property PACKAGE_PIN M15 [get_ports {LpOutData_o[2]}]
    87. 

  87. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[2]}]
    88. 

  88. set_property PACKAGE_PIN M13 [get_ports {LpOutData_o[3]}]
    89. 

  89. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[3]}]
    90. 

  90. set_property PACKAGE_PIN N15 [get_ports {LpOutData_o[4]}]
    91. 

  91. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[4]}]
    92. 

  92. set_property PACKAGE_PIN M14 [get_ports {LpOutData_o[5]}]
    93. 

  93. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[5]}]
    94. 

  94. set_property PACKAGE_PIN P15 [get_ports {LpOutData_o[6]}]
    95. 

  95. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[6]}]
    96. 

  96. set_property PACKAGE_PIN N14 [get_ports {LpOutData_o[7]}]
    97. 

  97. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[7]}]
    98. 

  98. set_property PACKAGE_PIN P14 [get_ports {LpOutData_o[8]}]
    99. 

  99. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[8]}]
    100. 

  100. set_property PACKAGE_PIN R14 [get_ports {LpOutData_o[9]}]
    101. 

  101. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[9]}]
    102. 

  102. set_property PACKAGE_PIN N13 [get_ports {LpOutData_o[10]}]
    103. 

  103. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[10]}]
    104. 

  104. set_property PACKAGE_PIN R13 [get_ports {LpOutData_o[11]}]
    105. 

  105. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[11]}]
    106. 

  106. set_property PACKAGE_PIN R11 [get_ports {LpOutData_o[12]}]
    107. 

  107. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[12]}]
    108. 

  108. set_property PACKAGE_PIN P11 [get_ports {LpOutData_o[13]}]
    109. 

  109. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[13]}]
    110. 

  110. set_property PACKAGE_PIN R10 [get_ports {LpOutData_o[14]}]
    111. 

  111. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[14]}]
    112. 

  112. set_property PACKAGE_PIN P10 [get_ports {LpOutData_o[15]}]
    113. 

  113. set_property IOSTANDARD LVCMOS33 [get_ports {LpOutData_o[15]}]
    114. 

  114. 

  115. #==========================================================================
    116. 

  116. #  ADC SPI
    117. 

  117. 

  118. set_property PACKAGE_PIN B15 [get_ports AdcInitMosi_o]
    119. 

  119. set_property IOSTANDARD LVCMOS25 [get_ports AdcInitMosi_o]
    120. 

  120. set_property PACKAGE_PIN A13 [get_ports AdcInitClk_o]
    121. 

  121. set_property IOSTANDARD LVCMOS25 [get_ports AdcInitClk_o]
    122. 

  122. set_property PACKAGE_PIN B14 [get_ports Adc2InitCs_o]
    123. 

  123. set_property IOSTANDARD LVCMOS25 [get_ports Adc2InitCs_o]
    124. 

  124. set_property PACKAGE_PIN C14 [get_ports Adc1InitCs_o]
    125. 

  125. set_property IOSTANDARD LVCMOS25 [get_ports Adc1InitCs_o]
    126. 

  126. set_property PACKAGE_PIN A14 [get_ports AdcInitRst_o]
    127. 

  127. set_property IOSTANDARD LVCMOS25 [get_ports AdcInitRst_o]
    128. 

  128. #
    129. 

  129. #==========================================================================
    130. 

  130. #  OTHER
    131. 

  131. 

  132. set_property PACKAGE_PIN R6 [get_ports Led_o]
    133. 

  133. set_property IOSTANDARD LVCMOS33 [get_ports Led_o]
    134. 

  134. 

  135. set_property PACKAGE_PIN N11 [get_ports Overload_o]
    136. 

  136. set_property IOSTANDARD LVCMOS33 [get_ports Overload_o]
    137. 

  137. 

  138. set_property PACKAGE_PIN R8 [get_ports OverloadS_i]
    139. 

  139. set_property IOSTANDARD LVCMOS33 [get_ports OverloadS_i]
    140. 

  140. 

  141. set_property PACKAGE_PIN M10 [get_ports StartMeas_i]
    142. 

  142. set_property IOSTANDARD LVCMOS33 [get_ports StartMeas_i]
    143. 

  143. 

  144. set_property PACKAGE_PIN M8 [get_ports EndMeas_o]
    145. 

  145. set_property IOSTANDARD LVCMOS33 [get_ports EndMeas_o]
    146. 

  146. 

  147. set_property PACKAGE_PIN R9 [get_ports StartMeasEvent_o]
    148. 

  148. set_property IOSTANDARD LVCMOS33 [get_ports StartMeasEvent_o]
    149. 

  149. 

  150. set_property PACKAGE_PIN L13 [get_ports TimersClk_o]
    151. 

  151. set_property IOSTANDARD LVCMOS33 [get_ports TimersClk_o]
    152. 

  152. 

  153. set_property PACKAGE_PIN A2 [get_ports {AmpEn_o[0]}]
    154. 

  154. set_property IOSTANDARD LVCMOS25 [get_ports {AmpEn_o[0]}]
    155. 

  155. set_property PACKAGE_PIN B2 [get_ports {AmpEn_o[1]}]
    156. 

  156. set_property IOSTANDARD LVCMOS25 [get_ports {AmpEn_o[1]}]
    157. 

  157. set_property PACKAGE_PIN A3 [get_ports {AmpEn_o[2]}]
    158. 

  158. set_property IOSTANDARD LVCMOS25 [get_ports {AmpEn_o[2]}]
    159. 

  159. set_property PACKAGE_PIN A4 [get_ports {AmpEn_o[3]}]
    160. 

  160. set_property IOSTANDARD LVCMOS25 [get_ports {AmpEn_o[3]}]
    161. 

  161. 

  162. set_property PACKAGE_PIN J1 [get_ports {PortSel_o[0]}]
    163. 

  163. set_property IOSTANDARD LVCMOS25 [get_ports {PortSel_o[0]}]
    164. 

  164. set_property PACKAGE_PIN J2 [get_ports {PortSel_o[1]}]
    165. 

  165. set_property IOSTANDARD LVCMOS25 [get_ports {PortSel_o[1]}]
    166. 

  166. set_property PACKAGE_PIN R3 [get_ports {PortSel_o[2]}]
    167. 

  167. set_property IOSTANDARD LVCMOS25 [get_ports {PortSel_o[2]}]
    168. 

  168. set_property PACKAGE_PIN P3 [get_ports {PortSel_o[3]}]
    169. 

  169. set_property IOSTANDARD LVCMOS25 [get_ports {PortSel_o[3]}]
    170. 

  170. 

  171. set_property PACKAGE_PIN F14 [get_ports {PortSelDir_o[0]}]
    172. 

  172. set_property IOSTANDARD LVCMOS25 [get_ports {PortSelDir_o[0]}]
    173. 

  173. set_property PACKAGE_PIN F15 [get_ports {PortSelDir_o[1]}]
    174. 

  174. set_property IOSTANDARD LVCMOS25 [get_ports {PortSelDir_o[1]}]
    175. 

  175. set_property PACKAGE_PIN R4 [get_ports {PortSelDir_o[2]}]
    176. 

  176. set_property IOSTANDARD LVCMOS25 [get_ports {PortSelDir_o[2]}]
    177. 

  177. set_property PACKAGE_PIN M4 [get_ports {PortSelDir_o[3]}]
    178. 

  178. set_property IOSTANDARD LVCMOS25 [get_ports {PortSelDir_o[3]}]
    179. 

  179. 

  180. set_property PACKAGE_PIN R7 [get_ports DspReadyForRxToFpgaS_o]
    181. 

  181. set_property IOSTANDARD LVCMOS33 [get_ports DspReadyForRxToFpgaS_o]
    182. 

  182. 

  183. set_property PACKAGE_PIN R5 [get_ports DspReadyForRx_i]
    184. 

  184. set_property IOSTANDARD LVCMOS33 [get_ports DspReadyForRx_i]
    185. 

  185. 

  186. set_property PACKAGE_PIN P7 [get_ports StartMeasDsp_o]
    187. 

  187. set_property IOSTANDARD LVCMOS33 [get_ports StartMeasDsp_o]
    188. 

  188. 

  189. set_property PACKAGE_PIN E14 [get_ports Mod_o]
    190. 

  190. set_property IOSTANDARD LVCMOS25 [get_ports Mod_o]
    191. 

  191. 

  192. 

  193. set_property PACKAGE_PIN K15 [get_ports DspTrigOut_i]
    194. 

  194. set_property IOSTANDARD LVCMOS33 [get_ports DspTrigOut_i]
    195. 

  195. set_property PACKAGE_PIN K14 [get_ports DspTrigIn_o]
    196. 

  196. set_property IOSTANDARD LVCMOS33 [get_ports DspTrigIn_o]
    197. 

  197. 

  198. set_property PACKAGE_PIN D15 [get_ports {Trig6to1_io[0]}]
    199. 

  199. set_property IOSTANDARD LVCMOS25 [get_ports {Trig6to1_io[0]}]
    200. 

  200. set_property PACKAGE_PIN E15 [get_ports {Trig6to1_io[1]}]
    201. 

  201. set_property IOSTANDARD LVCMOS25 [get_ports {Trig6to1_io[1]}]
    202. 

  202. set_property PACKAGE_PIN P2 [get_ports {Trig6to1_io[2]}]
    203. 

  203. set_property IOSTANDARD LVCMOS25 [get_ports {Trig6to1_io[2]}]
    204. 

  204. set_property PACKAGE_PIN N4 [get_ports {Trig6to1_io[3]}]
    205. 

  205. set_property IOSTANDARD LVCMOS25 [get_ports {Trig6to1_io[3]}]
    206. 

  206. set_property PACKAGE_PIN P1 [get_ports {Trig6to1_io[4]}]
    207. 

  207. set_property IOSTANDARD LVCMOS25 [get_ports {Trig6to1_io[4]}]
    208. 

  208. set_property PACKAGE_PIN N2 [get_ports {Trig6to1_io[5]}]
    209. 

  209. set_property IOSTANDARD LVCMOS25 [get_ports {Trig6to1_io[5]}]
    210. 

  210. 

  211. set_property PACKAGE_PIN C13 [get_ports {Trig6to1Dir_o[0]}]
    212. 

  212. set_property IOSTANDARD LVCMOS25 [get_ports {Trig6to1Dir_o[0]}]
    213. 

  213. set_property PACKAGE_PIN B13 [get_ports {Trig6to1Dir_o[1]}]
    214. 

  214. set_property IOSTANDARD LVCMOS25 [get_ports {Trig6to1Dir_o[1]}]
    215. 

  215. set_property PACKAGE_PIN N3 [get_ports {Trig6to1Dir_o[2]}]
    216. 

  216. set_property IOSTANDARD LVCMOS25 [get_ports {Trig6to1Dir_o[2]}]
    217. 

  217. set_property PACKAGE_PIN R2 [get_ports {Trig6to1Dir_o[3]}]
    218. 

  218. set_property IOSTANDARD LVCMOS25 [get_ports {Trig6to1Dir_o[3]}]
    219. 

  219. set_property PACKAGE_PIN N1 [get_ports {Trig6to1Dir_o[4]}]
    220. 

  220. set_property IOSTANDARD LVCMOS25 [get_ports {Trig6to1Dir_o[4]}]
    221. 

  221. set_property PACKAGE_PIN M3 [get_ports {Trig6to1Dir_o[5]}]
    222. 

  222. set_property IOSTANDARD LVCMOS25 [get_ports {Trig6to1Dir_o[5]}]
    223. 

  223. 

  224. set_property PACKAGE_PIN M1 [get_ports DitherCtrlCh1_o]
    225. 

  225. set_property IOSTANDARD LVCMOS25 [get_ports DitherCtrlCh1_o]
    226. 

  226. 

  227. set_property PACKAGE_PIN M2 [get_ports DitherCtrlCh2_o]
    228. 

  228. set_property IOSTANDARD LVCMOS25 [get_ports DitherCtrlCh2_o]
    229. 

  229. 

  230. set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets Ss_i_IBUF]
    231. 

  231. 

  232. #set_false_path -from [get_clocks -of_objects [get_pins Clk200Gen/rx_plle2_adv_inst/CLKOUT0]] -to [get_clocks -of_objects [get_pins Clk200Gen/rx_plle2_adv_inst/CLKOUT0]]
    233. 

  233. 

  234. 

  235. 

  236. 

  237. 

  238. 

  239. 

  240. 

  241. create_debug_core u_ila_0 ila
    242. 

  242. set_property ALL_PROBE_SAME_MU true [get_debug_cores u_ila_0]
    243. 

  243. set_property ALL_PROBE_SAME_MU_CNT 1 [get_debug_cores u_ila_0]
    244. 

  244. set_property C_ADV_TRIGGER false [get_debug_cores u_ila_0]
    245. 

  245. set_property C_DATA_DEPTH 1024 [get_debug_cores u_ila_0]
    246. 

  246. set_property C_EN_STRG_QUAL false [get_debug_cores u_ila_0]
    247. 

  247. set_property C_INPUT_PIPE_STAGES 0 [get_debug_cores u_ila_0]
    248. 

  248. set_property C_TRIGIN_EN false [get_debug_cores u_ila_0]
    249. 

  249. set_property C_TRIGOUT_EN false [get_debug_cores u_ila_0]
    250. 

  250. set_property port_width 1 [get_debug_ports u_ila_0/clk]
    251. 

  251. connect_debug_port u_ila_0/clk [get_nets [list gclk_BUFG]]
    252. 

  252. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe0]
    253. 

  253. set_property port_width 2 [get_debug_ports u_ila_0/probe0]
    254. 

  254. connect_debug_port u_ila_0/probe0 [get_nets [list {ExternalDspInterface/PortSel_i[0]} {ExternalDspInterface/PortSel_i[1]}]]
    255. 

  255. create_debug_port u_ila_0 probe
    256. 

  256. set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe1]
    257. 

  257. set_property port_width 256 [get_debug_ports u_ila_0/probe1]
    258. 

  258. connect_debug_port u_ila_0/probe1 [get_nets [list {ExternalDspInterface/dataForFifo[0]} {ExternalDspInterface/dataForFifo[1]} {ExternalDspInterface/dataForFifo[2]} {ExternalDspInterface/dataForFifo[3]} {ExternalDspInterface/dataForFifo[4]} {ExternalDspInterface/dataForFifo[5]} {ExternalDspInterface/dataForFifo[6]} {ExternalDspInterface/dataForFifo[7]} {ExternalDspInterface/dataForFifo[8]} {ExternalDspInterface/dataForFifo[9]} {ExternalDspInterface/dataForFifo[10]} {ExternalDspInterface/dataForFifo[11]} {ExternalDspInterface/dataForFifo[12]} {ExternalDspInterface/dataForFifo[13]} {ExternalDspInterface/dataForFifo[14]} {ExternalDspInterface/dataForFifo[15]} {ExternalDspInterface/dataForFifo[16]} {ExternalDspInterface/dataForFifo[17]} {ExternalDspInterface/dataForFifo[18]} {ExternalDspInterface/dataForFifo[19]} {ExternalDspInterface/dataForFifo[20]} {ExternalDspInterface/dataForFifo[21]} {ExternalDspInterface/dataForFifo[22]} {ExternalDspInterface/dataForFifo[23]} {ExternalDspInterface/dataForFifo[24]} {ExternalDspInterface/dataForFifo[25]} {ExternalDspInterface/dataForFifo[26]} {ExternalDspInterface/dataForFifo[27]} {ExternalDspInterface/dataForFifo[28]} {ExternalDspInterface/dataForFifo[29]} {ExternalDspInterface/dataForFifo[30]} {ExternalDspInterface/dataForFifo[31]} {ExternalDspInterface/dataForFifo[32]} {ExternalDspInterface/dataForFifo[33]} {ExternalDspInterface/dataForFifo[34]} {ExternalDspInterface/dataForFifo[35]} {ExternalDspInterface/dataForFifo[36]} {ExternalDspInterface/dataForFifo[37]} {ExternalDspInterface/dataForFifo[38]} {ExternalDspInterface/dataForFifo[39]} {ExternalDspInterface/dataForFifo[40]} {ExternalDspInterface/dataForFifo[41]} {ExternalDspInterface/dataForFifo[42]} {ExternalDspInterface/dataForFifo[43]} {ExternalDspInterface/dataForFifo[44]} {ExternalDspInterface/dataForFifo[45]} {ExternalDspInterface/dataForFifo[46]} {ExternalDspInterface/dataForFifo[47]} {ExternalDspInterface/dataForFifo[48]} {ExternalDspInterface/dataForFifo[49]} {ExternalDspInterface/dataForFifo[50]} {ExternalDspInterface/dataForFifo[51]} {ExternalDspInterface/dataForFifo[52]} {ExternalDspInterface/dataForFifo[53]} {ExternalDspInterface/dataForFifo[54]} {ExternalDspInterface/dataForFifo[55]} {ExternalDspInterface/dataForFifo[56]} {ExternalDspInterface/dataForFifo[57]} {ExternalDspInterface/dataForFifo[58]} {ExternalDspInterface/dataForFifo[59]} {ExternalDspInterface/dataForFifo[60]} {ExternalDspInterface/dataForFifo[61]} {ExternalDspInterface/dataForFifo[62]} {ExternalDspInterface/dataForFifo[63]} {ExternalDspInterface/dataForFifo[64]} {ExternalDspInterface/dataForFifo[65]} {ExternalDspInterface/dataForFifo[66]} {ExternalDspInterface/dataForFifo[67]} {ExternalDspInterface/dataForFifo[68]} {ExternalDspInterface/dataForFifo[69]} {ExternalDspInterface/dataForFifo[70]} {ExternalDspInterface/dataForFifo[71]} {ExternalDspInterface/dataForFifo[72]} {ExternalDspInterface/dataForFifo[73]} {ExternalDspInterface/dataForFifo[74]} {ExternalDspInterface/dataForFifo[75]} {ExternalDspInterface/dataForFifo[76]} {ExternalDspInterface/dataForFifo[77]} {ExternalDspInterface/dataForFifo[78]} {ExternalDspInterface/dataForFifo[79]} {ExternalDspInterface/dataForFifo[80]} {ExternalDspInterface/dataForFifo[81]} {ExternalDspInterface/dataForFifo[82]} {ExternalDspInterface/dataForFifo[83]} {ExternalDspInterface/dataForFifo[84]} {ExternalDspInterface/dataForFifo[85]} {ExternalDspInterface/dataForFifo[86]} {ExternalDspInterface/dataForFifo[87]} {ExternalDspInterface/dataForFifo[88]} {ExternalDspInterface/dataForFifo[89]} {ExternalDspInterface/dataForFifo[90]} {ExternalDspInterface/dataForFifo[91]} {ExternalDspInterface/dataForFifo[92]} {ExternalDspInterface/dataForFifo[93]} {ExternalDspInterface/dataForFifo[94]} {ExternalDspInterface/dataForFifo[95]} {ExternalDspInterface/dataForFifo[96]} {ExternalDspInterface/dataForFifo[97]} {ExternalDspInterface/dataForFifo[98]} {ExternalDspInterface/dataForFifo[99]} {ExternalDspInterface/dataForFifo[100]} {ExternalDspInterface/dataForFifo[101]} {ExternalDspInterface/dataForFifo[102]} {ExternalDspInterface/dataForFifo[103]} {ExternalDspInterface/dataForFifo[104]} {ExternalDspInterface/dataForFifo[105]} {ExternalDspInterface/dataForFifo[106]} {ExternalDspInterface/dataForFifo[107]} {ExternalDspInterface/dataForFifo[108]} {ExternalDspInterface/dataForFifo[109]} {ExternalDspInterface/dataForFifo[110]} {ExternalDspInterface/dataForFifo[111]} {ExternalDspInterface/dataForFifo[112]} {ExternalDspInterface/dataForFifo[113]} {ExternalDspInterface/dataForFifo[114]} {ExternalDspInterface/dataForFifo[115]} {ExternalDspInterface/dataForFifo[116]} {ExternalDspInterface/dataForFifo[117]} {ExternalDspInterface/dataForFifo[118]} {ExternalDspInterface/dataForFifo[119]} {ExternalDspInterface/dataForFifo[120]} {ExternalDspInterface/dataForFifo[121]} {ExternalDspInterface/dataForFifo[122]} {ExternalDspInterface/dataForFifo[123]} {ExternalDspInterface/dataForFifo[124]} {ExternalDspInterface/dataForFifo[125]} {ExternalDspInterface/dataForFifo[126]} {ExternalDspInterface/dataForFifo[127]} {ExternalDspInterface/dataForFifo[128]} {ExternalDspInterface/dataForFifo[129]} {ExternalDspInterface/dataForFifo[130]} {ExternalDspInterface/dataForFifo[131]} {ExternalDspInterface/dataForFifo[132]} {ExternalDspInterface/dataForFifo[133]} {ExternalDspInterface/dataForFifo[134]} {ExternalDspInterface/dataForFifo[135]} {ExternalDspInterface/dataForFifo[136]} {ExternalDspInterface/dataForFifo[137]} {ExternalDspInterface/dataForFifo[138]} {ExternalDspInterface/dataForFifo[139]} {ExternalDspInterface/dataForFifo[140]} {ExternalDspInterface/dataForFifo[141]} {ExternalDspInterface/dataForFifo[142]} {ExternalDspInterface/dataForFifo[143]} {ExternalDspInterface/dataForFifo[144]} {ExternalDspInterface/dataForFifo[145]} {ExternalDspInterface/dataForFifo[146]} {ExternalDspInterface/dataForFifo[147]} {ExternalDspInterface/dataForFifo[148]} {ExternalDspInterface/dataForFifo[149]} {ExternalDspInterface/dataForFifo[150]} {ExternalDspInterface/dataForFifo[151]} {ExternalDspInterface/dataForFifo[152]} {ExternalDspInterface/dataForFifo[153]} {ExternalDspInterface/dataForFifo[154]} {ExternalDspInterface/dataForFifo[155]} {ExternalDspInterface/dataForFifo[156]} {ExternalDspInterface/dataForFifo[157]} {ExternalDspInterface/dataForFifo[158]} {ExternalDspInterface/dataForFifo[159]} {ExternalDspInterface/dataForFifo[160]} {ExternalDspInterface/dataForFifo[161]} {ExternalDspInterface/dataForFifo[162]} {ExternalDspInterface/dataForFifo[163]} {ExternalDspInterface/dataForFifo[164]} {ExternalDspInterface/dataForFifo[165]} {ExternalDspInterface/dataForFifo[166]} {ExternalDspInterface/dataForFifo[167]} {ExternalDspInterface/dataForFifo[168]} {ExternalDspInterface/dataForFifo[169]} {ExternalDspInterface/dataForFifo[170]} {ExternalDspInterface/dataForFifo[171]} {ExternalDspInterface/dataForFifo[172]} {ExternalDspInterface/dataForFifo[173]} {ExternalDspInterface/dataForFifo[174]} {ExternalDspInterface/dataForFifo[175]} {ExternalDspInterface/dataForFifo[176]} {ExternalDspInterface/dataForFifo[177]} {ExternalDspInterface/dataForFifo[178]} {ExternalDspInterface/dataForFifo[179]} {ExternalDspInterface/dataForFifo[180]} {ExternalDspInterface/dataForFifo[181]} {ExternalDspInterface/dataForFifo[182]} {ExternalDspInterface/dataForFifo[183]} {ExternalDspInterface/dataForFifo[184]} {ExternalDspInterface/dataForFifo[185]} {ExternalDspInterface/dataForFifo[186]} {ExternalDspInterface/dataForFifo[187]} {ExternalDspInterface/dataForFifo[188]} {ExternalDspInterface/dataForFifo[189]} {ExternalDspInterface/dataForFifo[190]} {ExternalDspInterface/dataForFifo[191]} {ExternalDspInterface/dataForFifo[192]} {ExternalDspInterface/dataForFifo[193]} {ExternalDspInterface/dataForFifo[194]} {ExternalDspInterface/dataForFifo[195]} {ExternalDspInterface/dataForFifo[196]} {ExternalDspInterface/dataForFifo[197]} {ExternalDspInterface/dataForFifo[198]} {ExternalDspInterface/dataForFifo[199]} {ExternalDspInterface/dataForFifo[200]} {ExternalDspInterface/dataForFifo[201]} {ExternalDspInterface/dataForFifo[202]} {ExternalDspInterface/dataForFifo[203]} {ExternalDspInterface/dataForFifo[204]} {ExternalDspInterface/dataForFifo[205]} {ExternalDspInterface/dataForFifo[206]} {ExternalDspInterface/dataForFifo[207]} {ExternalDspInterface/dataForFifo[208]} {ExternalDspInterface/dataForFifo[209]} {ExternalDspInterface/dataForFifo[210]} {ExternalDspInterface/dataForFifo[211]} {ExternalDspInterface/dataForFifo[212]} {ExternalDspInterface/dataForFifo[213]} {ExternalDspInterface/dataForFifo[214]} {ExternalDspInterface/dataForFifo[215]} {ExternalDspInterface/dataForFifo[216]} {ExternalDspInterface/dataForFifo[217]} {ExternalDspInterface/dataForFifo[218]} {ExternalDspInterface/dataForFifo[219]} {ExternalDspInterface/dataForFifo[220]} {ExternalDspInterface/dataForFifo[221]} {ExternalDspInterface/dataForFifo[222]} {ExternalDspInterface/dataForFifo[223]} {ExternalDspInterface/dataForFifo[224]} {ExternalDspInterface/dataForFifo[225]} {ExternalDspInterface/dataForFifo[226]} {ExternalDspInterface/dataForFifo[227]} {ExternalDspInterface/dataForFifo[228]} {ExternalDspInterface/dataForFifo[229]} {ExternalDspInterface/dataForFifo[230]} {ExternalDspInterface/dataForFifo[231]} {ExternalDspInterface/dataForFifo[232]} {ExternalDspInterface/dataForFifo[233]} {ExternalDspInterface/dataForFifo[234]} {ExternalDspInterface/dataForFifo[235]} {ExternalDspInterface/dataForFifo[236]} {ExternalDspInterface/dataForFifo[237]} {ExternalDspInterface/dataForFifo[238]} {ExternalDspInterface/dataForFifo[239]} {ExternalDspInterface/dataForFifo[240]} {ExternalDspInterface/dataForFifo[241]} {ExternalDspInterface/dataForFifo[242]} {ExternalDspInterface/dataForFifo[243]} {ExternalDspInterface/dataForFifo[244]} {ExternalDspInterface/dataForFifo[245]} {ExternalDspInterface/dataForFifo[246]} {ExternalDspInterface/dataForFifo[247]} {ExternalDspInterface/dataForFifo[248]} {ExternalDspInterface/dataForFifo[249]} {ExternalDspInterface/dataForFifo[250]} {ExternalDspInterface/dataForFifo[251]} {ExternalDspInterface/dataForFifo[252]} {ExternalDspInterface/dataForFifo[253]} {ExternalDspInterface/dataForFifo[254]} {ExternalDspInterface/dataForFifo[255]}]]
    259. 

  259. create_debug_port u_ila_0 probe
    260. 

  260. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe2]
    261. 

  261. set_property port_width 14 [get_debug_ports u_ila_0/probe2]
    262. 

  262. connect_debug_port u_ila_0/probe2 [get_nets [list {ExternalDspInterface/currDataChannel[0]} {ExternalDspInterface/currDataChannel[1]} {ExternalDspInterface/currDataChannel[2]} {ExternalDspInterface/currDataChannel[3]} {ExternalDspInterface/currDataChannel[4]} {ExternalDspInterface/currDataChannel[5]} {ExternalDspInterface/currDataChannel[6]} {ExternalDspInterface/currDataChannel[7]} {ExternalDspInterface/currDataChannel[8]} {ExternalDspInterface/currDataChannel[9]} {ExternalDspInterface/currDataChannel[10]} {ExternalDspInterface/currDataChannel[11]} {ExternalDspInterface/currDataChannel[12]} {ExternalDspInterface/currDataChannel[13]}]]
    263. 

  263. create_debug_port u_ila_0 probe
    264. 

  264. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe3]
    265. 

  265. set_property port_width 14 [get_debug_ports u_ila_0/probe3]
    266. 

  266. connect_debug_port u_ila_0/probe3 [get_nets [list {ExternalDspInterface/Adc1ChR1Data_i[0]} {ExternalDspInterface/Adc1ChR1Data_i[1]} {ExternalDspInterface/Adc1ChR1Data_i[2]} {ExternalDspInterface/Adc1ChR1Data_i[3]} {ExternalDspInterface/Adc1ChR1Data_i[4]} {ExternalDspInterface/Adc1ChR1Data_i[5]} {ExternalDspInterface/Adc1ChR1Data_i[6]} {ExternalDspInterface/Adc1ChR1Data_i[7]} {ExternalDspInterface/Adc1ChR1Data_i[8]} {ExternalDspInterface/Adc1ChR1Data_i[9]} {ExternalDspInterface/Adc1ChR1Data_i[10]} {ExternalDspInterface/Adc1ChR1Data_i[11]} {ExternalDspInterface/Adc1ChR1Data_i[12]} {ExternalDspInterface/Adc1ChR1Data_i[13]}]]
    267. 

  267. create_debug_port u_ila_0 probe
    268. 

  268. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe4]
    269. 

  269. set_property port_width 14 [get_debug_ports u_ila_0/probe4]
    270. 

  270. connect_debug_port u_ila_0/probe4 [get_nets [list {ExternalDspInterface/Adc1ChT1Data_i[0]} {ExternalDspInterface/Adc1ChT1Data_i[1]} {ExternalDspInterface/Adc1ChT1Data_i[2]} {ExternalDspInterface/Adc1ChT1Data_i[3]} {ExternalDspInterface/Adc1ChT1Data_i[4]} {ExternalDspInterface/Adc1ChT1Data_i[5]} {ExternalDspInterface/Adc1ChT1Data_i[6]} {ExternalDspInterface/Adc1ChT1Data_i[7]} {ExternalDspInterface/Adc1ChT1Data_i[8]} {ExternalDspInterface/Adc1ChT1Data_i[9]} {ExternalDspInterface/Adc1ChT1Data_i[10]} {ExternalDspInterface/Adc1ChT1Data_i[11]} {ExternalDspInterface/Adc1ChT1Data_i[12]} {ExternalDspInterface/Adc1ChT1Data_i[13]}]]
    271. 

  271. create_debug_port u_ila_0 probe
    272. 

  272. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe5]
    273. 

  273. set_property port_width 14 [get_debug_ports u_ila_0/probe5]
    274. 

  274. connect_debug_port u_ila_0/probe5 [get_nets [list {ExternalDspInterface/Adc2ChR2Data_i[0]} {ExternalDspInterface/Adc2ChR2Data_i[1]} {ExternalDspInterface/Adc2ChR2Data_i[2]} {ExternalDspInterface/Adc2ChR2Data_i[3]} {ExternalDspInterface/Adc2ChR2Data_i[4]} {ExternalDspInterface/Adc2ChR2Data_i[5]} {ExternalDspInterface/Adc2ChR2Data_i[6]} {ExternalDspInterface/Adc2ChR2Data_i[7]} {ExternalDspInterface/Adc2ChR2Data_i[8]} {ExternalDspInterface/Adc2ChR2Data_i[9]} {ExternalDspInterface/Adc2ChR2Data_i[10]} {ExternalDspInterface/Adc2ChR2Data_i[11]} {ExternalDspInterface/Adc2ChR2Data_i[12]} {ExternalDspInterface/Adc2ChR2Data_i[13]}]]
    275. 

  275. create_debug_port u_ila_0 probe
    276. 

  276. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe6]
    277. 

  277. set_property port_width 14 [get_debug_ports u_ila_0/probe6]
    278. 

  278. connect_debug_port u_ila_0/probe6 [get_nets [list {ExternalDspInterface/currDataChannelDecim[0]} {ExternalDspInterface/currDataChannelDecim[1]} {ExternalDspInterface/currDataChannelDecim[2]} {ExternalDspInterface/currDataChannelDecim[3]} {ExternalDspInterface/currDataChannelDecim[4]} {ExternalDspInterface/currDataChannelDecim[5]} {ExternalDspInterface/currDataChannelDecim[6]} {ExternalDspInterface/currDataChannelDecim[7]} {ExternalDspInterface/currDataChannelDecim[8]} {ExternalDspInterface/currDataChannelDecim[9]} {ExternalDspInterface/currDataChannelDecim[10]} {ExternalDspInterface/currDataChannelDecim[11]} {ExternalDspInterface/currDataChannelDecim[12]} {ExternalDspInterface/currDataChannelDecim[13]}]]
    279. 

  279. create_debug_port u_ila_0 probe
    280. 

  280. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe7]
    281. 

  281. set_property port_width 14 [get_debug_ports u_ila_0/probe7]
    282. 

  282. connect_debug_port u_ila_0/probe7 [get_nets [list {ExternalDspInterface/Adc2ChT2Data_i[0]} {ExternalDspInterface/Adc2ChT2Data_i[1]} {ExternalDspInterface/Adc2ChT2Data_i[2]} {ExternalDspInterface/Adc2ChT2Data_i[3]} {ExternalDspInterface/Adc2ChT2Data_i[4]} {ExternalDspInterface/Adc2ChT2Data_i[5]} {ExternalDspInterface/Adc2ChT2Data_i[6]} {ExternalDspInterface/Adc2ChT2Data_i[7]} {ExternalDspInterface/Adc2ChT2Data_i[8]} {ExternalDspInterface/Adc2ChT2Data_i[9]} {ExternalDspInterface/Adc2ChT2Data_i[10]} {ExternalDspInterface/Adc2ChT2Data_i[11]} {ExternalDspInterface/Adc2ChT2Data_i[12]} {ExternalDspInterface/Adc2ChT2Data_i[13]}]]
    283. 

  283. create_debug_port u_ila_0 probe
    284. 

  284. set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe8]
    285. 

  285. set_property port_width 1 [get_debug_ports u_ila_0/probe8]
    286. 

  286. connect_debug_port u_ila_0/probe8 [get_nets [list oscWind]]
    287. 

  287. set_property C_CLK_INPUT_FREQ_HZ 300000000 [get_debug_cores dbg_hub]
    288. 

  288. set_property C_ENABLE_CLK_DIVIDER false [get_debug_cores dbg_hub]
    289. 

  289. set_property C_USER_SCAN_CHAIN 1 [get_debug_cores dbg_hub]
    290. 

  290. connect_debug_port dbg_hub/clk [get_nets gclk_BUFG]
    291.