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Заменил назначение пинов для совместимости с LO

Anatoliy Chigirinskiy 11 月之前
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15911e2d17
共有 2 個文件被更改,包括 65 次插入65 次删除
  1. 60 60
      constrs_1/new/S5443_3.xdc
  2. 5 5
      sources_1/new/S5443_3Top.v

File diff suppressed because it is too large
+ 60 - 60
constrs_1/new/S5443_3.xdc


+ 5 - 5
sources_1/new/S5443_3Top.v

@@ -43,13 +43,13 @@ module S5443_3Top
 	output [SPI_NUM-1:0] Mosi0_o, 
 	inout  [SPI_NUM-1:0] Mosi1_io,	//inout: when RSPI mode, input; when QSPI mode output; 
 	output [SPI_NUM-1:0] Mosi2_o,
-	output [SPI_NUM-2:0] Mosi3_o,
+	output [SPI_NUM-1:0] Mosi3_o,
 	output [SPI_NUM-1:0] Ss_o,
 	output [SPI_NUM-1:0] SsFlash_o,
 	output [SPI_NUM-1:0] Sck_o,
 	output [SPI_NUM-1:0] SpiRst_o,
 	output [SPI_NUM-1:0] SpiDir_o,
-	output LoCsReg_o,
+	// output LoCsReg_o,
 	output LD_o
 );
 
@@ -261,11 +261,11 @@ module S5443_3Top
 	assign Mosi3_o[2] = mosi3[2];
 	assign Mosi3_o[3] = mosi3[3];
 	assign Mosi3_o[4] = mosi3[4];
-	// assign Mosi3_o[5] = mosi3[5];
-	assign Mosi3_o[5] = mosi3[6];// Mosi6 
+	assign Mosi3_o[5] = mosi3[5];
+	assign Mosi3_o[6] = mosi3[6];// Mosi6 
 
 	assign Ss_o		 = ssW;
-	assign LoCsReg_o = ssW[5];
+	// assign LoCsReg_o = ssW[5];
 	
 	assign widthSel[0] = spi0CtrlRR[6:5];
 	assign widthSel[1] = spi1CtrlRR[6:5];