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@@ -11,14 +11,17 @@ reg Rst_i;
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reg [10:0] SmcAddr_i;
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reg [15:0]SmcData_i;
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reg SmcAre_i;
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+wire smcAre;
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reg SmcAwe_i;
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wire SmcAmsN_i;
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wire [1:0] SmcBe_i;
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-reg SmcAoe_i;
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+wire SmcAoe_i;
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reg [31:0] tb_cnt;
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wire [15:0] smcData;
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reg mosi1reg;
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+reg minorByte;
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+reg [1:0] areCnt;
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//***********************************************
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// SPI0 Adresses
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//***********************************************
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@@ -219,10 +222,12 @@ localparam GPIOAddr = 11'hFF0;
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//***********************************************
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// ASSIGNS
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//***********************************************
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-assign SmcBe_i = (tb_cnt >0 && tb_cnt <=44) ? 2'b00 : 2'b11;
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+assign SmcBe_i = (tb_cnt >0 && tb_cnt <=374) ? 2'b00 : 2'b11;
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assign SmcAmsN_i = (tb_cnt > 0 && tb_cnt <= 44) ? 1'b0 : 1'b1;
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-assign smcData = SmcData_i;
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+assign SmcAoe_i = (tb_cnt > 330 && tb_cnt <= 374) ? 1'b0 : 1'b1;
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+assign smcData = (!SmcAoe_i && !SmcAre_i) ? 16'bz:SmcData_i;
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assign mosi1_io = (!Mode0) ? mosi0_o : 1'bz;
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+assign smcAre = SmcAre_i;
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//***********************************************
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// CLOCK GENERATION
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@@ -236,7 +241,7 @@ always #(CLK_PERIOD/2) Clk_i = ~Clk_i;
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.SmcData_io(smcData),
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.SmcAwe_i(SmcAwe_i),
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.SmcAmsN_i(SmcAmsN_i),
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- .SmcAre_i(SmcAre_i),
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+ .SmcAre_i(smcAre),
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.SmcBe_i(SmcBe_i),
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.SmcAoe_i(SmcAoe_i),
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.Led_o(),
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@@ -270,11 +275,26 @@ always @(posedge Clk_i) begin
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end
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end
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-
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-
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-
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-
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+always @(posedge Clk_i) begin
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+ if (Rst_i) begin
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+ SmcAre_i <= 1'b1;
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+ end
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+ else begin
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+ if (tb_cnt > 330 && tb_cnt <= 374) begin
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+ if (tb_cnt % 2 == 0) begin
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+ SmcAre_i <= 1'b0;
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+ end
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+ else begin
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+ SmcAre_i <= 1'b1;
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+ end
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+ end
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+ else begin
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+ SmcAre_i <= 1'b1;
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+ end
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+ end
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+end
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+
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always @(posedge Clk_i) begin
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if (Rst_i) begin
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SmcAddr_i <= 0;
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@@ -311,18 +331,53 @@ always @(posedge Clk_i) begin
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end
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endcase
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end
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- else begin
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- if (tb_cnt % 2 != 0) begin
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- SmcAddr_i <= Spi0TxFifoAddrL;
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+ else begin
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+ if (tb_cnt <= 44) begin
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+ if (tb_cnt % 2 != 0) begin
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+ SmcAddr_i <= Spi0TxFifoAddrL;
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+ end
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+ else begin
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+ SmcAddr_i <= Spi0TxFifoAddrM;
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+ end
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end
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else begin
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- SmcAddr_i <= Spi0TxFifoAddrM;
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+ if (tb_cnt % 2 == 0) begin
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+ if (minorByte != 0) begin
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+ SmcAddr_i <= Spi0RxFifoAddrL;
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+ end
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+ else begin
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+ SmcAddr_i <= Spi0RxFifoAddrM;
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+ end
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+ end
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end
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end
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end
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end
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+always @(posedge Clk_i) begin
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+ if (Rst_i) begin
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+ areCnt <= 2'b0;
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+ end
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+ else begin
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+ if (!SmcAre_i) begin
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+ areCnt <= areCnt+1;
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+ end
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+ else begin
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+ areCnt <= 2'b0;
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+ end
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+ end
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+end
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+
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+always @(posedge Clk_i) begin
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+ if (SmcAddr_i == Spi0RxFifoAddrM) begin
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+ minorByte <= 1'b1;
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+ end
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+ else begin
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+ minorByte <= 1'b0;
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+ end
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+end
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+
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always @(posedge Clk_i) begin
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if (Rst_i) begin
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SmcData_i <= 16'h0;
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@@ -359,7 +414,8 @@ always @(posedge Clk_i) begin
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end
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endcase
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end
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- else begin
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+ else begin
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+ if (tb_cnt <300)
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SmcData_i <= $urandom_range(0, 8'hFF);
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end
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end
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@@ -369,16 +425,16 @@ always @(posedge Clk_i) begin
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if (Rst_i) begin
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tb_cnt <= 0;
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end
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- else begin
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- tb_cnt <= tb_cnt + 1;
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+ else begin
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+ if (SmcAre_i) begin
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+ tb_cnt <= tb_cnt + 1;
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+ end
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end
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end
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initial begin
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Clk_i = 1'b0;
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Rst_i = 1'b1;
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- SmcAre_i = 1'b1;
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- SmcAoe_i = 1'b1;
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#(CLK_PERIOD*300) Rst_i = 1'b0;
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