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sources_1/new/QuadSPI/QuadSPIm.v

@@ -42,6 +42,8 @@ module QuadSPIm(
     reg [3:0] ssNum;
     reg [2:0] delayCnt;
     reg stopFlag;
+	
+	wire [31:0] txLenght = ssNum+Lag_i+Lead_i;
 //================================================================================
 //  ASSIGNMENTS
 //================================================================================
@@ -144,163 +146,210 @@ module QuadSPIm(
     
     
     always @(*) begin
-        if (SelSt_i) begin 
-            if (PulsePol_i) begin 
-                if (ClockPhase_i) begin
-                    if (Lead_i == 0) begin 
-                        if (!ss && (ssCnt <= ssNum+Lag_i+Lead_i && ssCnt > Lag_i) ) begin 
-                            Sck_o = ~(~Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                    else begin 
-                        if (!ss && (ssCnt < ssNum+Lag_i+Lead_i && ssCnt > Lag_i)) begin 
-                            Sck_o = ~(~Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                end
-                else begin
-                    if (Lead_i == 0) begin 
-                        if (!ss && (ssCnt <= ssNum+Lag_i+Lead_i && ssCnt > Lag_i) ) begin 
-                            Sck_o = ~(Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                    else begin 
-                        if (!ss && (ssCnt < ssNum + Lag_i + Lead_i && ssCnt > Lag_i)) begin 
-                            Sck_o = ~(Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                end
-            end
-            else begin 
-                if (ClockPhase_i) begin
-                    if (Lead_i == 0) begin  
-                        if (!ss && (ssCnt <= ssNum+Lag_i+Lead_i && ssCnt > Lag_i) ) begin 
-                            Sck_o = ~(Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                    else begin 
-                        if (!ss && (ssCnt <ssNum + Lag_i + Lag_i && ssCnt > Lag_i)) begin 
-                            Sck_o = ~(Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                end 
-                else begin
-                    if (Lead_i == 0) begin 
-                        if (!ss && (ssCnt <= ssNum+Lag_i+Lead_i && ssCnt > Lag_i) ) begin 
-                            Sck_o = ~(~Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                    else begin 
-                        if (!ss && (ssCnt < ssNum + Lag_i + Lead_i && ssCnt > Lag_i)) begin 
-                            Sck_o = ~(~Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                end
-            end
-        end
-        else begin 
-              if (PulsePol_i) begin 
-                if (ClockPhase_i) begin
-                    if (Lead_i == 0) begin 
-                        if (ss && (ssCnt <= ssNum+Lag_i+Lead_i && ssCnt > Lag_i) ) begin 
-                            Sck_o = ~(~Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                    else begin 
-                        if (ss && (ssCnt < ssNum+Lag_i+Lead_i && ssCnt > Lag_i)) begin 
-                            Sck_o = ~(~Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                end
-                else begin
-                    if (Lead_i == 0) begin 
-                        if (ss && (ssCnt <= ssNum+Lag_i+Lead_i && ssCnt > Lag_i) ) begin 
-                            Sck_o = ~(Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                    else begin 
-                        if (ss && (ssCnt < ssNum + Lag_i + Lead_i && ssCnt > Lag_i)) begin 
-                            Sck_o = ~(Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                end
-            end
-            else begin 
-                if (ClockPhase_i) begin
-                    if (Lead_i == 0) begin  
-                        if (ss && (ssCnt <= ssNum+Lag_i+Lead_i && ssCnt > Lag_i) ) begin 
-                            Sck_o = ~(Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                    else begin 
-                        if (ss && (ssCnt <ssNum + Lag_i + Lag_i && ssCnt > Lag_i)) begin 
-                            Sck_o = ~(Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                end 
-                else begin
-                    if (Lead_i == 0) begin 
-                        if (ss && (ssCnt <= ssNum+Lag_i+Lead_i && ssCnt > Lag_i) ) begin 
-                            Sck_o = ~(~Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                    else begin 
-                        if (ss && (ssCnt < ssNum + Lag_i + Lead_i && ssCnt > Lag_i)) begin 
-                            Sck_o = ~(~Clk_i);
-                        end
-                        else begin 
-                            Sck_o = 1'b0;
-                        end
-                    end
-                end
-            end
-        end
-            
+		if (Stop_i != 0) begin
+			if (SelSt_i) begin 
+				if (PulsePol_i) begin 
+					if (ClockPhase_i) begin
+						if (Lead_i == 0) begin 
+							if (!ss && (ssCnt <= txLenght-1 && ssCnt > Lag_i) ) begin 
+								Sck_o = ~(~Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+						else begin 
+							if (!ss && (ssCnt < txLenght-1 && ssCnt > Lag_i)) begin 
+								Sck_o = ~(~Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+					end
+					else begin
+						if (Lead_i == 0) begin 
+							if (!ss && (ssCnt <= txLenght-1 && ssCnt > Lag_i) ) begin 
+								Sck_o = ~(Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+						else begin 
+							if (!ss && (ssCnt < txLenght-1 && ssCnt > Lag_i)) begin 
+								Sck_o = ~(Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+					end
+				end
+				else begin 
+					if (ClockPhase_i) begin
+						if (Lead_i == 0) begin  
+							if (!ss && (ssCnt <= txLenght-1 && ssCnt > Lag_i) ) begin 
+								Sck_o = ~(Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+						else begin 
+							if (!ss && (ssCnt <txLenght-1 && ssCnt > Lag_i)) begin 
+								Sck_o = ~(Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+					end 
+					else begin
+						if (Lead_i == 0) begin 
+							if (!ss && (ssCnt <= txLenght-1 && ssCnt > Lag_i) ) begin 
+								Sck_o = ~(~Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+						else begin 
+							if (!ss && (ssCnt < txLenght-1 && ssCnt > Lag_i)) begin 
+								Sck_o = ~(~Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+					end
+				end
+			end
+			else begin 
+				if (PulsePol_i) begin 
+					if (ClockPhase_i) begin
+						if (Lead_i == 0) begin 
+							if (ss && (ssCnt <= txLenght-1 && ssCnt > Lag_i) ) begin 
+								Sck_o = ~(~Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+						else begin 
+							if (ss && (ssCnt < txLenght-1 && ssCnt > Lag_i)) begin 
+								Sck_o = ~(~Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+					end
+					else begin
+						if (Lead_i == 0) begin 
+							if (ss && (ssCnt <= txLenght-1 && ssCnt > Lag_i) ) begin 
+								Sck_o = ~(Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+						else begin 
+							if (ss && (ssCnt < txLenght-1 && ssCnt > Lag_i)) begin 
+								Sck_o = ~(Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+					end
+				end
+				else begin 
+					if (ClockPhase_i) begin
+						if (Lead_i == 0) begin  
+							if (ss && (ssCnt <= txLenght-1 && ssCnt > Lag_i) ) begin 
+								Sck_o = ~(Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+						else begin 
+							if (ss && (ssCnt <txLenght-1 && ssCnt > Lag_i)) begin 
+								Sck_o = ~(Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+					end 
+					else begin
+						if (Lead_i == 0) begin 
+							if (ss && (ssCnt <= txLenght-1 && ssCnt > Lag_i) ) begin 
+								Sck_o = ~(~Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+						else begin 
+							if (ss && (ssCnt < txLenght-1 && ssCnt > Lag_i)) begin 
+								Sck_o = ~(~Clk_i);
+							end
+							else begin 
+								Sck_o = 1'b0;
+							end
+						end
+					end
+				end
+			end
+		end else begin
+			if (startFlag) begin
+				if (SelSt_i) begin
+					if (!ss) begin
+						if (PulsePol_i) begin 
+							if (ClockPhase_i) begin
+								Sck_o = ~(~Clk_i);
+							end
+							else begin 
+								Sck_o = ~Clk_i;
+							end
+						end else begin
+							if (ClockPhase_i) begin
+								Sck_o = ~(Clk_i);
+							end
+							else begin 
+								Sck_o = ~(~Clk_i);
+							end
+						end
+					end else begin
+						Sck_o <= 1'b0;
+					end
+				end else begin
+					if (ss) begin
+						if (PulsePol_i) begin 
+							if (ClockPhase_i) begin
+								Sck_o = ~(~Clk_i);
+							end
+							else begin 
+								Sck_o = ~Clk_i;
+							end
+						end else begin
+							if (ClockPhase_i) begin
+								Sck_o = ~(Clk_i);
+							end
+							else begin 
+								Sck_o = ~(~Clk_i);
+							end
+						end
+					end else begin
+						Sck_o <= 1'b0;
+					end
+				end
+			end else begin
+				Sck_o = 0;
+			end
+		end
     end
     
     
@@ -430,25 +479,37 @@ module QuadSPIm(
     end
     
     
-    always @(*) begin
-        if (SelSt_i) begin 
-            if (ss && !ssR) begin 
-                valReg = 1'b1;
-            end
-            else begin 
-                valReg = 1'b0;
-            end
-        end
-        else begin 
-            if (!ss&& ssR) begin 
-                valReg = 1'b1;
-            end
-            else begin 
-                valReg = 1'b0;
-            end
-        end
-    end
+    // always @(*) begin
+        // if (SelSt_i) begin 
+            // if (ss && !ssR) begin 
+                // valReg = 1'b1;
+            // end
+            // else begin 
+                // valReg = 1'b0;
+            // end
+        // end
+        // else begin 
+            // if (!ss&& ssR) begin 
+                // valReg = 1'b1;
+            // end
+            // else begin 
+                // valReg = 1'b0;
+            // end
+        // end
+    // end
     
+	always @(*) begin
+        if (Rst_i) begin
+			valReg = 0;
+		end else begin
+			if (ssCnt == txLenght-1) begin
+				valReg = 1;
+			end else begin
+				valReg = 0;
+			end
+		end
+    end
+	
     
     always @(posedge Clk_i) begin
         if (valReg) begin  
@@ -509,7 +570,7 @@ module QuadSPIm(
         end
     end
     
-    wire [31:0] test = ssNum+Lag_i+Lead_i;
+
 	
     // always @(negedge Clk_i) begin 
         // if (Rst_i) begin 
@@ -527,47 +588,109 @@ module QuadSPIm(
     
 	 always @(negedge Clk_i) begin 
         if (Rst_i) begin 
-            ssCnt <= 1'b0;
-        end
-        else if (ssCnt < (ssNum+Lag_i+Lead_i)  && startFlag  ) begin 
-            ssCnt <= ssCnt + 1'b1;
-        end else begin
-            ssCnt <= 1'b0;
+            ssCnt <= 0;
         end
+        else begin
+			if (SelSt_i) begin
+				if (!ss) begin
+					if (ssCnt != txLenght-1) begin 
+						ssCnt <= ssCnt + 1;
+					end else begin
+						ssCnt <= 0;
+					end
+				end else begin
+					ssCnt <= 0;
+				end
+			end else begin
+				if (ss) begin
+					if (ssCnt != txLenght-1) begin 
+						ssCnt <= ssCnt + 1;
+					end else begin
+						ssCnt <= 0;
+					end
+				end else begin
+					ssCnt <= 0;
+				end
+			end
+		end
     end
 	
     
-    
-    
     always @(negedge Clk_i) begin
-        if (SelSt_i) begin  
-            if (Rst_i) begin 
-                ss <= 1'b1;
-            end
-            else begin 
-                if (ssCnt < (ssNum+Lag_i+Lead_i)  && startFlag ) begin 
-                    ss <= 1'b0;
-                end
-                else begin 
-                    ss <= 1'b1;
-                end
-            end
-        end
-        else begin 
-            if (Rst_i) begin 
-                ss <= 1'b0;
-            end
-            else begin 
-                if (ssCnt < (ssNum+Lag_i+Lead_i)  && startFlag ) begin 
-                    ss <= 1'b1;
-                end
-                else begin 
-                    ss <= 1'b0;
-                end
-            end
+		if (Rst_i) begin 
+			ss <= 1'b1;
+		end else begin
+			if (Stop_i != 0) begin
+				if (startFlag) begin
+					if (SelSt_i) begin  
+						if (ssCnt != txLenght-1) begin 
+							ss <= 1'b0;
+						end
+						else begin 
+							ss <= 1'b1;
+						end
+					end else begin
+						if (ssCnt != txLenght-1) begin 
+							ss <= 1'b1;
+						end
+						else begin 
+							ss <= 1'b0;
+						end
+					end
+				end else begin
+					if (SelSt_i) begin  
+						ss <= 1'b1;
+					end else begin 
+						ss <= 1'b0;
+					end
+				end
+			end else begin
+				if (startFlag) begin
+					if (SelSt_i) begin
+						ss <= 1'b0;
+					end else begin
+						ss <= 1'b1;
+					end
+				end else begin
+					if (SelSt_i) begin
+						ss <= 1'b1;
+					end else begin
+						ss <= 1'b0;
+					end
+				end
+			end
         end
     end
     
+    // always @(negedge Clk_i) begin
+        // if (SelSt_i) begin  
+            // if (Rst_i) begin 
+                // ss <= 1'b1;
+            // end
+            // else begin 
+                // if (ssCnt < (ssNum+Lag_i+Lead_i)  && startFlag ) begin 
+                    // ss <= 1'b0;
+                // end
+                // else begin 
+                    // ss <= 1'b1;
+                // end
+            // end
+        // end
+        // else begin 
+            // if (Rst_i) begin 
+                // ss <= 1'b0;
+            // end
+            // else begin 
+                // if (ssCnt < (ssNum+Lag_i+Lead_i)  && startFlag ) begin 
+                    // ss <= 1'b1;
+                // end
+                // else begin 
+                    // ss <= 1'b0;
+                // end
+            // end
+        // end
+    // end
+    
     
     always @(negedge Clk_i) begin 
         if (Rst_i) begin 

sources_1/new/QuadSPI/QuadSPImTb.v

@@ -11,7 +11,9 @@ parameter CLK_PERIOD = 8.13; // Clock period in ns
 reg rst;
 reg clk;
 
-wire [31:0] data = 32'hFAFA_0101;
+localparam [31:0] startData = 32'h1;
+
+reg [31:0] data;
 
 wire [1:0] widthSel  = 2'h2;
 wire clockPol = 1'b0;
@@ -21,11 +23,12 @@ wire lag = 1'b0;
 wire leadx = 1'b0;
 wire [5:0] stopDelay = 6'h0;
 wire selSt = 1'b1;
+wire val;
 
 reg [31:0] tbCnt;
 
 wire start = (tbCnt>=100);
-
+wire fifoEmpty = (data > 32'h29);
 
 //================================================================================
 //  ASSIGNMENTS
@@ -55,12 +58,20 @@ always @(posedge clk) begin
 	end
 end
 
+always @(posedge clk) begin
+	if (rst) begin
+		data <= startData;
+	end else if (val) begin
+		data <= data+10;
+	end
+end
+
 QuadSPIm QuadSPIm
 (
 	.Clk_i(clk),
 	.Start_i(start),
 	.Rst_i(rst),
-	.EmptyFlag_i(1'b0),
+	.EmptyFlag_i(fifoEmpty),
 	.SpiData_i(data),
 	.Sck_o(),
 	.Ss_o(),
@@ -76,7 +87,7 @@ QuadSPIm QuadSPIm
 	.Lead_i(leadx),
 	.Stop_i(stopDelay),
 	.SelSt_i(selSt),
-	.Val_o()
+	.Val_o(val)
 );
 			
 endmodule