Bladeren bron

Добавлен флаг FifoTxEmpty, синхронный с WrClock. Исправлена ошибка в SPIm, QuadSPIm

Anatoliy Chigirinskiy 1 jaar geleden
bovenliggende
commit
c4dd1e3d6a

File diff suppressed because it is too large
+ 191 - 58
constrs_1/new/S5443_3.xdc


File diff suppressed because it is too large
+ 18 - 16
sources_1/ip/DataFifoTx/DataFifoTx.xci


+ 9 - 2
sources_1/new/DataFifo/DataFifoWrapper.v

@@ -28,6 +28,7 @@ module DataFifoWrapper
 	input ToFifoTxReadVal_i,
 
 	output	ToSpiVal_o,
+	output EmptyFlagTx_o,
 	output [CmdRegWidth-1:0]	TxFifoCtrlReg_o,
 	output [CmdRegWidth-1:0]	RxFifoCtrlReg_o,
 	output	[CmdRegWidth-1:0]	ToSpiData_o,
@@ -49,14 +50,20 @@ module DataFifoWrapper
 
 	wire [7:0] rxFifoUpDnCnt;
 	wire [7:0] txFifoUpDnCnt;
+
+	(* dont_touch = "true" *) wire emptyFlagTxForDsp;
+
+	//  (* dont_touch = "true" *)wire [6:0] wrDataCnt;
+	//  (* dont_touch = "true" *)wire [6:0] rdDataCnt;
 	
 //================================================================================
 //	ASSIGNMENTS
 //================================================================================
 	assign	ToSpiVal_o	=	1'b1;
 	assign DataFromRxFifo_o = dataFromRxFifo;
+	assign EmptyFlagTx_o = emptyFlagTx;
 
-	assign TxFifoCtrlReg_o = {16'h0, txFifoUpDnCnt,5'h0,emptyFlagTx,fullFlagTx, FifoTxRst_i};
+	assign TxFifoCtrlReg_o = {16'h0, txFifoUpDnCnt,5'h0,emptyFlagTxForDsp,fullFlagTx, FifoTxRst_i};
 	assign RxFifoCtrlReg_o = {16'h0, rxFifoUpDnCnt,5'h0,emptyFlagRx,fullFlagRx, FifoRxRst_i};
 //================================================================================
 //	LOCALPARAMS
@@ -81,6 +88,7 @@ module DataFifoWrapper
 		.FifoRxRstRdPtr_i	(FifoRxRstRdPtr_i),
 		.FifoTxEmpty_i		(emptyFlagTx),
 		.FifoRxFull_i		(fullFlagRx),
+		.EmptyFlagTxForDsp_o(emptyFlagTxForDsp),
 		.FifoRxEmpty_i		(emptyFlagRx),
 		.FifoTxWrClock_i	(WrClk_i),
 		.FifoTxRdClock_i	(RdClk_i),
@@ -112,7 +120,6 @@ module DataFifoWrapper
 		.dout		(ToSpiData_o),
 		.full		(fullFlagTx), 
 		.empty		(emptyFlagTx)
-	
 	);
 	
 	DataFifoRx	DataFifoRx

+ 0 - 96
sources_1/new/DataFifo/DataMuxer — копия.v

@@ -1,96 +0,0 @@
-
-module SmcDataMux 
-#(
-    parameter	CmdRegWidth	=	32,
-    parameter	AddrRegWidth=	12,
-	
-	parameter	FifoNum	=	7,
-	
-	parameter	Fifo0WriteAddr	=	12'h0+12'h16,
-	parameter	Fifo1WriteAddr	=	12'h50+12'h16,
-	parameter	Fifo2WriteAddr	=	12'hF0+12'h16,
-	parameter	Fifo3WriteAddr	=	12'h140+12'h16,
-	parameter	Fifo4WriteAddr	=	12'h190+12'h16,
-	parameter	Fifo5WriteAddr	=	12'h1e0+12'h16,
-	parameter	Fifo6WriteAddr	=	12'h230+12'h16
-)
-(
-    input	Clk_i,
-    input	Rst_i,
-
-	input	SmcVal_i,
-	input	[CmdRegWidth-1:0]	SmcData_i,
-    input	[AddrRegWidth-1:0]	SmcAddr_i,
-
-	output	reg	ToRegMapVal_o,
-	output	reg	[CmdRegWidth-1:0]	ToRegMapData_o,
-    output	reg	[AddrRegWidth-1:0]	ToRegMapAddr_o,
-	
-	output	reg	[FifoNum-1:0]	ToFifoVal_o,
-	output	reg	[CmdRegWidth*FifoNum-1:0]	ToFifoData_o
-	
-);
-//================================================================================
-//	REG/WIRE
-//================================================================================
-
-//================================================================================
-//	ASSIGNMENTS
-//================================================================================
-
-//================================================================================
-//	LOCALPARAMS
-//================================================================================
-
-//================================================================================
-//	CODING
-//================================================================================
-
-always	@(posedge	Clk_i	or	posedge	Rst_i)	begin
-	if	(Rst_i)	begin
-		ToRegMapVal_o	<=	1'b0;
-		ToRegMapData_o	<=	32'h0;
-		ToRegMapAddr_o	<=	12'h0;
-		
-		ToFifoVal_o		<=	7'h0;
-		ToFifoData_o	<=	32'h0;
-	end	else	begin
-		if	(SmcAddr_i	==	Fifo0WriteAddr||SmcAddr_i==Fifo1WriteAddr||SmcAddr_i==Fifo2WriteAddr||SmcAddr_i==Fifo3WriteAddr||SmcAddr_i==Fifo4WriteAddr||SmcAddr_i==Fifo5WriteAddr||SmcAddr_i==Fifo6WriteAddr)	begin	
-			case(SmcAddr_i)	
-				Fifo0WriteAddr:	begin
-									ToFifoVal_o[0]	<=	SmcVal_i;
-									ToFifoData_o[32*0+:32]	<=	SmcData_i;
-								end
-				Fifo1WriteAddr:	begin
-									ToFifoVal_o[1]	<=	SmcVal_i;
-									ToFifoData_o[32*1-1+:32]	<=	SmcData_i;
-								end
-				Fifo2WriteAddr:	begin
-									ToFifoVal_o[2]	<=	SmcVal_i;
-									ToFifoData_o[32*2-1+:32]	<=	SmcData_i;
-								end
-				Fifo3WriteAddr:	begin
-									ToFifoVal_o[3]	<=	SmcVal_i;
-									ToFifoData_o[32*3-1+:32]	<=	SmcData_i;
-								end
-				Fifo4WriteAddr:	begin
-									ToFifoVal_o[4]	<=	SmcVal_i;
-									ToFifoData_o[32*4-1+:32]	<=	SmcData_i;
-								end
-				Fifo5WriteAddr:	begin
-									ToFifoVal_o[5]	<=	SmcVal_i;
-									ToFifoData_o[32*5-1+:32]	<=	SmcData_i;
-								end
-				Fifo6WriteAddr:	begin
-									ToFifoVal_o[6]	<=	SmcVal_i;
-									ToFifoData_o[32*6-1+:32]	<=	SmcData_i;
-								end
-			endcase
-		end	else	begin
-			ToRegMapVal_o	<=	SmcVal_i;
-			ToRegMapData_o	<=	SmcData_i;
-			ToRegMapAddr_o	<=	SmcAddr_i;
-		end
-	end
-end
-endmodule

+ 2 - 1
sources_1/new/DataFifo/DataOutMux.v

@@ -11,6 +11,7 @@ module DataOutMux#(
     input SmcAre_i,
     input [AddrRegWidth-1:0] Addr_i,
     input [AddrRegWidth-1:0] ToRegMapAddr_i,
+    input RequestToFifo_i,
     input ToFifoVal_i,
     input [CmdRegWidth/2-1:0] DataFromRegMap_i,
     input [CmdRegWidth-1:0] DataFromRxFifo1_i,
@@ -51,7 +52,7 @@ module DataOutMux#(
     assign dataFromRxFifo[6] = DataFromRxFifo7_i;
     
     assign dataFromRegMap = DataFromRegMap_i;
-    assign AnsData_o = (ToRegMapAddr_i)?dataFromRegMap:dataFromRxFifoR;
+    assign AnsData_o = (!RequestToFifo_i)?dataFromRegMap:dataFromRxFifoR;
     
     
     always @(posedge Clk_i) begin 

+ 56 - 17
sources_1/new/DataFifo/FifoCtrl.v

@@ -41,6 +41,8 @@ module FifoCtrl #(
     output  [7:0] RxFifoUpDnCnt_o,
     output  [7:0] TxFifoUpDnCnt_o,
 
+    output EmptyFlagTxForDsp_o,
+
     output FifoTxWriteEn_o,
     output FifoTxReadEn_o,
     output FifoRxWriteEn_o,
@@ -59,10 +61,11 @@ module FifoCtrl #(
     (* dont_touch = "true" *)reg [7:0] rxFifoWrPtr;
     (* dont_touch = "true" *)reg [7:0] rxFifoRdPtr;
     
-    (* dont_touch = "true" *) reg [7:0] rxFifoUpDnCnt;
-    (* dont_touch = "true" *) reg [7:0] txFifoUpDnCnt;
+    (* dont_touch = "true" *)reg [7:0] rxFifoUpDnCnt;
+    (* dont_touch = "true" *)reg [7:0] txFifoUpDnCnt;
     
-    reg [1:0] readEnCnt;    
+    reg [1:0] readEnCnt;
+    reg emptyFlagTxForDsp;    
     
     
     
@@ -77,6 +80,7 @@ module FifoCtrl #(
 
     wire [7:0] rxFifoWrPtrSync;
     wire [7:0] txFifoWrPtrSync;
+    wire [7:0] txFifoRdPtrSync;
 
     wire rxFifoRstSync;
 
@@ -95,6 +99,8 @@ module FifoCtrl #(
     assign RxFifoUpDnCnt_o = rxFifoUpDnCnt;
     assign TxFifoUpDnCnt_o = txFifoUpDnCnt;
     
+
+    assign EmptyFlagTxForDsp_o = emptyFlagTxForDsp;
     
     // //================================================================================
     
@@ -110,16 +116,16 @@ module FifoCtrl #(
         .RxFifoWrPtr_o(rxFifoWrPtrSync)
     );
 
-    TxFifoPtrSync #(
-        .WIDTH(8),
-        .STAGES(3)
-    )
-    txFifoPtrSync (
-        .ClkFast_i(FifoTxWrClock_i),
-        .ClkSlow_i(FifoTxRdClock_i),
-        .TxFifoWrPtr_i(txFifoWrPtr),
-        .TxFifoWrPtr_o(txFifoWrPtrSync)
-    );
+    // TxFifoPtrSync #(
+    //     .WIDTH(8),
+    //     .STAGES(3)
+    // )
+    // txFifoPtrSync (
+    //     .ClkFast_i(FifoTxWrClock_i),
+    //     .ClkSlow_i(FifoTxRdClock_i),
+    //     .TxFifoWrPtr_i(txFifoWrPtr),
+    //     .TxFifoWrPtr_o(txFifoWrPtrSync)
+    // );
 
     // RxFifoRstSync #(
     //     .WIDTH(1),
@@ -133,7 +139,16 @@ module FifoCtrl #(
     // );
 
 
-
+    TxFifoPtrSync #(
+        .WIDTH(8),
+        .STAGES(3)
+    )
+    txFifoPtrSync (
+        .ClkFast_i(FifoTxRdClock_i),
+        .ClkSlow_i(FifoTxWrClock_i),
+        .TxFifoWrPtr_i(txFifoRdPtr),
+        .TxFifoWrPtr_o(txFifoRdPtrSync)
+    );
 
     
     always @(posedge FifoRxRdClock_i) begin 
@@ -247,17 +262,41 @@ module FifoCtrl #(
         end
     end
     
-    always @(posedge FifoTxRdClock_i) begin 
+    always @(posedge FifoTxWrClock_i) begin 
         if (FifoTxRst_i) begin 
             txFifoUpDnCnt <= 8'h0;
         end
         else begin 
-            txFifoUpDnCnt <= txFifoWrPtrSync - txFifoRdPtr;
+            txFifoUpDnCnt <= txFifoWrPtr - txFifoRdPtrSync;
         end
     end
     
     
-    
+    // always @(posedge FifoTxWrClock_i) begin 
+    //     if (FifoTxRstWrPtr_i) begin 
+    //         emptyFlagTxForDsp <= 1'b1;
+    //     end
+    //     else begin 
+    //         if (txFifoWrPtr == txFifoRdPtr) begin 
+    //             emptyFlagTxForDsp <= 1'b1;
+    //         end
+    //         else begin 
+    //             emptyFlagTxForDsp <= 1'b0;
+    //         end
+    //     end
+    // end
+
+    always @(*) begin
+        if (txFifoUpDnCnt == 8'h0) begin
+            emptyFlagTxForDsp <= 1'b1;
+        end
+        else begin
+            emptyFlagTxForDsp <= 1'b0;
+        end
+    end
+
+
+
     
     
     // //================================================================================

+ 2 - 1
sources_1/new/MMCM/MmcmWrapper.v

@@ -2,6 +2,7 @@
 module MmcmWrapper 
 #(
 	parameter	SpiNum	=	7
+   parameter   STAGES   =  3
 )
 (
    input	Clk_i,
@@ -119,7 +120,7 @@ wire [SpiNum-1:0] spiClk;
 
          ClkDivSync #(
             .WIDTH(4),
-            .STAGES(3)
+            .STAGES(STAGES)
          )(
             .ClkFast_i(Clk_i),
             .ClkSlow_i(clk1out),

+ 3 - 1
sources_1/new/Mux/DataMuxer.v

@@ -55,6 +55,8 @@ module DataMuxer
 	input	[CmdRegWidth-1:0]	SmcData_i,
     input	[AddrRegWidth-1:0]	SmcAddr_i,
 
+	output	RequestToFifo_o,
+
 	output	reg	ToRegMapVal_o,
 	output	reg	[CmdRegWidth-1:0]	ToRegMapData_o,
     output	reg	[AddrRegWidth-1:0]	ToRegMapAddr_o,
@@ -78,7 +80,7 @@ module DataMuxer
 //================================================================================
 //	ASSIGNMENTS
 //================================================================================
-
+	assign	RequestToFifo_o	=	requestToFifo;
 //================================================================================
 //	LOCALPARAMS
 //================================================================================

+ 556 - 80
sources_1/new/QuadSPI/QuadSPIm.v

@@ -3,6 +3,7 @@ module QuadSPIm(
     input Clk_i,
     input Rst_i,
     input Start_i,
+    input EmptyFlag_i,
     input ClockPhase_i,
     input [31:0] SpiData_i,
     input SpiDataVal_i,
@@ -83,19 +84,19 @@ module QuadSPIm(
     end
     
     
-    always @(posedge Clk_i) begin 
-        if (Rst_i) begin 
-            trCnt <= 1'b0;
-        end
-        else begin 
-            if ( ssCnt == (ssNum + Lead_i + Lag_i)) begin 
-                trCnt <= trCnt + 1'b1;
-            end
-            else if (oldDataFlag) begin 
-                trCnt <= 1'b0;
-            end
-        end
-    end
+    // always @(posedge Clk_i) begin 
+    //     if (Rst_i) begin 
+    //         trCnt <= 1'b0;
+    //     end
+    //     else begin 
+    //         if ( ssCnt == (ssNum + Lead_i + Lag_i)) begin 
+    //             trCnt <= trCnt + 1'b1;
+    //         end
+    //         else if (oldDataFlag) begin 
+    //             trCnt <= 1'b0;
+    //         end
+    //     end
+    // end
     
     
     
@@ -348,7 +349,7 @@ module QuadSPIm(
                         Mosi0_i = (!ss&& (ssCnt <= ssNum+Lag_i && ssCnt > Lag_i))? (mosiReg0[5]):1'b0;
                         Mosi1_i = (!ss&& (ssCnt <= ssNum+Lag_i && ssCnt > Lag_i))? (mosiReg1[5]):1'b0;
                         Mosi2_i = (!ss&& (ssCnt <= ssNum+Lag_i && ssCnt > Lag_i))? (mosiReg2[5]):1'b0;
-                        Mosi3_i = (!ss&& (ssCnt < ssNum+Lag_i && ssCnt > Lag_i))? (mosiReg3[5]):1'b0;
+                        Mosi3_i = (!ss&& (ssCnt <= ssNum+Lag_i && ssCnt > Lag_i))? (mosiReg3[5]):1'b0;
                     end
                     3 : begin
                         Mosi0_i = (!ss&& (ssCnt <= ssNum+Lag_i && ssCnt > Lag_i))? (mosiReg0[7]):1'b0;
@@ -458,7 +459,7 @@ module QuadSPIm(
             oldDataFlag = 1'b0;
         end
         else begin 
-            if (spiDataR == SpiData_i) begin 
+            if (spiDataR == SpiData_i && (SpiData_i != 0) || EmptyFlag_i ) begin 
                 oldDataFlag = 1'b1;
             end
             else begin 
@@ -474,7 +475,7 @@ module QuadSPIm(
             startFlag = 1'b0;
         end
         else begin 
-            if (Start_i&& !stopFlag && SpiData_i != 0 && !oldDataFlag ) begin 
+            if (Start_i && !stopFlag && !EmptyFlag_i  && !oldDataFlag ) begin 
                 startFlag = 1'b1;
             end
             else begin 
@@ -558,42 +559,160 @@ module QuadSPIm(
             mosiReg0 <= SpiData_i[31:24];
         end
         else begin
-            if (!EndianSel_i) begin 
-                if (SelSt_i) begin 
-                    if (!ssR && (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg0 <= { mosiReg0[6:0],1'b0 };
+            case (WidthSel_i)
+            3: begin
+                if (!EndianSel_i) begin 
+                    if (SelSt_i) begin 
+                        if (!ssR && (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= { mosiReg0[6:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[31:24];
+                        end
                     end
                     else begin 
-                        mosiReg0 <= SpiData_i[31:24];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= { mosiReg0[6:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[31:24];
+                        end
                     end
                 end
                 else begin 
-                    if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg0 <= { mosiReg0[6:0],1'b0 };
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= {1'b0, mosiReg0[7:1] };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[31:24];
+                        end
                     end
                     else begin 
-                        mosiReg0 <= SpiData_i[31:24];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= {1'b0, mosiReg0[7:1] };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[31:24];
+                        end
                     end
                 end
             end
-            else begin 
-                if (SelSt_i) begin 
-                    if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg0 <= {1'b0, mosiReg0[7:1] };
+            2: begin
+                if (!EndianSel_i) begin 
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= { mosiReg0[4:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[23:18];
+                        end
                     end
                     else begin 
-                        mosiReg0 <= SpiData_i[31:24];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= { mosiReg0[4:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[23:18];
+                        end
                     end
                 end
                 else begin 
-                    if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg0 <= {1'b0, mosiReg0[7:1] };
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= {1'b0, mosiReg0[5:1] };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[23:18];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= {1'b0, mosiReg0[5:1] };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[23:18];
+                        end
+                    end
+                end
+            end
+            1: begin
+                if (!EndianSel_i) begin 
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= { mosiReg0[2:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[15:12];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= { mosiReg0[2:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[15:12];
+                        end
+                    end
+                end
+                else begin 
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= {1'b0, mosiReg0[3:1] };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[15:12];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= {1'b0, mosiReg0[3:1] };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[15:12];
+                        end
+                    end
+                end
+            end
+            0: begin
+                if (!EndianSel_i) begin 
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= { mosiReg0[0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[7:6];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= { mosiReg0[0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[7:6];
+                        end
+                    end
+                end
+                else begin 
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= {1'b0, mosiReg0[1:1] };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[7:6];
+                        end
                     end
                     else begin 
-                        mosiReg0 <= SpiData_i[31:24];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg0 <= {1'b0, mosiReg0[1:1] };
+                        end
+                        else begin 
+                            mosiReg0 <= SpiData_i[7:6];
+                        end
                     end
                 end
             end
+            endcase
         end
     end
     
@@ -602,42 +721,160 @@ module QuadSPIm(
             mosiReg1 <= SpiData_i[23:16];
         end
         else begin
-            if (!EndianSel_i) begin 
-                if (SelSt_i) begin 
-                    if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg1 <= { mosiReg1[6:0],1'b0 };
+            case(WidthSel_i)
+            3: begin 
+                if (!EndianSel_i) begin 
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= { mosiReg1[6:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[23:16];
+                        end
                     end
                     else begin 
-                        mosiReg1 <= SpiData_i[23:16];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= { mosiReg1[6:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[23:16];
+                        end
                     end
                 end
                 else begin 
-                    if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg1 <= { mosiReg1[6:0],1'b0 };
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= {1'b0, mosiReg1[7:1] };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[23:16];
+                        end
                     end
                     else begin 
-                        mosiReg1 <= SpiData_i[23:16];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= {1'b0, mosiReg1[7:1] };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[23:16];
+                        end
                     end
                 end
             end
-            else begin 
-                if (SelSt_i) begin 
-                    if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg1 <= {1'b0, mosiReg1[7:1] };
+            2: begin 
+                if (!EndianSel_i) begin 
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= { mosiReg1[4:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[17:12];
+                        end
                     end
                     else begin 
-                        mosiReg1 <= SpiData_i[23:16];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= { mosiReg1[4:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[17:12];
+                        end
                     end
                 end
                 else begin 
-                    if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg1 <= {1'b0, mosiReg1[7:1] };
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= {1'b0, mosiReg1[5:1] };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[17:12];
+                        end
                     end
                     else begin 
-                        mosiReg1 <= SpiData_i[23:16];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= {1'b0, mosiReg1[5:1] };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[17:12];
+                        end
                     end
                 end
             end
+            1: begin 
+                if (!EndianSel_i) begin 
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= { mosiReg1[2:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[11:8];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= { mosiReg1[2:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[11:8];
+                        end
+                    end
+                end
+                else begin 
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= {1'b0, mosiReg1[3:1] };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[11:8];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= {1'b0, mosiReg1[3:1] };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[11:8];
+                        end
+                    end
+                end
+            end
+            0: begin 
+                if (!EndianSel_i) begin 
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= { mosiReg1[0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[5:4];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= { mosiReg1[0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[5:4];
+                        end
+                    end
+                end
+                else begin 
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= {1'b0, mosiReg1[1:1] };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[5:4];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg1 <= {1'b0, mosiReg1[1:1] };
+                        end
+                        else begin 
+                            mosiReg1 <= SpiData_i[5:4];
+                        end
+                    end
+                end
+            end
+            endcase
         end
     end
     
@@ -646,86 +883,324 @@ module QuadSPIm(
             mosiReg2 <= SpiData_i[15:8];
         end
         else begin
-            if (!EndianSel_i) begin
-                if (SelSt_i) begin  
-                    if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg2 <= { mosiReg2[6:0],1'b0 };
+            case(WidthSel_i)
+            3 : begin 
+                if (!EndianSel_i) begin
+                    if (SelSt_i) begin  
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg2 <= { mosiReg2[6:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[15:8];
+                        end
                     end
                     else begin 
-                        mosiReg2 <= SpiData_i[15:8];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg2 <= { mosiReg2[6:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[15:8];
+                        end
                     end
                 end
                 else begin 
-                    if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg2 <= { mosiReg2[6:0],1'b0 };
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg2 <= {1'b0, mosiReg2[7:1] };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[15:8];
+                        end
                     end
                     else begin 
-                        mosiReg2 <= SpiData_i[15:8];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg2 <= {1'b0, mosiReg2[7:1] };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[15:8];
+                        end
                     end
                 end
             end
-            else begin 
-                if (SelSt_i) begin 
-                    if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg2 <= {1'b0, mosiReg2[7:1] };
+            2 : begin 
+                if (!EndianSel_i) begin 
+                    if (SelSt_i) begin  
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg2 <= { mosiReg2[4:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[11:6];
+                        end
                     end
                     else begin 
-                        mosiReg2 <= SpiData_i[15:8];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin 
+                            mosiReg2 <= { mosiReg2[4:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[11:6];
+                        end
                     end
                 end
                 else begin 
-                    if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg2 <= {1'b0, mosiReg2[7:1] };
+                    if (SelSt_i) begin  
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg2 <= {1'b0, mosiReg2[5:1] };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[11:6];
+                        end
                     end
                     else begin 
-                        mosiReg2 <= SpiData_i[15:8];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin 
+                            mosiReg2 <= {1'b0, mosiReg2[5:1] };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[11:6];
+                        end
                     end
                 end
             end
+            1 : begin 
+                if (!EndianSel_i) begin 
+                    if (SelSt_i) begin  
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg2 <= { mosiReg2[2:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[7:4];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin 
+                            mosiReg2 <= { mosiReg2[2:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[7:4];
+                        end
+                    end
+                end
+                else begin 
+                    if (SelSt_i) begin  
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg2 <= {1'b0, mosiReg2[3:1] };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[7:4];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin 
+                            mosiReg2 <= {1'b0, mosiReg2[3:1] };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[7:4];
+                        end
+                    end
+                end
+            end
+            0 : begin 
+                if (!EndianSel_i) begin 
+                    if (SelSt_i) begin  
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg2 <= { mosiReg2[0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[3:2];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin 
+                            mosiReg2 <= { mosiReg2[0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[3:2];
+                        end
+                    end
+                end
+                else begin 
+                    if (SelSt_i) begin  
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg2 <= {1'b0, mosiReg2[1:1] };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[3:2];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin 
+                            mosiReg2 <= {1'b0, mosiReg2[1:1] };
+                        end
+                        else begin 
+                            mosiReg2 <= SpiData_i[3:2];
+                        end
+                    end
+                end
+            end
+            endcase
         end
     end
+
+
     
     always @(negedge Clk_i) begin 
         if (Rst_i) begin 
             mosiReg3 <= SpiData_i[7:0];
         end
         else begin
-            if (!EndianSel_i) begin 
-                if (SelSt_i) begin 
-                    if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg3 <= { mosiReg3[6:0],1'b0 };
+            case (WidthSel_i)
+            3: begin 
+                if (!EndianSel_i) begin 
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg3 <= { mosiReg3[6:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[7:0];
+                        end
                     end
                     else begin 
-                        mosiReg3 <= SpiData_i[7:0];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg3 <= { mosiReg3[6:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[7:0];
+                        end
                     end
                 end
                 else begin 
-                    if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg3 <= { mosiReg3[6:0],1'b0 };
+                    if (SelSt_i) begin 
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg3 <= {1'b0, mosiReg3[7:1] };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[7:0];
+                        end
                     end
                     else begin 
-                        mosiReg3 <= SpiData_i[7:0];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg3 <= {1'b0, mosiReg3[7:1] };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[7:0];
+                        end
                     end
                 end
             end
-            else begin 
-                if (SelSt_i) begin 
-                    if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg3 <= {1'b0, mosiReg3[7:1] };
+            2: begin 
+                if (!EndianSel_i) begin 
+                    if (SelSt_i) begin  
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg3 <= { mosiReg3[4:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[5:0];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin 
+                            mosiReg3 <= { mosiReg3[4:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[5:0];
+                        end
+                    end
+                end
+                else begin 
+                    if (SelSt_i) begin  
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg3 <= {1'b0, mosiReg3[5:1] };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[5:0];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin 
+                            mosiReg3 <= {1'b0, mosiReg3[5:1] };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[5:0];
+                        end
+                    end
+                end
+            end
+            1: begin 
+                if (!EndianSel_i) begin 
+                    if (SelSt_i) begin  
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg3 <= { mosiReg3[2:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[3:0];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin 
+                            mosiReg3 <= { mosiReg3[2:0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[3:0];
+                        end
+                    end
+                end
+                else begin 
+                    if (SelSt_i) begin  
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg3 <= {1'b0, mosiReg3[3:1] };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[3:0];
+                        end
+                    end
+                    else begin 
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin 
+                            mosiReg3 <= {1'b0, mosiReg3[3:1] };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[3:0];
+                        end
+                    end
+                end
+            end
+            0: begin 
+                if (!EndianSel_i) begin 
+                    if (SelSt_i) begin  
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg3 <= { mosiReg3[0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[1:0];
+                        end
                     end
                     else begin 
-                        mosiReg3 <= SpiData_i[7:0];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin 
+                            mosiReg3 <= { mosiReg3[0],1'b0 };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[1:0];
+                        end
                     end
                 end
                 else begin 
-                    if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
-                        mosiReg3 <= {1'b0, mosiReg3[7:1] };
+                    if (SelSt_i) begin  
+                        if (!ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin
+                            mosiReg3 <= {1'b0, mosiReg3[1:1] };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[1:0];
+                        end
                     end
                     else begin 
-                        mosiReg3 <= SpiData_i[7:0];
+                        if (ssR&& (ssCnt > Lag_i && ssCnt < ssNum + Lag_i + Lead_i)) begin 
+                            mosiReg3 <= {1'b0, mosiReg3[1:1] };
+                        end
+                        else begin 
+                            mosiReg3 <= SpiData_i[1:0];
+                        end
                     end
                 end
             end
+            endcase
         end
     end
     
@@ -741,4 +1216,5 @@ module QuadSPIm(
     
     
     
+    
     endmodule

+ 61 - 20
sources_1/new/S5443_3Top.v

@@ -24,8 +24,8 @@ module S5443_3Top
 #(
     parameter CmdRegWidth = 32,
     parameter AddrRegWidth = 12,
-    parameter STAGES = 2,
-    parameter SpiNum = 7
+    parameter STAGES = 3,
+    parameter SpiNum = 1
 
 )
 (
@@ -279,6 +279,12 @@ module S5443_3Top
     
     wire smcValComb; 
     wire	[CmdRegWidth/2-1:0]	ansData;
+
+    wire requestToFifo;
+
+    wire [SpiNum-1: 0] emptyFlagTx;
+
+    wire [SpiNum-1:0] spiEn;
     //================================================================================
     //  ASSIGNMENTS
     //================================================================================
@@ -294,20 +300,41 @@ module S5443_3Top
     assign Mosi1_io[6] =(SpiDir_o[6])?mosi1[6]:1'bz;
     assign Mosi2_o = mosi2;
     assign Mosi3_o = mosi3;
-    assign Ss_o[0] = (assel[0])? ((chipSelFpga[0])? ssMuxed[0]:~ssMuxed[0]):chipSelFpga[0];
-    assign Ss_o[1] = (assel[1])? ((chipSelFpga[1])? ssMuxed[1]:~ssMuxed[1]):chipSelFpga[1];
-    assign Ss_o[2] = (assel[2])? ((chipSelFpga[2])? ssMuxed[2]:~ssMuxed[2]):chipSelFpga[2];
-    assign Ss_o[3] = (assel[3])? ((chipSelFpga[3])? ssMuxed[3]:~ssMuxed[3]):chipSelFpga[3];
-    assign Ss_o[4] = (assel[4])? ((chipSelFpga[4])? ssMuxed[4]:~ssMuxed[4]):chipSelFpga[4];
-    assign Ss_o[5] = (assel[5])? ((chipSelFpga[5])? ssMuxed[5]:~ssMuxed[5]):chipSelFpga[5];
-    assign Ss_o[6] = (assel[6])? ((chipSelFpga[6])? ssMuxed[6]:~ssMuxed[6]):chipSelFpga[6];
-    assign SsFlash_o[0] = (assel[0])?(chipSelFlash[0]? ssMuxed[0]:~ssMuxed[0]):chipSelFlash[0];
-    assign SsFlash_o[1] = (assel[1])?(chipSelFlash[1]? ssMuxed[1]:~ssMuxed[1]):chipSelFlash[1];
-    assign SsFlash_o[2] = (assel[2])?(chipSelFlash[2]? ssMuxed[2]:~ssMuxed[2]):chipSelFlash[2];
-    assign SsFlash_o[3] = (assel[3])?(chipSelFlash[3]? ssMuxed[3]:~ssMuxed[3]):chipSelFlash[3];
-    assign SsFlash_o[4] = (assel[4])?(chipSelFlash[4]? ssMuxed[4]:~ssMuxed[4]):chipSelFlash[4];
-    assign SsFlash_o[5] = (assel[5])?(chipSelFlash[5]? ssMuxed[5]:~ssMuxed[5]):chipSelFlash[5];
-    assign SsFlash_o[6] = (assel[6])?(chipSelFlash[6]? ssMuxed[6]:~ssMuxed[6]):chipSelFlash[6];
+    // assign Ss_o[0] = (assel[0])? ((chipSelFpga[0])? ssMuxed[0]:~ssMuxed[0]):chipSelFpga[0];
+    // assign Ss_o[1] = (assel[1])? ((chipSelFpga[1])? ssMuxed[1]:~ssMuxed[1]):chipSelFpga[1];
+    // assign Ss_o[2] = (assel[2])? ((chipSelFpga[2])? ssMuxed[2]:~ssMuxed[2]):chipSelFpga[2];
+    // assign Ss_o[3] = (assel[3])? ((chipSelFpga[3])? ssMuxed[3]:~ssMuxed[3]):chipSelFpga[3];
+    // assign Ss_o[4] = (assel[4])? ((chipSelFpga[4])? ssMuxed[4]:~ssMuxed[4]):chipSelFpga[4];
+    // assign Ss_o[5] = (assel[5])? ((chipSelFpga[5])? ssMuxed[5]:~ssMuxed[5]):chipSelFpga[5];
+    // assign Ss_o[6] = (assel[6])? ((chipSelFpga[6])? ssMuxed[6]:~ssMuxed[6]):chipSelFpga[6];
+
+    assign Ss_o[0] = (assel[0]) ? ssMuxed[0] : chipSelFpga[0];
+    assign Ss_o[1] = (assel[1]) ? ssMuxed[1] : chipSelFpga[1];
+    assign Ss_o[2] = (assel[2]) ? ssMuxed[2] : chipSelFpga[2];
+    assign Ss_o[3] = (assel[3]) ? ssMuxed[3] : chipSelFpga[3];
+    assign Ss_o[4] = (assel[4]) ? ssMuxed[4] : chipSelFpga[4];
+    assign Ss_o[5] = (assel[5]) ? ssMuxed[5] : chipSelFpga[5];
+    assign Ss_o[6] = (assel[6]) ? ssMuxed[6] : chipSelFpga[6];
+
+
+    // assign SsFlash_o[0] = (assel[0])?(chipSelFlash[0]? ssMuxed[0]:~ssMuxed[0]):chipSelFlash[0];
+    // assign SsFlash_o[1] = (assel[1])?(chipSelFlash[1]? ssMuxed[1]:~ssMuxed[1]):chipSelFlash[1];
+    // assign SsFlash_o[2] = (assel[2])?(chipSelFlash[2]? ssMuxed[2]:~ssMuxed[2]):chipSelFlash[2];
+    // assign SsFlash_o[3] = (assel[3])?(chipSelFlash[3]? ssMuxed[3]:~ssMuxed[3]):chipSelFlash[3];
+    // assign SsFlash_o[4] = (assel[4])?(chipSelFlash[4]? ssMuxed[4]:~ssMuxed[4]):chipSelFlash[4];
+    // assign SsFlash_o[5] = (assel[5])?(chipSelFlash[5]? ssMuxed[5]:~ssMuxed[5]):chipSelFlash[5];
+    // assign SsFlash_o[6] = (assel[6])?(chipSelFlash[6]? ssMuxed[6]:~ssMuxed[6]):chipSelFlash[6];
+
+    assign SsFlash_o[0] = (assel[0]) ? ssMuxed[0] : chipSelFlash[0];
+    assign SsFlash_o[1] = (assel[1]) ? ssMuxed[1] : chipSelFlash[1];
+    assign SsFlash_o[2] = (assel[2]) ? ssMuxed[2] : chipSelFlash[2];
+    assign SsFlash_o[3] = (assel[3]) ? ssMuxed[3] : chipSelFlash[3];
+    assign SsFlash_o[4] = (assel[4]) ? ssMuxed[4] : chipSelFlash[4];
+    assign SsFlash_o[5] = (assel[5]) ? ssMuxed[5] : chipSelFlash[5];
+    assign SsFlash_o[6] = (assel[6]) ? ssMuxed[6] : chipSelFlash[6];
+
+
+
     assign Sck_o = sckMuxed;
     
     assign widthSel[0] = spi0CtrlRR[6:5];
@@ -317,6 +344,15 @@ module S5443_3Top
     assign widthSel[4] = spi4CtrlRR[6:5];
     assign widthSel[5] = spi5CtrlRR[6:5];
     assign widthSel[6] = spi6CtrlRR[6:5];
+
+    assign spiEn[0] = spi0CtrlRR[0];
+    assign spiEn[1] = spi1CtrlRR[0];
+    assign spiEn[2] = spi2CtrlRR[0];
+    assign spiEn[3] = spi3CtrlRR[0];
+    assign spiEn[4] = spi4CtrlRR[0];
+    assign spiEn[5] = spi5CtrlRR[0];
+    assign spiEn[6] = spi6CtrlRR[0];
+
     
     assign spiMode[0] = spi0CtrlRR[7];
     assign spiMode[1] = spi1CtrlRR[7];
@@ -578,6 +614,7 @@ module S5443_3Top
         .Clk_i(gclk),
         .Addr_i(addrExt),
         .ToRegMapAddr_i(toRegMapAddr),
+        .RequestToFifo_i(requestToFifo),
         .FifoRxRst_i(fifoRxRstRdPtr[0]),
         .DataFromRegMap_i(ansData),
         .SmcAre_i(SmcAre_i),
@@ -606,7 +643,7 @@ module S5443_3Top
     	.SmcVal_i(smcValComb),
     	.SmcData_i(SmcData_io),
         .SmcAddr_i(addrExt),
-    
+        .RequestToFifo_o(requestToFifo),
     	.ToRegMapVal_o(toRegMapVal),
     	.ToRegMapData_o(toRegMapData),
         .ToRegMapAddr_o(toRegMapAddr),
@@ -800,7 +837,8 @@ module S5443_3Top
     );
     
     MmcmWrapper #(
-        .SpiNum(SpiNum) 
+        .SpiNum(SpiNum),
+        .STAGES(STAGES) 
 
     ) MainMmcm
     (
@@ -871,6 +909,7 @@ module S5443_3Top
 
     			.TxFifoCtrlReg_o(txFifoCtrlReg[i]),
                 .RxFifoCtrlReg_o(rxFifoCtrlReg[i]),
+                .EmptyFlagTx_o(emptyFlagTx[i]),
     			.ToSpiVal_o(toSpiVal[i]),
                 .DataFromRxFifo_o(dataFromRxFifo[i]),
     			.ToSpiData_o(toSpiData[i])
@@ -879,7 +918,8 @@ module S5443_3Top
             SPIm SPIm_inst (
                 .Clk_i(spiClkBus[i]),
                 .Start_i(spiTxEnSync[i]),
-                .Rst_i(initRstGen[i]| spiMode[i]),
+                .Rst_i(initRstGen[i]| spiMode[i] | !spiEn[i]),
+                .EmptyFlag_i(emptyFlagTx[i]),
                 .SpiData_i(toSpiData[i]),
                 .Sck_o(sckR[i]),
                 .Ss_o(ssR[i]),
@@ -911,7 +951,8 @@ module S5443_3Top
             QuadSPIm QuadSPIm_inst (
                 .Clk_i(spiClkBus[i]),
                 .Start_i(spiTxEnSync[i]),
-                .Rst_i(initRstGen[i]| !spiMode[i]),
+                .Rst_i(initRstGen[i]| !spiMode[i] | !spiEn[i]),
+                .EmptyFlag_i(emptyFlagTx[i]),
     			.SpiDataVal_i(toSpiVal),
                 .SpiData_i(toSpiData[i]),
                 .Sck_o(sckQ[i]),

+ 5 - 4
sources_1/new/SpiR/SPIm.v

@@ -2,6 +2,7 @@ module SPIm (
     input Clk_i,
     input Rst_i,
     input Start_i,
+    input EmptyFlag_i,
     input ClockPhase_i,
     input [31:0] SpiData_i,
     input SelSt_i,
@@ -99,7 +100,7 @@ module SPIm (
             oldDataFlag = 1'b0;
         end
         else begin 
-            if (spiDataR == SpiData_i) begin 
+            if (spiDataR == SpiData_i && (SpiData_i != 0) || EmptyFlag_i) begin 
                 oldDataFlag = 1'b1;
             end
             else begin 
@@ -418,7 +419,7 @@ module SPIm (
             startFlag = 1'b0;
         end
         else begin 
-            if (Start_i&& !stopFlag && SpiData_i != 0 && !oldDataFlag ) begin 
+            if (Start_i && !stopFlag && !EmptyFlag_i  && !oldDataFlag  ) begin 
                 startFlag = 1'b1;
             end
             else begin 
@@ -474,7 +475,7 @@ module SPIm (
         if (Rst_i) begin 
             ssCnt <= 1'b0;
         end
-        else if (ssCnt < (ssNum+Lag_i+Lead_i)  && startFlag  ) begin 
+        else if (ssCnt <= (ssNum+Lag_i+Lead_i)  && startFlag  ) begin 
             ssCnt <= ssCnt + 1'b1;
         end
         else begin
@@ -492,7 +493,7 @@ module SPIm (
             Ss <= 1'b1;
         end
         else begin 
-            if (ssCnt < (ssNum+Lag_i+Lead_i)  && startFlag ) begin 
+            if (ssCnt <= (ssNum+Lag_i+Lead_i)  && startFlag ) begin 
                 Ss <= 1'b0;
             end
             else begin 

+ 21 - 20
sources_1/new/SpiR/SPIm_tb.v

@@ -12,10 +12,10 @@ module tb_SPIm;
     reg CPHA_i;
     reg [31:0] SPIdata;
 	reg SpiDataVal_i;
-    reg SELST_i;
+    reg SelSt_i;
     reg [1:0] WidthSel_i;
-    reg LAG_i;
-    reg LEAD_i;
+    reg Lag_i;
+    reg Lead_i;
     reg EndianSel_i;
     reg [5:0] Stop_i;
     reg PulsePol_i;
@@ -33,12 +33,12 @@ module tb_SPIm;
         .Clk_i(Clk_i), 
         .Rst_i(Rst_i), 
         .Start_i(Start_i), 
-        .CPHA_i(CPHA_i), 
-        .SPIdata(SPIdata),
-        .SELST_i(SELST_i),
+        .ClockPhase_i(CPHA_i), 
+        .SpiData_i(SPIdata),
+        .SelSt_i(SelSt_i),
         .WidthSel_i(WidthSel_i),
-        .LAG_i(LAG_i),
-        .LEAD_i(LEAD_i),
+        .Lag_i(Lag_i),
+        .Lead_i(Lead_i),
         .EndianSel_i(EndianSel_i),
         .Stop_i(Stop_i),
         .PulsePol_i(PulsePol_i),
@@ -57,7 +57,7 @@ module tb_SPIm;
         .Mosi0_i(Mosi0_o), 
         .WidthSel_i(WidthSel_i), 
         .EndianSel_i(EndianSel_i),
-        .SELST_i(SELST_i), 
+        .SelSt_i(SelSt_i), 
         .Data_o(), 
         .Addr_o(), 
         .DataToRxFifo_o(), 
@@ -69,13 +69,13 @@ module tb_SPIm;
     //     .Clk_i(Clk_i),
     //     .Rst_i(Rst_i),
     //     .Start_i(Start_i),
-    //     .CPHA_i(CPHA_i),
-    //     .SPIdata(SPIdata),
+    //     .ClockPhase_i(CPHA_i),
+    //     .SpiData_i(SPIdata),
     //     .SpiDataVal_i(SpiDataVal_i),
-    //     .SELST_i(SELST_i),
+    //     .SelSt_i(SelSt_i),
     //     .WidthSel_i(WidthSel_i),
-    //     .LAG_i(LAG_i),
-    //     .LEAD_i(LEAD_i),
+    //     .Lag_i(Lag_i),
+    //     .Lead_i(Lead_i),
     //     .EndianSel_i(EndianSel_i),
     //     .Stop_i(Stop_i),
     //     .PulsePol_i(PulsePol_i),
@@ -100,7 +100,8 @@ module tb_SPIm;
     //     .Mosi2_i(Mosi2_o),
     //     .Mosi3_i(Mosi3_o),
     //     .WidthSel_i(WidthSel_i),
-    //     .SELST_i(SELST_i),
+    //     .EndianSel_i(EndianSel_i),
+    //     .SelSt_i(SelSt_i),
     //     .Data_o(),
     //     .Addr_o(),
     //     .DataToRxFifo_o(),
@@ -119,18 +120,18 @@ module tb_SPIm;
         CPHA_i = 0;
 		SpiDataVal_i = 0;
         SPIdata = 32'h00000000;
-        SELST_i = 1;//0:High, 1:Low
+        SelSt_i = 1;//0:High, 1:Low
         WidthSel_i = 3; // Full 32-bit width
-        LAG_i = 0;
-        LEAD_i = 0;
-        EndianSel_i = 1; // 0:MSB first, 1:lsb first
+        Lag_i = 0;
+        Lead_i = 0;
+        EndianSel_i = 0; // 0:MSB first, 1:lsb first
         Stop_i = 6'd0;
         PulsePol_i = 0;
 
         // Reset the system
         #(CLK_PERIOD*10) Rst_i = 0;
         #(CLK_PERIOD*2) Start_i = 1; // Start SPI transaction
-        #(CLK_PERIOD*10)SPIdata =  {1'h0, 7'h2a, 8'haa,8'h00,8'haa};
+        #(CLK_PERIOD*10)SPIdata =  {16'h2,16'h1};
         //    #(CLK_PERIOD*10)SPIdata =  32'haa;