module DataFifoWrapper 
#(
    parameter	CmdRegWidth	=	32,
    parameter	AddrRegWidth=	12,
	
	parameter	FifoNum	=	7
)
(
    input	WrClk_i,
	input	RdClk_i,
    input	FifoRxRst_i,
	input	FifoTxRst_i,
	input   SmcAre_i,
	input	SmcAwe_i,
	input	[AddrRegWidth-1:0]	SmcAddr_i,
	input   [7:0] TxFifoWrdCnt_i,
	input   [7:0] RxFifoWrdCnt_i,

	input	ToFifoVal_i,
	input	[CmdRegWidth-1:0]	ToFifoData_i,
	input   [CmdRegWidth-1:0]	ToFifoRxData_i,
	input   ToFifoRxWriteVal_i,                   
	
	input ToFifoTxReadVal_i,

	output	ToSpiVal_o,
	output [CmdRegWidth-1:0]	TxFifoCtrlReg_o,
	output [CmdRegWidth-1:0]	RxFifoCtrlReg_o,
	output	[CmdRegWidth-1:0]	ToSpiData_o,
	output  [CmdRegWidth-1:0]   DataFromRxFifo_o
);
//================================================================================
//	REG/WIRE
//================================================================================
	wire [CmdRegWidth-1:0]	dataFromRxFifo;
	wire fullFlagRx;
	wire emptyFlagRx;
	wire fullFlagTx;
	wire emptyFlagTx;

	wire txFifoWrEn;
	wire txFifoRdEn;
	wire rxFifoWrEn;
	wire rxFifoRdEn;

	wire [7:0] rxFifoUpDnCnt;
	wire [7:0] txFifoUpDnCnt;
	
//================================================================================
//	ASSIGNMENTS
//================================================================================
	assign	ToSpiVal_o	=	1'b1;
	assign DataFromRxFifo_o = dataFromRxFifo;

	assign TxFifoCtrlReg_o = {16'h0, txFifoUpDnCnt,5'h0,emptyFlagTx,fullFlagTx, FifoTxRst_i};
	// assign TxFifoCtrlReg_o = {FifoTxRst_i, fullFlagTx, emptyFlagTx, 5'h0, txFifoUpDnCnt, 16'h0};
	assign RxFifoCtrlReg_o = {16'h0, rxFifoUpDnCnt,5'h0,emptyFlagRx,fullFlagRx, FifoRxRst_i};
	// assign RxFifoCtrlReg_o = {FifoRxRst_i, fullFlagRx, emptyFlagRx, 5'h0, rxFifoUpDnCnt, 16'h0};
//================================================================================
//	LOCALPARAMS
//================================================================================

//================================================================================
//	CODING
//================================================================================

FifoCtrl FifoCtrl_inst (
	.ToFifoTxWriteVal_i	(ToFifoVal_i),
	.ToFifoTxReadVal_i (ToFifoTxReadVal_i),
	.ToFifoRxWriteVal_i	(ToFifoRxWriteVal_i),
	.ToFifoRxReadVal_i	(!SmcAre_i),
	.SmcAddr_i			(SmcAddr_i),
	.TxFifoWrdCnt_i		(TxFifoWrdCnt_i),
	.RxFifoWrdCnt_i		(RxFifoWrdCnt_i),
	.FifoTxFull_i		(fullFlagTx),
	.FifoTxRst_i		(FifoTxRst_i),
	.FifoRxRst_i		(FifoRxRst_i),
	.FifoTxEmpty_i		(emptyFlagTx),
	.FifoRxFull_i		(fullFlagRx),
	.FifoRxEmpty_i		(emptyFlagRx),
	.FifoTxWrClock_i	(WrClk_i),
	.FifoTxRdClock_i	(RdClk_i),
	.FifoRxWrClock_i	(RdClk_i),
	.FifoRxRdClock_i	(WrClk_i),
	.RxFifoUpDnCnt_o	(rxFifoUpDnCnt),
	.TxFifoUpDnCnt_o	(txFifoUpDnCnt),
	.FifoTxWriteEn_o	(txFifoWrEn),
	.FifoTxReadEn_o		(txFifoRdEn),
	.FifoRxWriteEn_o	(rxFifoWrEn),
	.FifoRxReadEn_o		(rxFifoRdEn)





);



DataFifoTx	DataFifoTx
( 
	.wr_clk		(WrClk_i), 
	.rd_clk		(RdClk_i), 
	.rst		(FifoTxRst_i),
	.din		(ToFifoData_i), 
	.wr_en		(txFifoWrEn), 
	.rd_en		(txFifoRdEn), 
	.dout		(ToSpiData_o),
	.full		(fullFlagTx), 
	.empty		(emptyFlagTx)

);

DataFifoRx	DataFifoRx
( 
	.wr_clk		(RdClk_i), 
	.rd_clk		(WrClk_i),
	.rst		(FifoRxRst_i), 
	.din		(ToFifoRxData_i), 
	.wr_en		(rxFifoWrEn), 
	.rd_en		(rxFifoRdEn), 
	.dout		(dataFromRxFifo), 
	.full		(fullFlagRx), 
	.empty		(emptyFlagRx)
);

endmodule