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S5443_V3
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S5443_3.xdc

S5443_3.xdc 29 KB
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  1. 

  2. 

  3. 

  4. set_property PACKAGE_PIN C15 [get_ports {SmcAddr_i[0]}]
    5. 

  5. set_property IOSTANDARD LVCMOS33 [get_ports {SmcAddr_i[0]}]
    6. 

  6. set_property PACKAGE_PIN C13 [get_ports {SmcAddr_i[1]}]
    7. 

  7. set_property IOSTANDARD LVCMOS33 [get_ports {SmcAddr_i[1]}]
    8. 

  8. set_property PACKAGE_PIN D15 [get_ports {SmcAddr_i[2]}]
    9. 

  9. set_property IOSTANDARD LVCMOS33 [get_ports {SmcAddr_i[2]}]
    10. 

  10. set_property PACKAGE_PIN C14 [get_ports {SmcAddr_i[3]}]
    11. 

  11. set_property IOSTANDARD LVCMOS33 [get_ports {SmcAddr_i[3]}]
    12. 

  12. set_property PACKAGE_PIN E15 [get_ports {SmcAddr_i[4]}]
    13. 

  13. set_property IOSTANDARD LVCMOS33 [get_ports {SmcAddr_i[4]}]
    14. 

  14. set_property PACKAGE_PIN D13 [get_ports {SmcAddr_i[5]}]
    15. 

  15. set_property IOSTANDARD LVCMOS33 [get_ports {SmcAddr_i[5]}]
    16. 

  16. set_property PACKAGE_PIN F15 [get_ports {SmcAddr_i[6]}]
    17. 

  17. set_property IOSTANDARD LVCMOS33 [get_ports {SmcAddr_i[6]}]
    18. 

  18. set_property PACKAGE_PIN E14 [get_ports {SmcAddr_i[7]}]
    19. 

  19. set_property IOSTANDARD LVCMOS33 [get_ports {SmcAddr_i[7]}]
    20. 

  20. set_property PACKAGE_PIN J15 [get_ports {SmcAddr_i[8]}]
    21. 

  21. set_property IOSTANDARD LVCMOS33 [get_ports {SmcAddr_i[8]}]
    22. 

  22. set_property PACKAGE_PIN F14 [get_ports {SmcAddr_i[9]}]
    23. 

  23. set_property IOSTANDARD LVCMOS33 [get_ports {SmcAddr_i[9]}]
    24. 

  24. set_property PACKAGE_PIN K15 [get_ports {SmcAddr_i[10]}]
    25. 

  25. set_property IOSTANDARD LVCMOS33 [get_ports {SmcAddr_i[10]}]
    26. 

  26. 

  27. 

  28. 

  29. set_property PACKAGE_PIN B15 [get_ports {SmcData_i[0]}]
    30. 

  30. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[0]}]
    31. 

  31. set_property PACKAGE_PIN B14 [get_ports {SmcData_i[1]}]
    32. 

  32. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[1]}]
    33. 

  33. set_property PACKAGE_PIN B11 [get_ports {SmcData_i[2]}]
    34. 

  34. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[2]}]
    35. 

  35. set_property PACKAGE_PIN B12 [get_ports {SmcData_i[3]}]
    36. 

  36. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[3]}]
    37. 

  37. set_property PACKAGE_PIN A12 [get_ports {SmcData_i[4]}]
    38. 

  38. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[4]}]
    39. 

  39. set_property PACKAGE_PIN B9 [get_ports {SmcData_i[5]}]
    40. 

  40. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[5]}]
    41. 

  41. set_property PACKAGE_PIN K14 [get_ports {SmcData_i[6]}]
    42. 

  42. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[6]}]
    43. 

  43. set_property PACKAGE_PIN A11 [get_ports {SmcData_i[7]}]
    44. 

  44. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[7]}]
    45. 

  45. set_property PACKAGE_PIN A6 [get_ports {SmcData_i[8]}]
    46. 

  46. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[8]}]
    47. 

  47. set_property PACKAGE_PIN A13 [get_ports {SmcData_i[9]}]
    48. 

  48. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[9]}]
    49. 

  49. set_property PACKAGE_PIN A10 [get_ports {SmcData_i[10]}]
    50. 

  50. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[10]}]
    51. 

  51. set_property PACKAGE_PIN B6 [get_ports {SmcData_i[11]}]
    52. 

  52. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[11]}]
    53. 

  53. set_property PACKAGE_PIN A5 [get_ports {SmcData_i[12]}]
    54. 

  54. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[12]}]
    55. 

  55. set_property PACKAGE_PIN B10 [get_ports {SmcData_i[13]}]
    56. 

  56. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[13]}]
    57. 

  57. set_property PACKAGE_PIN A8 [get_ports {SmcData_i[14]}]
    58. 

  58. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[14]}]
    59. 

  59. set_property PACKAGE_PIN A14 [get_ports {SmcData_i[15]}]
    60. 

  60. set_property IOSTANDARD LVCMOS33 [get_ports {SmcData_i[15]}]
    61. 

  61. 

  62. set_property PACKAGE_PIN B13 [get_ports SmcAmsN_i]
    63. 

  63. set_property IOSTANDARD LVCMOS33 [get_ports SmcAmsN_i]
    64. 

  64. 

  65. 

  66. set_property PACKAGE_PIN C6 [get_ports Led_o]
    67. 

  67. set_property IOSTANDARD LVCMOS33 [get_ports Led_o]
    68. 

  68. 

  69. set_property PACKAGE_PIN A9 [get_ports SmcAwe_i]
    70. 

  70. set_property IOSTANDARD LVCMOS33 [get_ports SmcAwe_i]
    71. 

  71. 

  72. set_property PACKAGE_PIN C5 [get_ports SmcAre_i]
    73. 

  73. set_property IOSTANDARD LVCMOS33 [get_ports SmcAre_i]
    74. 

  74. 

  75. set_property PACKAGE_PIN C8 [get_ports SmcAoe_i]
    76. 

  76. set_property IOSTANDARD LVCMOS33 [get_ports SmcAoe_i]
    77. 

  77. 

  78. set_property PACKAGE_PIN L15 [get_ports {SmcBe_i[1]}]
    79. 

  79. set_property IOSTANDARD LVCMOS33 [get_ports {SmcBe_i[1]}]
    80. 

  80. set_property PACKAGE_PIN L14 [get_ports {SmcBe_i[0]}]
    81. 

  81. set_property IOSTANDARD LVCMOS33 [get_ports {SmcBe_i[0]}]
    82. 

  82. 

  83. 

  84. #==========================================================================
    85. 

  85. #	SPI INTERFACES
    86. 

  86. 

  87. #SPI0
    88. 

  88. set_property PACKAGE_PIN K1 [get_ports {Sck_o[0]}]
    89. 

  89. set_property IOSTANDARD LVCMOS33 [get_ports {Sck_o[0]}]
    90. 

  90. set_property PACKAGE_PIN H1 [get_ports {Ss_o[0]}]
    91. 

  91. set_property IOSTANDARD LVCMOS33 [get_ports {Ss_o[0]}]
    92. 

  92. set_property PACKAGE_PIN K2 [get_ports {SsFlash_o[0]}]
    93. 

  93. set_property IOSTANDARD LVCMOS33 [get_ports {SsFlash_o[0]}]
    94. 

  94. set_property PACKAGE_PIN J1 [get_ports {Mosi0_o[0]}]
    95. 

  95. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi0_o[0]}]
    96. 

  96. set_property PACKAGE_PIN J3 [get_ports {Mosi1_o[0]}]
    97. 

  97. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi1_o[0]}]
    98. 

  98. set_property PACKAGE_PIN H2 [get_ports {Mosi2_o[0]}]
    99. 

  99. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi2_o[0]}]
    100. 

  100. set_property PACKAGE_PIN L1 [get_ports {Mosi3_o[0]}]
    101. 

  101. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi3_o[0]}]
    102. 

  102. set_property PACKAGE_PIN J2 [get_ports {SpiRst_o[0]}]
    103. 

  103. set_property IOSTANDARD LVCMOS33 [get_ports {SpiRst_o[0]}]
    104. 

  104. set_property PACKAGE_PIN M13 [get_ports {Ld_i[0]}]
    105. 

  105. set_property IOSTANDARD LVCMOS33 [get_ports {Ld_i[0]}]
    106. 

  106. 

  107. 

  108. 

  109. #SPI1
    110. 

  110. set_property PACKAGE_PIN N2 [get_ports {Sck_o[1]}]
    111. 

  111. set_property IOSTANDARD LVCMOS33 [get_ports {Sck_o[1]}]
    112. 

  112. set_property PACKAGE_PIN N4 [get_ports {Ss_o[1]}]
    113. 

  113. set_property IOSTANDARD LVCMOS33 [get_ports {Ss_o[1]}]
    114. 

  114. set_property PACKAGE_PIN P1 [get_ports {SsFlash_o[1]}]
    115. 

  115. set_property IOSTANDARD LVCMOS33 [get_ports {SsFlash_o[1]}]
    116. 

  116. set_property PACKAGE_PIN N3 [get_ports {Mosi0_o[1]}]
    117. 

  117. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi0_o[1]}]
    118. 

  118. set_property PACKAGE_PIN R2 [get_ports {Mosi1_o[1]}]
    119. 

  119. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi1_o[1]}]
    120. 

  120. set_property PACKAGE_PIN N1 [get_ports {Mosi2_o[1]}]
    121. 

  121. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi2_o[1]}]
    122. 

  122. set_property PACKAGE_PIN M2 [get_ports {Mosi3_o[1]}]
    123. 

  123. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi3_o[1]}]
    124. 

  124. set_property PACKAGE_PIN P2 [get_ports {SpiRst_o[1]}]
    125. 

  125. set_property IOSTANDARD LVCMOS33 [get_ports {SpiRst_o[1]}]
    126. 

  126. set_property PACKAGE_PIN N11 [get_ports {Ld_i[1]}]
    127. 

  127. set_property IOSTANDARD LVCMOS33 [get_ports {Ld_i[1]}]
    128. 

  128. 

  129. 

  130. 

  131. #SPI2
    132. 

  132. set_property PACKAGE_PIN E2 [get_ports {Sck_o[2]}]
    133. 

  133. set_property IOSTANDARD LVCMOS33 [get_ports {Sck_o[2]}]
    134. 

  134. set_property PACKAGE_PIN E1 [get_ports {Ss_o[2]}]
    135. 

  135. set_property IOSTANDARD LVCMOS33 [get_ports {Ss_o[2]}]
    136. 

  136. set_property PACKAGE_PIN F1 [get_ports {SsFlash_o[2]}]
    137. 

  137. set_property IOSTANDARD LVCMOS33 [get_ports {SsFlash_o[2]}]
    138. 

  138. set_property PACKAGE_PIN D1 [get_ports {Mosi0_o[2]}]
    139. 

  139. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi0_o[2]}]
    140. 

  140. set_property PACKAGE_PIN D2 [get_ports {Mosi1_o[2]}]
    141. 

  141. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi1_o[2]}]
    142. 

  142. set_property PACKAGE_PIN F2 [get_ports {Mosi2_o[2]}]
    143. 

  143. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi2_o[2]}]
    144. 

  144. set_property PACKAGE_PIN G1 [get_ports {Mosi3_o[2]}]
    145. 

  145. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi3_o[2]}]
    146. 

  146. set_property PACKAGE_PIN E3 [get_ports {SpiRst_o[2]}]
    147. 

  147. set_property IOSTANDARD LVCMOS33 [get_ports {SpiRst_o[2]}]
    148. 

  148. set_property PACKAGE_PIN N9 [get_ports {Ld_i[2]}]
    149. 

  149. set_property IOSTANDARD LVCMOS33 [get_ports {Ld_i[2]}]
    150. 

  150. 

  151. 

  152. #SPI3
    153. 

  153. set_property PACKAGE_PIN R10 [get_ports {Sck_o[3]}]
    154. 

  154. set_property IOSTANDARD LVCMOS33 [get_ports {Sck_o[3]}]
    155. 

  155. set_property PACKAGE_PIN P10 [get_ports {Ss_o[3]}]
    156. 

  156. set_property IOSTANDARD LVCMOS33 [get_ports {Ss_o[3]}]
    157. 

  157. set_property PACKAGE_PIN N10 [get_ports {SsFlash_o[3]}]
    158. 

  158. set_property IOSTANDARD LVCMOS33 [get_ports {SsFlash_o[3]}]
    159. 

  159. set_property PACKAGE_PIN N8 [get_ports {Mosi0_o[3]}]
    160. 

  160. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi0_o[3]}]
    161. 

  161. set_property PACKAGE_PIN R8 [get_ports {Mosi1_o[3]}]
    162. 

  162. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi1_o[3]}]
    163. 

  163. set_property PACKAGE_PIN R11 [get_ports {Mosi2_o[3]}]
    164. 

  164. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi2_o[3]}]
    165. 

  165. set_property PACKAGE_PIN P11 [get_ports {Mosi3_o[3]}]
    166. 

  166. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi3_o[3]}]
    167. 

  167. set_property PACKAGE_PIN R9 [get_ports {SpiRst_o[3]}]
    168. 

  168. set_property IOSTANDARD LVCMOS33 [get_ports {SpiRst_o[3]}]
    169. 

  169. set_property PACKAGE_PIN N13 [get_ports {Ld_i[3]}]
    170. 

  170. set_property IOSTANDARD LVCMOS33 [get_ports {Ld_i[3]}]
    171. 

  171. 

  172. 

  173. 

  174. 

  175. #SPI4
    176. 

  176. set_property PACKAGE_PIN R14 [get_ports {Sck_o[4]}]
    177. 

  177. set_property IOSTANDARD LVCMOS33 [get_ports {Sck_o[4]}]
    178. 

  178. set_property PACKAGE_PIN N14 [get_ports {Ss_o[4]}]
    179. 

  179. set_property IOSTANDARD LVCMOS33 [get_ports {Ss_o[4]}]
    180. 

  180. set_property PACKAGE_PIN P14 [get_ports {SsFlash_o[4]}]
    181. 

  181. set_property IOSTANDARD LVCMOS33 [get_ports {SsFlash_o[4]}]
    182. 

  182. set_property PACKAGE_PIN R13 [get_ports {Mosi0_o[4]}]
    183. 

  183. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi0_o[4]}]
    184. 

  184. set_property PACKAGE_PIN P12 [get_ports {Mosi1_o[4]}]
    185. 

  185. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi1_o[4]}]
    186. 

  186. set_property PACKAGE_PIN M15 [get_ports {Mosi2_o[4]}]
    187. 

  187. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi2_o[4]}]
    188. 

  188. set_property PACKAGE_PIN M14 [get_ports {Mosi3_o[4]}]
    189. 

  189. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi3_o[4]}]
    190. 

  190. set_property PACKAGE_PIN N15 [get_ports {SpiRst_o[4]}]
    191. 

  191. set_property IOSTANDARD LVCMOS33 [get_ports {SpiRst_o[4]}]
    192. 

  192. set_property PACKAGE_PIN P15 [get_ports {Ld_i[4]}]
    193. 

  193. set_property IOSTANDARD LVCMOS33 [get_ports {Ld_i[4]}]
    194. 

  194. 

  195. 

  196. 

  197. #SPI5
    198. 

  198. set_property PACKAGE_PIN P6 [get_ports {Sck_o[5]}]
    199. 

  199. set_property IOSTANDARD LVCMOS33 [get_ports {Sck_o[5]}]
    200. 

  200. set_property PACKAGE_PIN R5 [get_ports {Ss_o[5]}]
    201. 

  201. set_property IOSTANDARD LVCMOS33 [get_ports {Ss_o[5]}]
    202. 

  202. set_property PACKAGE_PIN R6 [get_ports {SsFlash_o[5]}]
    203. 

  203. set_property IOSTANDARD LVCMOS33 [get_ports {SsFlash_o[5]}]
    204. 

  204. set_property PACKAGE_PIN R4 [get_ports {Mosi0_o[5]}]
    205. 

  205. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi0_o[5]}]
    206. 

  206. set_property PACKAGE_PIN R3 [get_ports {Mosi1_o[5]}]
    207. 

  207. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi1_o[5]}]
    208. 

  208. set_property PACKAGE_PIN N7 [get_ports {Mosi2_o[5]}]
    209. 

  209. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi2_o[5]}]
    210. 

  210. set_property PACKAGE_PIN R7 [get_ports {Mosi3_o[5]}]
    211. 

  211. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi3_o[5]}]
    212. 

  212. set_property PACKAGE_PIN N6 [get_ports {SpiRst_o[5]}]
    213. 

  213. set_property IOSTANDARD LVCMOS33 [get_ports {SpiRst_o[5]}]
    214. 

  214. set_property PACKAGE_PIN N12 [get_ports {Ld_i[5]}]
    215. 

  215. set_property IOSTANDARD LVCMOS33 [get_ports {Ld_i[5]}]
    216. 

  216. 

  217. 

  218. #SPI6
    219. 

  219. set_property PACKAGE_PIN B5 [get_ports {Sck_o[6]}]
    220. 

  220. set_property IOSTANDARD LVCMOS33 [get_ports {Sck_o[6]}]
    221. 

  221. set_property PACKAGE_PIN B3 [get_ports {Ss_o[6]}]
    222. 

  222. set_property IOSTANDARD LVCMOS33 [get_ports {Ss_o[6]}]
    223. 

  223. set_property PACKAGE_PIN A4 [get_ports {SsFlash_o[6]}]
    224. 

  224. set_property IOSTANDARD LVCMOS33 [get_ports {SsFlash_o[6]}]
    225. 

  225. set_property PACKAGE_PIN B1 [get_ports {Mosi0_o[6]}]
    226. 

  226. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi0_o[6]}]
    227. 

  227. set_property PACKAGE_PIN C4 [get_ports {Mosi1_o[6]}]
    228. 

  228. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi1_o[6]}]
    229. 

  229. set_property PACKAGE_PIN B4 [get_ports {Mosi2_o[6]}]
    230. 

  230. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi2_o[6]}]
    231. 

  231. set_property PACKAGE_PIN A3 [get_ports {Mosi3_o[6]}]
    232. 

  232. set_property IOSTANDARD LVCMOS33 [get_ports {Mosi3_o[6]}]
    233. 

  233. set_property PACKAGE_PIN A2 [get_ports {SpiRst_o[6]}]
    234. 

  234. set_property IOSTANDARD LVCMOS33 [get_ports {SpiRst_o[6]}]
    235. 

  235. set_property PACKAGE_PIN M8 [get_ports {Ld_i[6]}]
    236. 

  236. set_property IOSTANDARD LVCMOS33 [get_ports {Ld_i[6]}]
    237. 

  237. 

  238. 

  239. set_property PACKAGE_PIN M7 [get_ports LD_o]
    240. 

  240. set_property IOSTANDARD LVCMOS33 [get_ports LD_o]
    241. 

  241. 

  242. #==========================================================================
    243. 

  243. #	INPUT CLOCKS
    244. 

  244. 

  245. set_property PACKAGE_PIN M10 [get_ports Clk123_i]
    246. 

  246. set_property IOSTANDARD LVCMOS33 [get_ports Clk123_i]
    247. 

  247. create_clock -period 8.130 -name Clk123_i -waveform {0.000 4.065} -add [get_ports Clk123_i]
    248. 

  248. 

  249. set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets Clk123_i_IBUF]
    250. 

  250. 

  251. 

  252. 

  253. 

  254. 

  255. 

  256. #Clock 123 Mhz to others
    257. 

  257. #==========================================================================
    258. 

  258. 

  259. # set_multicycle_path -hold -from [get_clocks Clk123_i] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT3]] 1
    260. 

  260. # set_multicycle_path -setup -start -from [get_clocks Clk123_i] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT3]] 2
    261. 

  261. 

  262. # set_multicycle_path -hold -from [get_clocks Clk123_i] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT4]] 1
    263. 

  263. # set_multicycle_path -setup -start -from [get_clocks Clk123_i] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT4]] 2
    264. 

  264. 

  265. # set_multicycle_path -hold -from [get_clocks Clk123_i] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT5]] 2
    266. 

  266. # set_multicycle_path -setup -start -from [get_clocks Clk123_i] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT5]] 3
    267. 

  267. 

  268. # set_multicycle_path -hold -from [get_clocks Clk123_i] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT6]] 3
    269. 

  269. # set_multicycle_path -setup -start -from [get_clocks Clk123_i] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT6]] 4
    270. 

  270. 

  271. 

  272. 

  273. 

  274. 

  275. 

  276. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT0]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT1]]
    277. 

  277. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT0]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT2]]
    278. 

  278. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT0]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT3]]
    279. 

  279. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT0]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT5]]
    280. 

  280. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT0]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT4]]
    281. 

  281. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT0]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT6]]
    282. 

  282. 

  283. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT1]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT0]]
    284. 

  284. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT1]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT2]]
    285. 

  285. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT1]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT3]]
    286. 

  286. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT1]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT4]]
    287. 

  287. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT1]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT5]]
    288. 

  288. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT1]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT6]]
    289. 

  289. 

  290. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT2]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT0]]
    291. 

  291. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT2]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT1]]
    292. 

  292. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT2]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT3]]
    293. 

  293. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT2]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT4]]
    294. 

  294. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT2]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT5]]
    295. 

  295. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT2]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT6]]
    296. 

  296. 

  297. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT3]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT0]]
    298. 

  298. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT3]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT1]]
    299. 

  299. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT3]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT2]]
    300. 

  300. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT3]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT4]]
    301. 

  301. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT3]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT5]]
    302. 

  302. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT3]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT6]]
    303. 

  303. 

  304. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT4]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT0]]
    305. 

  305. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT4]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT1]]
    306. 

  306. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT4]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT2]]
    307. 

  307. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT4]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT3]]
    308. 

  308. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT4]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT5]]
    309. 

  309. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT4]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT6]]
    310. 

  310. 

  311. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT5]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT0]]
    312. 

  312. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT5]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT1]]
    313. 

  313. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT5]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT2]]
    314. 

  314. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT5]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT3]]
    315. 

  315. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT5]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT4]]
    316. 

  316. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT5]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT6]]
    317. 

  317. 

  318. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT6]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT0]]
    319. 

  319. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT6]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT1]]
    320. 

  320. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT6]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT2]]
    321. 

  321. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT6]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT3]]
    322. 

  322. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT6]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT4]]
    323. 

  323. set_false_path -from [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT6]] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT5]]
    324. 

  324. 

  325. 

  326. 

  327. 

  328. 

  329. 

  330. 

  331. 

  332. 

  333. 

  334. 

  335. 

  336. 

  337. # set_max_delay -from [get_clocks Clk123_i] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT0]] 7.000
    338. 

  338. # set_max_delay -from [get_clocks Clk123_i] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT1]] 7.250
    339. 

  339. # set_max_delay -from [get_clocks Clk123_i] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT2]] 8.145
    340. 

  340. 

  341. 

  342. connect_debug_port u_ila_0/probe2 [get_nets [list {SpiTxRxEn[0]} {SpiTxRxEn[1]} {SpiTxRxEn[2]} {SpiTxRxEn[3]} {SpiTxRxEn[4]} {SpiTxRxEn[5]} {SpiTxRxEn[6]}]]
    343. 

  343. connect_debug_port u_ila_0/probe9 [get_nets [list Mosi0Q_0]]
    344. 

  344. connect_debug_port u_ila_0/probe19 [get_nets [list valToTxQ_0]]
    345. 

  345. 

  346. 

  347. 

  348. 

  349. 

  350. set_max_delay -from [get_clocks Clk123_i] -to [get_clocks -of_objects [get_pins MainMmcm/ClkDiv_inst/inst/mmcm_adv_inst/CLKOUT5]] 10.000
    351. 

  351. create_debug_core u_ila_0 ila
    352. 

  352. set_property ALL_PROBE_SAME_MU true [get_debug_cores u_ila_0]
    353. 

  353. set_property ALL_PROBE_SAME_MU_CNT 1 [get_debug_cores u_ila_0]
    354. 

  354. set_property C_ADV_TRIGGER false [get_debug_cores u_ila_0]
    355. 

  355. set_property C_DATA_DEPTH 1024 [get_debug_cores u_ila_0]
    356. 

  356. set_property C_EN_STRG_QUAL false [get_debug_cores u_ila_0]
    357. 

  357. set_property C_INPUT_PIPE_STAGES 0 [get_debug_cores u_ila_0]
    358. 

  358. set_property C_TRIGIN_EN false [get_debug_cores u_ila_0]
    359. 

  359. set_property C_TRIGOUT_EN false [get_debug_cores u_ila_0]
    360. 

  360. set_property port_width 1 [get_debug_ports u_ila_0/clk]
    361. 

  361. connect_debug_port u_ila_0/clk [get_nets [list gclk]]
    362. 

  362. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe0]
    363. 

  363. set_property port_width 1 [get_debug_ports u_ila_0/probe0]
    364. 

  364. connect_debug_port u_ila_0/probe0 [get_nets [list {Mosi1_o_OBUF[0]}]]
    365. 

  365. create_debug_port u_ila_0 probe
    366. 

  366. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe1]
    367. 

  367. set_property port_width 1 [get_debug_ports u_ila_0/probe1]
    368. 

  368. connect_debug_port u_ila_0/probe1 [get_nets [list {Mosi2_o_OBUF[0]}]]
    369. 

  369. create_debug_port u_ila_0 probe
    370. 

  370. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe2]
    371. 

  371. set_property port_width 1 [get_debug_ports u_ila_0/probe2]
    372. 

  372. connect_debug_port u_ila_0/probe2 [get_nets [list {Mosi3_o_OBUF[0]}]]
    373. 

  373. create_debug_port u_ila_0 probe
    374. 

  374. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe3]
    375. 

  375. set_property port_width 11 [get_debug_ports u_ila_0/probe3]
    376. 

  376. connect_debug_port u_ila_0/probe3 [get_nets [list {SmcAddr_i_IBUF[0]} {SmcAddr_i_IBUF[1]} {SmcAddr_i_IBUF[2]} {SmcAddr_i_IBUF[3]} {SmcAddr_i_IBUF[4]} {SmcAddr_i_IBUF[5]} {SmcAddr_i_IBUF[6]} {SmcAddr_i_IBUF[7]} {SmcAddr_i_IBUF[8]} {SmcAddr_i_IBUF[9]} {SmcAddr_i_IBUF[10]}]]
    377. 

  377. create_debug_port u_ila_0 probe
    378. 

  378. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe4]
    379. 

  379. set_property port_width 2 [get_debug_ports u_ila_0/probe4]
    380. 

  380. connect_debug_port u_ila_0/probe4 [get_nets [list {SmcBe_i_IBUF[0]} {SmcBe_i_IBUF[1]}]]
    381. 

  381. create_debug_port u_ila_0 probe
    382. 

  382. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe5]
    383. 

  383. set_property port_width 16 [get_debug_ports u_ila_0/probe5]
    384. 

  384. connect_debug_port u_ila_0/probe5 [get_nets [list {smcData[0]} {smcData[1]} {smcData[2]} {smcData[3]} {smcData[4]} {smcData[5]} {smcData[6]} {smcData[7]} {smcData[8]} {smcData[9]} {smcData[10]} {smcData[11]} {smcData[12]} {smcData[13]} {smcData[14]} {smcData[15]}]]
    385. 

  385. create_debug_port u_ila_0 probe
    386. 

  386. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe6]
    387. 

  387. set_property port_width 32 [get_debug_ports u_ila_0/probe6]
    388. 

  388. connect_debug_port u_ila_0/probe6 [get_nets [list {toFifoData[0]} {toFifoData[1]} {toFifoData[2]} {toFifoData[3]} {toFifoData[4]} {toFifoData[5]} {toFifoData[6]} {toFifoData[7]} {toFifoData[8]} {toFifoData[9]} {toFifoData[10]} {toFifoData[11]} {toFifoData[12]} {toFifoData[13]} {toFifoData[14]} {toFifoData[15]} {toFifoData[16]} {toFifoData[17]} {toFifoData[18]} {toFifoData[19]} {toFifoData[20]} {toFifoData[21]} {toFifoData[22]} {toFifoData[23]} {toFifoData[24]} {toFifoData[25]} {toFifoData[26]} {toFifoData[27]} {toFifoData[28]} {toFifoData[29]} {toFifoData[30]} {toFifoData[31]}]]
    389. 

  389. create_debug_port u_ila_0 probe
    390. 

  390. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe7]
    391. 

  391. set_property port_width 32 [get_debug_ports u_ila_0/probe7]
    392. 

  392. connect_debug_port u_ila_0/probe7 [get_nets [list {toSpiData[0][31]} {toSpiData[0][30]} {toSpiData[0][29]} {toSpiData[0][28]} {toSpiData[0][27]} {toSpiData[0][26]} {toSpiData[0][25]} {toSpiData[0][24]} {toSpiData[0][23]} {toSpiData[0][22]} {toSpiData[0][21]} {toSpiData[0][20]} {toSpiData[0][19]} {toSpiData[0][18]} {toSpiData[0][17]} {toSpiData[0][16]} {toSpiData[0][15]} {toSpiData[0][14]} {toSpiData[0][13]} {toSpiData[0][12]} {toSpiData[0][11]} {toSpiData[0][10]} {toSpiData[0][9]} {toSpiData[0][8]} {toSpiData[0][7]} {toSpiData[0][6]} {toSpiData[0][5]} {toSpiData[0][4]} {toSpiData[0][3]} {toSpiData[0][2]} {toSpiData[0][1]} {toSpiData[0][0]}]]
    393. 

  393. create_debug_port u_ila_0 probe
    394. 

  394. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe8]
    395. 

  395. set_property port_width 1 [get_debug_ports u_ila_0/probe8]
    396. 

  396. connect_debug_port u_ila_0/probe8 [get_nets [list {SpiGen[0].DataFifoWrapper/emptyFlagTx}]]
    397. 

  397. create_debug_port u_ila_0 probe
    398. 

  398. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe9]
    399. 

  399. set_property port_width 1 [get_debug_ports u_ila_0/probe9]
    400. 

  400. connect_debug_port u_ila_0/probe9 [get_nets [list {SpiGen[0].DataFifoWrapper/fullFlagTx}]]
    401. 

  401. create_debug_port u_ila_0 probe
    402. 

  402. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe10]
    403. 

  403. set_property port_width 1 [get_debug_ports u_ila_0/probe10]
    404. 

  404. connect_debug_port u_ila_0/probe10 [get_nets [list Mosi0Q]]
    405. 

  405. create_debug_port u_ila_0 probe
    406. 

  406. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe11]
    407. 

  407. set_property port_width 1 [get_debug_ports u_ila_0/probe11]
    408. 

  408. connect_debug_port u_ila_0/probe11 [get_nets [list SckQ_0]]
    409. 

  409. create_debug_port u_ila_0 probe
    410. 

  410. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe12]
    411. 

  411. set_property port_width 1 [get_debug_ports u_ila_0/probe12]
    412. 

  412. connect_debug_port u_ila_0/probe12 [get_nets [list SmcAmsN_i_IBUF]]
    413. 

  413. create_debug_port u_ila_0 probe
    414. 

  414. set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe13]
    415. 

  415. set_property port_width 1 [get_debug_ports u_ila_0/probe13]
    416. 

  416. connect_debug_port u_ila_0/probe13 [get_nets [list SmcAre_i_IBUF]]
    417. 

  417. create_debug_port u_ila_0 probe
    418. 

  418. set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe14]
    419. 

  419. set_property port_width 1 [get_debug_ports u_ila_0/probe14]
    420. 

  420. connect_debug_port u_ila_0/probe14 [get_nets [list SmcAwe_i_IBUF]]
    421. 

  421. create_debug_port u_ila_0 probe
    422. 

  422. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe15]
    423. 

  423. set_property port_width 1 [get_debug_ports u_ila_0/probe15]
    424. 

  424. connect_debug_port u_ila_0/probe15 [get_nets [list {RegMap_inst/SpiTxRxEnReg[0]_i_1_n_0}]]
    425. 

  425. create_debug_port u_ila_0 probe
    426. 

  426. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe16]
    427. 

  427. set_property port_width 1 [get_debug_ports u_ila_0/probe16]
    428. 

  428. connect_debug_port u_ila_0/probe16 [get_nets [list SsQ_0]]
    429. 

  429. create_debug_port u_ila_0 probe
    430. 

  430. set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe17]
    431. 

  431. set_property port_width 1 [get_debug_ports u_ila_0/probe17]
    432. 

  432. connect_debug_port u_ila_0/probe17 [get_nets [list {SpiGen[0].QuadSPIm_inst/Start_i}]]
    433. 

  433. create_debug_port u_ila_0 probe
    434. 

  434. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe18]
    435. 

  435. set_property port_width 1 [get_debug_ports u_ila_0/probe18]
    436. 

  436. connect_debug_port u_ila_0/probe18 [get_nets [list {SpiGen[0].DataFifoWrapper/ToFifoVal_i}]]
    437. 

  437. create_debug_port u_ila_0 probe
    438. 

  438. set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe19]
    439. 

  439. set_property port_width 1 [get_debug_ports u_ila_0/probe19]
    440. 

  440. connect_debug_port u_ila_0/probe19 [get_nets [list toRegMapVal]]
    441. 

  441. create_debug_port u_ila_0 probe
    442. 

  442. set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe20]
    443. 

  443. set_property port_width 1 [get_debug_ports u_ila_0/probe20]
    444. 

  444. connect_debug_port u_ila_0/probe20 [get_nets [list {SpiGen[0].DataFifoWrapper/txFifoRdEn}]]
    445. 

  445. create_debug_port u_ila_0 probe
    446. 

  446. set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe21]
    447. 

  447. set_property port_width 1 [get_debug_ports u_ila_0/probe21]
    448. 

  448. connect_debug_port u_ila_0/probe21 [get_nets [list {SpiGen[0].DataFifoWrapper/txFifoWrEn}]]
    449. 

  449. create_debug_port u_ila_0 probe
    450. 

  450. set_property PROBE_TYPE DATA [get_debug_ports u_ila_0/probe22]
    451. 

  451. set_property port_width 1 [get_debug_ports u_ila_0/probe22]
    452. 

  452. connect_debug_port u_ila_0/probe22 [get_nets [list SmcAoe_i_IBUF]]
    453. 

  453. set_property C_CLK_INPUT_FREQ_HZ 300000000 [get_debug_cores dbg_hub]
    454. 

  454. set_property C_ENABLE_CLK_DIVIDER false [get_debug_cores dbg_hub]
    455. 

  455. set_property C_USER_SCAN_CHAIN 1 [get_debug_cores dbg_hub]
    456. 

  456. connect_debug_port dbg_hub/clk [get_nets gclk]
    457.