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- `timescale 1ns / 1ps
- module QuadSPImTb ();
- parameter CLK_PERIOD = 8.13; // Clock period in ns
- //================================================================================
- // REG/WIRE
- //================================================================================
- reg rst;
- reg clk;
- localparam [31:0] startData = 32'h1;
- // localparam [31:0] startData = 32'h0A0B0C0D;
- reg [31:0] data;
- reg [31:0] dataS;
- wire [1:0] widthSel = 2'h3;
- wire clockPol = 1'b0;
- wire clockPhase = 1'b0;
- wire endianSel = 1'b0;
- wire lag = 1'b0;
- wire lead = 1'b0;
- wire [5:0] stopDelay = 6'h0;
- wire selSt = 1'b1;
- wire val;
- wire valS;
- reg [31:0] tbCnt;
- wire start = (tbCnt>=100);
- wire fifoEmpty = (tbCnt >= 500);
- //================================================================================
- // ASSIGNMENTS
- //================================================================================
- //================================================================================
- // CODING
- //================================================================================
- always #(CLK_PERIOD/2) clk = ~clk;
- initial begin
- clk = 0;
- rst = 0;
- #40
- rst = 1;
- #100
- rst = 0;
- end
- always @(posedge clk) begin
- if (rst) begin
- tbCnt <= 0;
- end else begin
- tbCnt <= tbCnt+1;
- end
- end
- always @(posedge clk) begin
- if (rst) begin
- data <= startData;
- end else if (val) begin
- data <= data+32'h1000;
- end
- end
- always @(posedge clk) begin
- if (rst) begin
- dataS <= startData;
- end else if (valS) begin
- dataS <= dataS+32'h1000;
- end
- end
- QuadSPIm QuadSPIm
- (
- .Clk_i(clk),
- .Start_i(start),
- .Rst_i(rst),
- .EmptyFlag_i(fifoEmpty),
- .SpiData_i(data),
- .Sck_o(),
- .Ss_o(),
- .Mosi0_o(),
- .Mosi1_o(),
- .Mosi2_o(),
- .Mosi3_o(),
- .WidthSel_i(widthSel),
- .PulsePol_i(clockPol),
- .ClockPhase_i(clockPhase),
- .EndianSel_i(endianSel),
- .Lag_i(lag),
- .Lead_i(lead),
- .Stop_i(stopDelay),
- .SelSt_i(selSt),
- .Val_o(val)
- );
- SPIm Spi
- (
- .Clk_i (clk),
- .Rst_i (rst),
- .Start_i (start),
- .EmptyFlag_i (fifoEmpty),
- .ClockPhase_i (clockPol),
- .SpiData_i (dataS),
- .SelSt_i (selSt),
- .WidthSel_i (widthSel),
- .Lag_i (lag),
- .Lead_i (lead),
- .EndianSel_i (endianSel),
- .Stop_i (stopDelay),
- .PulsePol_i (clockPol),
- .Mosi0_o (),
- .Sck_o (),
- .Ss_o (),
- .Val_o (valS)
- );
- endmodule
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