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Добавил фильтрацию Rst_i и управление светодиодом, который сигнализирует об успешности прошивки FPGA.

Anatoliy Chigirinskiy 1 gadu atpakaļ
vecāks
revīzija
6c25638e0f

+ 6 - 3
src/constr/BochV3.cst

@@ -4,8 +4,11 @@
 //Tool Version: V1.9.9.03 (64-bit)
 //Part Number: GW1N-UV9QN88C6/I5
 //Device: GW1N-9
-//Created Time: Tue 11 26 09:47:17 2024
+//Device Version: C
+//Created Time: Mon 12 02 11:08:54 2024
 
+IO_LOC "Led_o" 18;
+IO_PORT "Led_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
 IO_LOC "TfeCs_o" 39;
 IO_PORT "TfeCs_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
 IO_LOC "TfeMosi_o" 41;
@@ -56,11 +59,11 @@ IO_LOC "Sck_i" 13;
 IO_PORT "Sck_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "Rst_i" 16;
 IO_PORT "Rst_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
+IO_LOC "LmkBMiso_i" 74;
+IO_PORT "LmkBMiso_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "TfeMiso_i" 40;
 IO_PORT "TfeMiso_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "CtrlCp2444v1Ld_i" 33;
 IO_PORT "CtrlCp2444v1Ld_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
-IO_LOC "LmkBMiso_i" 74;
-IO_PORT "LmkBMiso_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "LmkAMiso_i" 48;
 IO_PORT "LmkAMiso_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;

+ 1 - 1
src/constr/BochV3.sdc

@@ -8,4 +8,4 @@ create_clock -name clk25 -period 40 -waveform {0 20} [get_nets {clk25}]
 create_clock -name clk40 -period 25 -waveform {0 12.5} [get_nets {clk40}]
 create_clock -name clk60 -period 16.667 -waveform {0 8.334} [get_nets {clk60}]
 set_clock_groups -asynchronous -group [get_clocks {Sck_i}] -group [get_clocks {clk60 clk40 clk25}]
-report_timing -setup -to_clock [get_clocks {clk60}]
+report_timing -setup -to_clock [get_clocks {clk60}]

+ 4 - 4
src/src/InterfaceArbiter/InterfaceArbiter.v

@@ -88,10 +88,10 @@ module InterfaceArbiter
 	reg dataValReg;
 	
 	reg [OUTWORDWIDTH/4-1:0] ssCnt;
-	reg [15:0] wordsCnt;
+	reg [16:0] wordsCnt;
 	// wire [OUTWORDWIDTH/4-1:0] ssCntRstThresh = (spiMode) ? QSPIWORDWIDTH-1:SSPIWORDWIDTH-1;
 	
-	reg [15:0] wordsNum;
+	reg [16:0] wordsNum;
 	
 	reg [1:0] nextState;
 	reg [1:0] currState;
@@ -125,8 +125,8 @@ module InterfaceArbiter
 	assign DataVal_o = plsToggleSyncSignalR;
 	assign Data_o = (spiMode)? dataRegQSpi:dataRegSSpi;
 
-	assign plsToggleSyncSignal = plsToggleSyncA^plsToggle;
-	assign plsToggleSyncSignalFlash = plsToggleSyncAFlash^plsToggleFlash;
+	assign plsToggleSyncSignal = plsToggleSyncB^plsToggleSyncA;
+	assign plsToggleSyncSignalFlash = plsToggleSyncBFlash^plsToggleSyncAFlash;
 	assign plsToggleSyncSignalMux = (DirectFlagFlash_i) ? plsToggleSyncSignalFlash:plsToggleSyncSignal;
 
 	//assign ssCntRstThresh = (spiMode) ? QSPIWORDWIDTH-1:SSPIWORDWIDTH-1;

+ 32 - 0
src/src/PulseFilter/PulseFilter.v

@@ -0,0 +1,32 @@
+module PulseFilter (
+    input Clk_i,        // тактовый сигнал
+    input  Rst_i,        // сигнал сброса
+    input  Signal_i,  // входной сигнал с помехами
+    output reg SignalFilt_o  // отфильтрованный сигнал
+);
+
+    // Параметры для настройки фильтра
+    parameter WIDTH = 3;  // Ширина счетчика (длительность фильтрации)
+
+    reg [WIDTH-1:0] counter; // Счетчик для фильтрации
+
+    always @(posedge Clk_i) begin
+        if (Rst_i) begin
+            counter <= 0;
+            SignalFilt_o <= 0;
+        end
+        else begin
+            // Проверяем, если входной сигнал стабилен в течение длительности фильтрации
+            if (Signal_i == SignalFilt_o) begin
+                counter <= 0;  // Сбрасываем счетчик, если сигнал стабилен
+            end else begin
+                counter <= counter + 1;  // Увеличиваем счетчик, если сигнал меняется
+                if (counter == (1 << WIDTH) - 1) begin
+                    SignalFilt_o <= Signal_i;  // Изменяем выходной сигнал, если счетчик достиг предела
+                    counter <= 0;
+                end
+            end
+        end
+    end
+
+endmodule

+ 43 - 4
src/src/Top/TopBochV3.v

@@ -38,8 +38,17 @@ input       CtrlCp2444v1Ld_i,
 output reg TfeClk_o,
 output reg TfeMosi_o,
 output reg TfeCs_o,
-input      TfeMiso_i
+input      TfeMiso_i,
+
+/* Led */
+output Led_o
+
 );
+//***********************************************
+//	                LOCALPARAMS
+//***********************************************
+localparam LED_TICK_RATE = 100000000;
+
 //***********************************************
 //	                REG/WIRE
 //***********************************************
@@ -97,6 +106,12 @@ wire busyForTfe7Bytes;
 
 /* Tfe6BytesFifoEmpty */
 wire tfe6BytesFifoEmpty;
+/* PulseFilter */
+wire rstFiltered;
+
+/* Led */
+reg [31:0] ledCnt;
+reg ledReg;
 //***********************************************
 //	                ASSIGNMENTS
 //***********************************************
@@ -106,10 +121,27 @@ assign busyForTfe2Bytes = tfe4BytesSpiBusy | tfe6BytesSpiBusy | tfe7BytesSpiBusy
 assign busyForTfe4Bytes = tfe2BytesSpiBusy | tfe6BytesSpiBusy | tfe7BytesSpiBusy;
 assign busyForTfe6Bytes = tfe2BytesSpiBusy | tfe4BytesSpiBusy | tfe7BytesSpiBusy ;
 assign busyForTfe7Bytes = tfe2BytesSpiBusy | tfe4BytesSpiBusy | tfe6BytesSpiBusy | (!tfe6BytesFifoEmpty);
+assign Led_o = ledReg;
 
 //***********************************************
 //	                CODING
 //***********************************************
+/* Blink Led */
+always @(posedge clk25) begin
+    if (initRst) begin
+        ledCnt <= 0;
+        ledReg <= 1'b0;
+    end
+    else begin
+        if (ledCnt == LED_TICK_RATE) begin
+            ledReg <= ~ledReg;
+            ledCnt <= 0;
+        end
+        else begin
+            ledCnt <= ledCnt + 1;
+        end
+    end
+end
 
 /* MUX SpiM devices */
 always @(*) begin 
@@ -180,6 +212,13 @@ ClkGen ClkGen
     .Clk25Mhz_o(clk25)
 );
 
+PulseFilter PulseFilter (
+	.Clk_i(clk25),
+	.Rst_i(initRst),
+	.Signal_i(Rst_i),
+	.SignalFilt_o(rstFiltered)
+);
+
 InitRst InitRst
 (
     .clk_i(clk25),
@@ -193,7 +232,7 @@ InterfaceArbiter#
 )
 SpiSlaveArbiter
 (
-    .Rst_i(Rst_i),
+    .Rst_i(rstFiltered),
     .Clk_i(clk60),
     .Sck_i(Sck_i),
     .Ss_i(Ss_i),
@@ -210,7 +249,7 @@ SpiSlaveArbiter
 PacketAnalyzer1Mosi	PacketAnalyzer1Mosi
 (
 	.Clk_i					        (clk60),
-	.Rst_i					        (Rst_i),
+	.Rst_i					        (rstFiltered),
 
 	.DataFromSpi_i			        (spiData),
 	.ValDataFromSpi_i		        (spiDataVal),
@@ -228,7 +267,7 @@ PacketAnalyzer1Mosi	PacketAnalyzer1Mosi
 PacketAnalyzer4Mosi PacketAnalyzer4Mosi
 (
     .Clk_i					        (clk60),
-    .Rst_i					        (Rst_i),
+    .Rst_i					        (rstFiltered),
     
     .DataFromSpi_i			        (spiData),
     .ValDataFromSpi_i		        (spiDataVal),

+ 1 - 1
src/src/Top/TopBochV3Tb.sv

@@ -269,7 +269,7 @@ assign QSPITotalWordNum = LMXWordNum + DDSWordNum + POTWordNum + DACWordNum + AT
 assign QSpiBochv3TotalWordNum = CtrlColdPartWordNum + Tfe2bWordNum + Tfe4bWordNum + Tfe7bWordNum + Tfe6bWordNum;
 assign QSpiCtrlCp2444v1TotalWordNum = CtrlCp2444v1GpioWordNum + SwCtrlP1WordNum + AttCtrlP1WordNum + AttCtrlP2WordNum + AttCtrlP3WordNum + AttCtrlP4WordNum;
 
-assign currClk = (modeSel) ? Clk60 : Clk10;
+assign currClk = (modeSel) ? Clk60 : Clk60;
 
 //***********************************************
 //	           CLOCK GENERATION