Добавил возможность прошивки FLASH CP2444v1

src/constr/BochV3.cst

@@ -1,11 +1,11 @@
 //Copyright (C)2014-2024 Gowin Semiconductor Corporation.
 //All rights reserved. 
 //File Title: Physical Constraints file
-//Tool Version: V1.9.9.03 (64-bit)
+//Tool Version: V1.9.11 (64-bit)
 //Part Number: GW1N-UV9QN88C6/I5
 //Device: GW1N-9
 //Device Version: C
-//Created Time: Mon 12 02 11:08:54 2024
+//Created Time: Mon 05 19 14:27:08 2025
 
 IO_LOC "Led_o" 18;
 IO_PORT "Led_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
@@ -27,8 +27,6 @@ IO_LOC "CtrlCp2444v1Mosi3_o" 29;
 IO_PORT "CtrlCp2444v1Mosi3_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
 IO_LOC "CtrlCp2444v1Mosi2_o" 30;
 IO_PORT "CtrlCp2444v1Mosi2_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
-IO_LOC "CtrlCp2444v1Mosi1_o" 31;
-IO_PORT "CtrlCp2444v1Mosi1_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
 IO_LOC "CtrlCp2444v1Mosi0_o" 32;
 IO_PORT "CtrlCp2444v1Mosi0_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
 IO_LOC "LmkBSck_o" 76;
@@ -43,12 +41,14 @@ IO_LOC "LmkACs_o" 49;
 IO_PORT "LmkACs_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
 IO_LOC "LmkAMosi_o" 51;
 IO_PORT "LmkAMosi_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
+IO_LOC "CtrlCp2444v1Mosi1_io" 31;
+IO_PORT "CtrlCp2444v1Mosi1_io" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
+IO_LOC "Mosi1_io" 81;
+IO_PORT "Mosi1_io" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
 IO_LOC "Mosi3_i" 83;
 IO_PORT "Mosi3_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "Mosi2_i" 82;
 IO_PORT "Mosi2_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
-IO_LOC "Mosi1_io" 81;
-IO_PORT "Mosi1_io" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "Mosi0_i" 80;
 IO_PORT "Mosi0_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "SsFlash_i" 15;
@@ -59,11 +59,11 @@ IO_LOC "Sck_i" 13;
 IO_PORT "Sck_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "Rst_i" 16;
 IO_PORT "Rst_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
-IO_LOC "LmkBMiso_i" 74;
-IO_PORT "LmkBMiso_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
-IO_LOC "TfeMiso_i" 40;
-IO_PORT "TfeMiso_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "CtrlCp2444v1Ld_i" 33;
 IO_PORT "CtrlCp2444v1Ld_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
+IO_LOC "TfeMiso_i" 40;
+IO_PORT "TfeMiso_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
+IO_LOC "LmkBMiso_i" 74;
+IO_PORT "LmkBMiso_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "LmkAMiso_i" 48;
 IO_PORT "LmkAMiso_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;

src/constr/BochV3.sdc

@@ -1,11 +1,12 @@
-//Copyright (C)2014-2024 GOWIN Semiconductor Corporation.
+//Copyright (C)2014-2025 GOWIN Semiconductor Corporation.
 //All rights reserved.
 //File Title: Timing Constraints file
-//Tool Version: V1.9.9.03 (64-bit) 
-//Created Time: 2024-12-27 15:01:39
+//Tool Version: V1.9.11 (64-bit) 
+//Created Time: 2025-05-19 11:54:13
 create_clock -name clk25 -period 40 -waveform {0 20} [get_nets {clk25}]
 create_clock -name Sck_i -period 10 -waveform {0 8.334} [get_ports {Sck_i}]
 create_clock -name clk60 -period 16.667 -waveform {0 8.334} [get_nets {clk60}]
 create_clock -name clk40 -period 25 -waveform {0 12.5} [get_nets {clk40}]
 set_clock_groups -asynchronous -group [get_clocks {Sck_i}] -group [get_clocks {clk60 clk40 clk25}]
 report_timing -setup -to_clock [get_clocks {clk60}] -max_paths 25 -max_common_paths 1
+report_timing -setup -from_clock [get_clocks {clk60}] -to_clock [get_clocks {clk60}] -max_paths 25 -max_common_paths 1

src/src/PacketAnalyzer1Mosi/PacketAnalyzer1Mosi.v

@@ -36,8 +36,10 @@ module PacketAnalyzer1Mosi (
 	output reg FlagDirectLmkA_o,
 	output reg FlagDirectLmkB_o,
 	output reg FlagDirectCtrlColdPart_o,
+	output reg FlagDirectCtrlColdPartMirrored_o,
 	output reg FlagDirectHubTfe_o,
 	output reg FlagDirectFlash_o,
+	output reg FlagDirectFlashMirrored_o,
 
 	output reg Busy_o
 );
@@ -61,6 +63,9 @@ localparam DEV_ID_CTRL_COLD_PART 			= 5'd2;
 localparam DEV_ID_HUB_TFE 					= 5'd3;
 localparam DEV_ID_FLASH 					= 5'd4;
 
+localparam DEV_ID_CTRL_COLD_PART_MIRRORED 	= 5'd30;
+localparam DEV_ID_FLASH_MIRRORED 			= 5'd31;
+
 //==========================================
 // Assignments
 //==========================================
@@ -117,8 +122,11 @@ always @(posedge Clk_i) begin
 			DEV_ID_FLASH : begin
 				FlagDirectFlash_o <= 1'b1;
 			end
-			default : begin
-
+			DEV_ID_CTRL_COLD_PART_MIRRORED : begin
+				FlagDirectCtrlColdPartMirrored_o <= 1'b1;
+			end
+			DEV_ID_FLASH_MIRRORED : begin
+				FlagDirectFlashMirrored_o <= 1'b1;
 			end
 		endcase
 	end
@@ -126,8 +134,10 @@ always @(posedge Clk_i) begin
 		FlagDirectLmkA_o 	<= 1'b0;
 		FlagDirectLmkB_o 	<= 1'b0;
 		FlagDirectCtrlColdPart_o <= 1'b0;
+		FlagDirectCtrlColdPartMirrored_o <= 1'b0;
 		FlagDirectHubTfe_o <= 1'b0;
 		FlagDirectFlash_o 	<= 1'b0;
+		FlagDirectFlashMirrored_o <= 1'b0;
 	end
 end
 

src/src/Top/TopBochV3.v

@@ -10,35 +10,35 @@ input Ss_i,
 input SsFlash_i,
 
 input Mosi0_i,
-input Mosi1_io,
+inout Mosi1_io,
 input Mosi2_i,
 input Mosi3_i,
 
 /* LMK_A */
-output reg  LmkAMosi_o,
-output reg  LmkACs_o,
-output reg  LmkASck_o,
-input       LmkAMiso_i,
+output reg  	LmkAMosi_o,
+output reg  	LmkACs_o,
+output reg  	LmkASck_o,
+input       	LmkAMiso_i,
 /* LMK_B */
-output  reg LmkBMosi_o,
-output  reg LmkBCs_o,
-output  reg LmkBSck_o,
-input       LmkBMiso_i,
+output  reg 	LmkBMosi_o,
+output  reg 	LmkBCs_o,
+output  reg 	LmkBSck_o,
+input       	LmkBMiso_i,
 /*  CtrlCp2444v1  */
-output  reg    CtrlCp2444v1Mosi0_o,
-output      CtrlCp2444v1Mosi1_o,
-output      CtrlCp2444v1Mosi2_o,
-output      CtrlCp2444v1Mosi3_o,
-output  reg    CtrlCp2444v1Cs_o,
-output  reg    CtrlCp2444v1CsFlash_o,
-output  reg    CtrlCp2444v1Sck_o,
-output      CtrlCp2444v1Rst_o,
-input       CtrlCp2444v1Ld_i,
+output  reg     CtrlCp2444v1Mosi0_o,
+inout           CtrlCp2444v1Mosi1_io,
+output          CtrlCp2444v1Mosi2_o,
+output          CtrlCp2444v1Mosi3_o,
+output  reg     CtrlCp2444v1Cs_o,
+output  reg     CtrlCp2444v1CsFlash_o,
+output  reg     CtrlCp2444v1Sck_o,
+output          CtrlCp2444v1Rst_o,
+input           CtrlCp2444v1Ld_i,
 /*  HUB-1854  */
-output reg TfeClk_o,
-output reg TfeMosi_o,
-output reg TfeCs_o,
-input      TfeMiso_i,
+output reg      TfeClk_o,
+output reg 		TfeMosi_o,
+output reg 		TfeCs_o,
+input      		TfeMiso_i,
 
 /* Led */
 output Led_o
@@ -59,8 +59,12 @@ wire spiDataVal;
 wire flagDirectLmkA;
 wire flagDirectLmkB;
 wire flagDirectCtrlColdPart;
+wire flagDirectCtrlColdPartMirrored;
+wire flagDirectColdPartMuxed;
 wire flagDirectHubTfe;
 wire flagDirectFlash;
+wire flagDirectFlashMirrored;
+wire flagDirectFlashMuxed;
 /* PacketAnalyzer4Mosi Flags */
 wire valCtrlColdPartDataToFifo;
 wire valTfe2BytesDataToFifo;
@@ -75,6 +79,9 @@ wire clk210;
 /* InitRst */
 wire initRst;
 
+/* misoReg */
+reg misoReg;
+
 /* Busy wires */
 wire busyMosi1;
 wire busyMosi4;
@@ -120,6 +127,7 @@ reg ledReg;
 wire ctrlCp2444v1Cs;
 wire ctrlCp2444v1Sck;
 wire ctrlCp2444v1Mosi;
+wire ctrlCp2444v1Mosi1;
 //***********************************************
 //	                ASSIGNMENTS
 //***********************************************
@@ -129,7 +137,16 @@ assign busyForTfe2Bytes = tfe4BytesSpiBusy | tfe6BytesSpiBusy | tfe7BytesSpiBusy
 assign busyForTfe4Bytes = tfe2BytesSpiBusy | tfe6BytesSpiBusy | tfe7BytesSpiBusy;
 assign busyForTfe6Bytes = tfe2BytesSpiBusy | tfe4BytesSpiBusy | tfe7BytesSpiBusy; 
 assign busyForTfe7Bytes = tfe2BytesSpiBusy | tfe4BytesSpiBusy | tfe6BytesSpiBusy | (!tfe6BytesFifoEmpty) | (!tfe4BytesFifoEmpty);
-assign Led_o = ledReg;
+// assign Led_o = ledReg;
+assign Led_o = 1'b1; //Golden Image
+
+assign flagDirectColdPartMuxed = flagDirectCtrlColdPart | flagDirectCtrlColdPartMirrored;
+assign flagDirectFlashMuxed = flagDirectFlash | flagDirectFlashMirrored;
+
+/* CtrlCp2444Mosi1_io */
+assign CtrlCp2444v1Mosi1_io = (flagDirectFlashMuxed) ? 1'bz : ctrlCp2444v1Mosi1;
+/* Mosi1_io */
+assign Mosi1_io = misoReg;
 
 //***********************************************
 //	                CODING
@@ -151,6 +168,21 @@ always @(posedge clk25) begin
     end
 end
 
+/* misoReg */
+always @(*) begin
+    if (Rst_i) begin 
+        misoReg = 1'b0;
+    end
+    else begin 
+        if (flagDirectFlashMuxed) begin 
+            misoReg = CtrlCp2444v1Mosi1_io; 
+		end
+		else begin 
+			misoReg = 1'bz;
+		end
+	end
+end
+
 /* MUX SpiM devices */
 always @(*) begin 
     if (flagDirectLmkA) begin   // LMK_A
@@ -173,7 +205,7 @@ always @(*) begin
         LmkBCs_o = 1'b1;
         LmkBSck_o = 1'b0;
     end
-    if (flagDirectCtrlColdPart) begin
+    if (flagDirectColdPartMuxed) begin
         CtrlCp2444v1Cs_o = Ss_i;
         CtrlCp2444v1Sck_o = Sck_i;
         CtrlCp2444v1Mosi0_o = Mosi0_i;
@@ -215,8 +247,11 @@ always @(*) begin
             TfeCs_o = 1'b1;
         end
     end
-    if (flagDirectFlash) begin // Flash
-        CtrlCp2444v1CsFlash_o = SsFlash_i;
+    if (flagDirectFlashMuxed) begin // Flash
+		CtrlCp2444v1Sck_o = Sck_i;
+		CtrlCp2444v1Mosi0_o = Mosi0_i;
+		CtrlCp2444v1Cs_o = 1'b1;
+        CtrlCp2444v1CsFlash_o = Ss_i;
     end
     else begin 
         CtrlCp2444v1CsFlash_o = 1'b1;
@@ -278,8 +313,10 @@ PacketAnalyzer1Mosi	PacketAnalyzer1Mosi
 	.FlagDirectLmkA_o		        (flagDirectLmkA),
     .FlagDirectLmkB_o		        (flagDirectLmkB),
     .FlagDirectCtrlColdPart_o	    (flagDirectCtrlColdPart),
+    .FlagDirectCtrlColdPartMirrored_o (flagDirectCtrlColdPartMirrored),
     .FlagDirectHubTfe_o		        (flagDirectHubTfe),
     .FlagDirectFlash_o		        (flagDirectFlash),
+    .FlagDirectFlashMirrored_o	    (flagDirectFlashMirrored),
 	
 	.Busy_o					        (busyMosi1)
 );
@@ -317,7 +354,7 @@ CtrlCp2444Wrapper #(
     .Ss_o                           (ctrlCp2444v1Cs),
     .Sck_o                          (ctrlCp2444v1Sck),
     .Mosi0_o                        (ctrlCp2444v1Mosi),
-    .Mosi1_o                        (CtrlCp2444v1Mosi1_o),
+    .Mosi1_o                        (ctrlCp2444v1Mosi1),
     .Mosi2_o                        (CtrlCp2444v1Mosi2_o),
     .Mosi3_o                        (CtrlCp2444v1Mosi3_o)