BOCHV3_FPGA/src/src/Top/TopBochV3Tb.sv

`timescale 1ns/1ns

module TopBochV3Tb;

parameter CLK_PERIOD = 8.13; // Clock period in ns
//***********************************************
//	            INPUTS
//***********************************************
    logic Clk_i;
    logic Clk100;
    logic Clk200;
    logic Clk125;
    logic Clk60;
    logic Clk20;
    logic Clk80;
    logic Clk50;
    logic Clk24;
    logic Clk10; 
    logic Rst_i;
    logic Start_i;
    logic CPHA_i;
    logic [23:0] SPIdata;
	logic SpiDataVal_i;
    logic SELST_i;
    logic [1:0] WidthSel_i;
    logic LAG_i;
    logic LEAD_i;
    logic EndianSel_i;
    logic [5:0] Stop_i;
    logic PulsePol_i;
    logic MisoLdLmx_i;

//***********************************************
//	            OUTPUTS
//***********************************************
    wire Mosi0_o;
    wire Mosi1_o;
    wire Mosi2_o;
    wire Mosi3_o;
    wire Sck_o;
    wire Ss_o;
    wire SsFlash_o;
    wire Val_o;
    wire anyFlag;

    wire valR;
    wire valQ;
    wire SckR;
    wire SckQ;
    wire SsR;
    wire SsQ;
    wire mosi0R;
    wire mosi0Q;

    wire locked;
    wire rstInit;

    logic mosi1Reg;

    logic [16:0] trCnt;
    logic [4:0] trCntSync;


    logic modeSel; 
    logic [23:0] randData;
    logic [31:0] randData32;
    logic [5:0] QSPITotalWordNum;
    logic [5:0] QSpiBochv3TotalWordNum;
    logic [5:0] QSpiCtrlCp2444v1TotalWordNum;
    logic Stop;
    logic [31:0] stopCnt;
    logic rstForFPGA;

//***********************************************
//	            Lines From RF Top
//***********************************************

    logic [7:0] sckFromRFTop;
    logic [7:0] mosiFromRFTop;
    logic [7:0] ssFromRFTop;


    logic [23:0] dataFromSPItb;
    logic        valFromSPItb; 

//***********************************************
//	            CLASSES
//***********************************************

class Packet;
    rand bit [23:0] data;
    rand bit [31:0] data32;
endclass

Packet pkt;
//***********************************************
//	      HEADERS FOR DEVICES - SB_TMSG
//***********************************************
localparam [4:0]  DeviceIdLmx2594 = 5'h0;
localparam [4:0]  DeviceIdDDS = 5'h1;
localparam [4:0]  DeviceIdPot = 5'h2;
localparam [4:0]  DeviceIdDac = 5'h3;
localparam [4:0]  DeviceIdAtt = 5'h4;
localparam [4:0]  DeviceIdShReg = 5'h5;
localparam [4:0]  DeviceIdMax2870 = 5'h6;
localparam [4:0]  DeviceIdGpio1 = 5'h7;
localparam [4:0]  DeviceIdTemp = 5'h8;
localparam [4:0]  DeviceIdGpio2 = 5'h9;

localparam [16:0] Gpio1InitWordNum = 17'd1;
localparam [16:0] Gpio2InitWordNum = 17'd1;
localparam [16:0] PotWordInitNum = 17'd1;
localparam [16:0] DacWordInitNum = 17'd1;
localparam [16:0] AttWordInitNum = 17'd1;
localparam [16:0] ShRegWordInitNum = 17'd1;
localparam [16:0] Lmx2594InitWordNum = 17'd13;
localparam [16:0] DDSInitWordNum = 17'd7;
localparam [16:0] MaxInitWordNum = 17'd6;
localparam [16:0] TempSensWordNum = 17'd1;

localparam [23:0] InitGpio1Header       = {1'h0, DeviceIdGpio1, Gpio1InitWordNum, 1'h1};
localparam [23:0] InitGpio2Header       = {1'b0, DeviceIdGpio2,Gpio2InitWordNum,1'h1 };
localparam [23:0] TempSensHeader        = {1'h0, DeviceIdTemp, TempSensWordNum, 1'h1};
localparam [23:0] InitLMX2594Header     = {1'h0, DeviceIdLmx2594, Lmx2594InitWordNum, 1'h1};
localparam [23:0] InitDDSHeader         = {1'h0, DeviceIdDDS, DDSInitWordNum, 1'h1};
localparam [23:0] InitMAX2870Header     = {1'h0, DeviceIdMax2870, MaxInitWordNum, 1'h1};
localparam [23:0] InitPotHeader         = {1'h0, DeviceIdPot, PotWordInitNum, 1'h1};
localparam [23:0] InitDacHeader         = {1'h0, DeviceIdDac, DacWordInitNum, 1'h1};
localparam [23:0] InitAttHeader         = {1'h0, DeviceIdAtt, AttWordInitNum, 1'h1};
localparam [23:0] InitShRegHeader       = {1'h0, DeviceIdShReg, ShRegWordInitNum, 1'h1};

localparam [3:0]  LMXWordNum = 4'd14;
localparam [2:0]  DDSWordNum = 3'd4;
localparam        POTWordNum = 2'd2;
localparam        DACWordNum = 1'd1;
localparam        ATTWordNum = 1'd1;
localparam [1:0]  ShRegWordNum = 2'd1;
localparam [1:0]  MaxWordNum =   2'd2;
localparam [1:0]  GPIOWordNum =  2'd1;

//***********************************************
//	           GPIO 1 REG 
//***********************************************
localparam [0:0] RF_SW1 = 1'h0;
localparam [0:0] RF_SW2 = 1'h0;
localparam [0:0] CTRL_AM_SW3 = 1'h0;
localparam [0:0] DDS_SYNC_CTRL_FPGA = 1'h0;
localparam [0:0] DDS_RESET_FPGA = 1'h0;
localparam [0:0] DDS_SYNC_FPGA = 1'h0;
localparam [0:0] SW_CAP4 = 1'h0;
localparam [0:0] AM_ALC_SW = 1'h0;
localparam [0:0] SW_CAP3 = 1'h0;
localparam [0:0] SW_CAP2 = 1'h0;
localparam [0:0] SW_CAP1 = 1'h0;
localparam [0:0] AM_ALC_1_FIX = 1'h0;
localparam [0:0] PLL_VTUNE_CTRL = 1'h0;
localparam [0:0] PLL_SYNC_CTRL = 1'h0;
localparam [0:0] PLL_SYNC = 1'h0;
localparam [0:0] PLL_LOOP_CTRL = 1'h0;
localparam [0:0] DDS_X2_FPGA = 1'h0;
localparam [0:0] DDS_SAW2_FPGA = 1'h0;
localparam [0:0] REF_OFFSET_CTRL_FPGA = 1'h0;
localparam [0:0] GPIO_ADRF_V1 = 1'h0;
localparam [0:0] GPIO_ADRF_V2 = 1'h0;
localparam [0:0] DDS_SAW1_FPGA = 1'h0;

localparam [23:0] GPIO_REG = {DDS_SAW1_FPGA,GPIO_ADRF_V2,GPIO_ADRF_V1,REF_OFFSET_CTRL_FPGA,DDS_SAW2_FPGA,DDS_X2_FPGA,PLL_LOOP_CTRL,PLL_SYNC,PLL_SYNC_CTRL,PLL_VTUNE_CTRL,AM_ALC_1_FIX,SW_CAP1,SW_CAP2,SW_CAP3,AM_ALC_SW,SW_CAP4,DDS_SYNC_FPGA,DDS_RESET_FPGA,DDS_SYNC_CTRL_FPGA,CTRL_AM_SW3,RF_SW2,RF_SW1};

//***********************************************

// localparam [23:0] AllDevQSPIHeader = {1'h1, LMXWordNum, DDSWordNum, POTWordNum, DACWordNum,ATTWordNum, ShRegWordNum,MaxWordNum, GPIOWordNum, 7'h1};
localparam [23:0] AllDevQSPIHeader = {1'h1, 1'h0,DDSWordNum,1'h0,GPIOWordNum, LMXWordNum,1'h0,MaxWordNum,1'h0,ShRegWordNum,1'h0,POTWordNum,DACWordNum,ATTWordNum,1'h1};

//***********************************************
//	      HEADERS FOR DEVICES - BOCHv3
//***********************************************
/* Device ID's for 1 MOSI */
localparam [4:0]  DeviceIdLmkA = 5'h0;
localparam [4:0]  DeviceIdLmkB = 5'h1;
localparam [4:0]  DeviceIdTfeHub = 5'h3;
localparam [4:0]  DeviceIdFlash = 5'h4;
/* Init Word Numbers */
localparam [16:0] LmkAInitWordNum = 17'd129;
localparam [16:0] LmkBInitWordNum = 17'd129;
localparam [16:0] TfeHubInitWordNum = 17'd3;
localparam [16:0] FlashInitWordNum = 17'd1;
/* Headers */
localparam [23:0] InitLmkAHeader = {1'h0, DeviceIdLmkA, LmkAInitWordNum, 1'h1};
localparam [23:0] InitLmkBHeader = {1'h0, DeviceIdLmkB, LmkBInitWordNum, 1'h1};
localparam [23:0] InitFlashHeader = {1'h0, DeviceIdFlash, FlashInitWordNum, 1'h1};
/* Word Numbers 4-MOSI */
localparam [3:0] CtrlColdPartWordNum = 4'd7;
localparam [0:0]     Tfe2bWordNum = 1'd1;
localparam [1:0]      Tfe4bWordNum= 2'd2;
localparam [1:0]      Tfe7bWordNum= 2'd3;
localparam [1:0]      Tfe6bWordNum= 2'd2;
/* Headers 4-MOSI */
localparam [23:0] CtrlColdPartHeader = {1'h1, 1'h0, CtrlColdPartWordNum, 1'h0, 2'h0, 2'h0, 2'h0, 10'h0, 1'h1};
localparam [23:0] Tfe2bHeader = {1'h1, 1'h0, 4'h0, Tfe2bWordNum, 2'h0, 2'h0, 2'h0, 10'h0, 1'h1};
localparam [23:0] Tfe4bHeader = {1'h1, 1'h0, 4'h0, 1'h0, Tfe4bWordNum, 2'h0, 2'h0, 10'h0, 1'h1};
localparam [23:0] Tfe7bHeader = {1'h1, 1'h0, 4'h0, 1'h0, 1'h0, Tfe7bWordNum, 2'h0, 10'h0, 1'h1};
localparam [23:0] Tfe6bHeader = {1'h1, 1'h0, 4'h0, 1'h0, 1'h0, 1'h0, Tfe6bWordNum, 10'h0, 1'h1};
/* All Devices Header */
localparam [23:0] AllDevBochv3QSpiHeader = {1'h1, 1'h0, CtrlColdPartWordNum, Tfe2bWordNum, Tfe4bWordNum, Tfe7bWordNum, Tfe6bWordNum, 10'h0, 1'h1};
//***********************************************
//	      HEADERS FOR DEVICES - CTRL_CP2444v1
//***********************************************
localparam [4:0] DeviceIdSwCtrlP1 = 5'h0;
localparam [4:0] DeviceIdAttCtrlP1 = 5'h1;
localparam [4:0] DeviceIdAttCtrlP2 = 5'h2;
localparam [4:0] DeviceIdAttCtrlP3 = 5'h3;
localparam [4:0] DeviceIdAttCtrlP4 = 5'h4;
localparam [4:0] DeviceIdCtrlCp2444v1Gpio = 5'h5;
/* Init Word Numbers */
localparam [16:0] SwCtrlP1WordNum = 17'd1;
localparam [16:0] AttCtrlP1WordNum = 17'd1;
localparam [16:0] AttCtrlP2WordNum = 17'd1;
localparam [16:0] AttCtrlP3WordNum = 17'd1;
localparam [16:0] AttCtrlP4WordNum = 17'd1;
localparam [16:0] CtrlCp2444v1GpioWordNum = 17'd1;
/* Headers */
localparam [23:0] SwCtrlP1Header = {1'h0, DeviceIdSwCtrlP1, SwCtrlP1WordNum, 1'h1};
localparam [23:0] AttCtrlP1Header = {1'h0, DeviceIdAttCtrlP1, AttCtrlP1WordNum, 1'h1};
localparam [23:0] AttCtrlP2Header = {1'h0, DeviceIdAttCtrlP2, AttCtrlP2WordNum, 1'h1};
localparam [23:0] AttCtrlP3Header = {1'h0, DeviceIdAttCtrlP3, AttCtrlP3WordNum, 1'h1};
localparam [23:0] AttCtrlP4Header = {1'h0, DeviceIdAttCtrlP4, AttCtrlP4WordNum, 1'h1};
localparam [23:0] CtrlCp2444v1GpioHeader = {1'h0, DeviceIdCtrlCp2444v1Gpio, CtrlCp2444v1GpioWordNum, 1'h1};
/* Word Numbers */
localparam        SwCtrlP1QSpiWordNum = 1'd1;
localparam        AttCtrlP1QSpiWordNum = 1'd1;
localparam        AttCtrlP2QSpiWordNum = 1'd1;
localparam        AttCtrlP3QSpiWordNum = 1'd1;
localparam        AttCtrlP4QSpiWordNum = 1'd1;
localparam        CtrlCp2444v1GpioQSpiWordNum = 1'd1;
/* QSpi Headers */
localparam [23:0] CtrlCp2444v1GpioQSpiHeader = {1'h1, CtrlCp2444v1GpioQSpiWordNum, 1'h0,1'h0,1'h0,1'h0,1'h0, 15'h0, 1'h1};
localparam [23:0] SwCtrlP1QSpiHeader = {1'h1, 1'h0, SwCtrlP1QSpiWordNum, 1'h0, 1'h0, 1'h0, 1'h0, 15'h0, 1'h1};
localparam [23:0] AttCtrlP1QSpiHeader = {1'h1, 1'h0, 1'h0, AttCtrlP1QSpiWordNum, 1'h0, 1'h0, 1'h0, 15'h0, 1'h1};
localparam [23:0] AttCtrlP2QSpiHeader = {1'h1, 1'h0, 1'h0, 1'h0, AttCtrlP2QSpiWordNum, 1'h0, 1'h0, 15'h0, 1'h1};
localparam [23:0] AttCtrlP3QSpiHeader = {1'h1, 1'h0, 1'h0, 1'h0, 1'h0, AttCtrlP3QSpiWordNum, 1'h0, 15'h0, 1'h1};
localparam [23:0] AttCtrlP4QSpiHeader = {1'h1, 1'h0, 1'h0, 1'h0, 1'h0, 1'h0, AttCtrlP4QSpiWordNum, 15'h0, 1'h1};
localparam [23:0] AllDevCtrlCp2444v1QSpiHeader = {1'h1,CtrlCp2444v1GpioQSpiWordNum, SwCtrlP1QSpiWordNum, AttCtrlP1QSpiWordNum, AttCtrlP2QSpiWordNum, AttCtrlP3QSpiWordNum, AttCtrlP4QSpiWordNum, 16'h0, 1'h1};


//***********************************************
//	           ASSIGNS
//***********************************************
assign Val_o = (modeSel) ? valQ : valR;
assign Sck_o = (modeSel) ? SckQ : SckR;
/* If the counter is 261 then the SsFlash should be active instead of Ss_o */
assign Ss_o = (trCnt == 261) ? 1'b1 : (modeSel) ? SsQ : SsR;
/* SsFlash_o should be active instead of Ss_o during the Flash transaction */
assign SsFlash_o = (trCnt  == 261 ) ? 1'b0 : 1'b1;
assign Mosi0_o = (modeSel) ? mosi0Q : mosi0R;
assign Mosi1_io = (anyFlag) ? 1'bz : Mosi1_o;
assign MisoLdLmx_i = 1'b1;

assign emptyFlagTx = (trCnt > 262 + QSpiBochv3TotalWordNum) ? 1'b1 : 1'b0;
assign QSPITotalWordNum = LMXWordNum + DDSWordNum + POTWordNum + DACWordNum + ATTWordNum + ShRegWordNum + MaxWordNum + GPIOWordNum; 
assign QSpiBochv3TotalWordNum = CtrlColdPartWordNum + Tfe2bWordNum + Tfe4bWordNum + Tfe7bWordNum + Tfe6bWordNum;
assign QSpiCtrlCp2444v1TotalWordNum = CtrlCp2444v1GpioWordNum + SwCtrlP1WordNum + AttCtrlP1WordNum + AttCtrlP2WordNum + AttCtrlP3WordNum + AttCtrlP4WordNum;

assign currClk = (modeSel) ? Clk60 : Clk10;

//***********************************************
//	           CLOCK GENERATION
//***********************************************
always #(CLK_PERIOD/2) Clk_i = ~Clk_i;
always #(10/2) Clk100 = ~Clk100;
always #(5/2) Clk200 = ~Clk200;
always #(8/2) Clk125 = ~Clk125;
always #(16.67/2) Clk60 = ~Clk60;
always #(20/2) Clk50 = ~Clk50;
always #(12.5/2) Clk80 = ~Clk80;
always #(41.67/2) Clk24 = ~Clk24;
always #(50/2) Clk20 = ~Clk20;
always #(50)   Clk10 = ~Clk10; 

//***********************************************
//	           INITIALIZATION
//***********************************************

initial begin
      // Initialize Inputs
      Clk_i = 1;
      Clk100= 1;
      Clk200 = 1;
      Clk125 = 1;
      Clk60 = 1;
      Clk20 = 1;
      Clk50 = 1;
      Clk80 = 1;
      Clk24 = 1;
      rstForFPGA = 0;
      Clk10 = 1;
      pkt = new();
      Rst_i = 1;
      Start_i = 0;
      CPHA_i = 0;		SpiDataVal_i = 0;
      SELST_i = 1;//0:High, 1:Low
      WidthSel_i = 2; // 3-32bit, 2-24bit, 1-16bit, 0-8bit
      LAG_i = 0;
      LEAD_i = 0;
      EndianSel_i = 0; // 0:MSB first, 1:lsb first
      PulsePol_i = 0;
      // Reset the system
      #(CLK_PERIOD*10) Rst_i = 0;
      #(700000-60) rstForFPGA = 1;
      #(CLK_PERIOD*74) rstForFPGA = 0;
      #(165000) Start_i = 1; // Start SPI transaction
       wait (trCnt == 262) begin 
            Start_i = 0;
        end
        #(CLK_PERIOD*100) 
        Start_i = 1; // Start SPI transaction
    //   wait (trCnt == 70) begin 
    //         Start_i = 0;
    //     end
    //     #(CLK_PERIOD*1000) 
    //     Start_i = 1; // Start SPI transaction
  end
//***********************************************
always_ff @(posedge currClk) begin
    if (Rst_i) begin 
        trCnt <= 0;
    end
    else begin 
        if (Val_o) begin 
            trCnt <= trCnt + 1;
        end
    end
end

always_comb begin 
    if (Rst_i) begin 
        mosi1Reg = 0;
    end
    else begin 
        mosi1Reg = Mosi1_io;
    end
end



genvar i;
// always_comb begin 
//     if (Rst_i) begin 
//         WidthSel_i = 2'd0;
//     end
//     else begin
//         if (trCnt == 1 || trCnt == 3 ) begin 
//             WidthSel_i = 2'd0;
//         end 
//         else if (trCnt > 36 && trCnt < 43) begin 
//             WidthSel_i = 2'd3;
//         end
//         else begin 
//             WidthSel_i = 2'd2;
//         end
//     end
// end

always_comb begin 
    if (Rst_i) begin 
        modeSel = 0;
    end
    else begin 
        if (trCnt == 262) begin 
            modeSel = 1;
        end
    end
end

always_comb begin 
    if (Rst_i) begin 
        Stop_i = 6'd0;
    end
    else begin 
        if (trCnt == 158) begin 
            Stop_i = 6'h0;
        end
        else begin
            Stop_i = 6'd0;
        end
    end
end

always_ff @(posedge currClk) begin 
    if (Rst_i) begin 
        randData<=0;
        randData32 <= 0;
    end
    else begin 
        randData <= pkt.randomize(data);
        randData32 <= pkt.randomize(data32);
    end
end

/* Data generation for SPI */
always_comb begin 
    if (Rst_i) begin 
        SPIdata = 0; 
    end
    else begin 
        /* Firstly the header for LMK_A */
        if (trCnt == 0) begin 
            SPIdata = InitLmkAHeader;
        end
        /* Then the data for LMK_A */
        else if (trCnt > 0 && trCnt < 130) begin 
            SPIdata = 24'haaaaaa;
        end
        /* Then the header for LMK_B */
        else if (trCnt == 130) begin 
            SPIdata = InitLmkBHeader;
        end
        /* Then the data for LMK_B */
        else if (trCnt > 130 && trCnt < 260) begin 
            SPIdata = 24'haaaaaa;
        end
        /* Then the header for the Flash */
        else if (trCnt == 260) begin 
            SPIdata = InitFlashHeader;
        end
        /* Then the data for the Flash but the SsFlash should be active instead of Ss_o */
        else if (trCnt == 261) begin 
            SPIdata = 24'haaaaaa;
        end
        /* Then the header for QSpi header */
        else if (trCnt == 262) begin 
            SPIdata = AllDevBochv3QSpiHeader;
        end
        /* First word after is a header for CtrlCp2444v1 */
        else if (trCnt == 263) begin 
            SPIdata = AllDevCtrlCp2444v1QSpiHeader;
        end
        /* Then the data for QSpi */
        else if (trCnt > 263 && trCnt < 263+QSpiBochv3TotalWordNum) begin
            SPIdata = 24'haaaaaa;
        end
    end
end
//***********************************************
//	           DUT INSTANTIATION
//***********************************************
GSR GSR(.GSRI(1'b1));

ExtSpiMEmul ExtSpiMEmul_inst (
        .Clk_i(currClk), 
        .Rst_i(Rst_i || modeSel), 
        .Start_i(Start_i), 
        .ClockPhase_i(CPHA_i),
        .EmptyFlag_i(emptyFlagTx), 
        .SpiData_i(SPIdata),
        .SelSt_i(SELST_i),
        .WidthSel_i(WidthSel_i),
        .Lag_i(LAG_i),
        .Lead_i(LEAD_i),
        .EndianSel_i(EndianSel_i),
        .Stop_i(6'h0),
        .PulsePol_i(PulsePol_i),
        .Mosi0_o(mosi0R),
        .Sck_o(SckR),
        .Ss_o(SsR),
        .Val_o(valR)
    );

ExtQspiMEmul ExtQspiMEmul_inst (
    .Clk_i(currClk),
    .Rst_i(Rst_i || !modeSel),
    .Start_i(Start_i),
    .ClockPhase_i(CPHA_i),
    .EmptyFlag_i(emptyFlagTx),
    .SpiData_i(SPIdata),
    .SelSt_i(SELST_i),
    .WidthSel_i(WidthSel_i),
    .Lag_i(LAG_i),
    .Lead_i(LEAD_i),
    .EndianSel_i(EndianSel_i),
    .Stop_i(6'h0),
    .PulsePol_i(PulsePol_i),
    .Mosi0_o(mosi0Q),
    .Mosi1_o(Mosi1_o),
    .Mosi2_o(Mosi2_o),
    .Mosi3_o(Mosi3_o),
    .Sck_o(SckQ),
    .Ss_o(SsQ),
    .Val_o(valQ)
);

TopBochv3 TopBochV3_inst (
    .Rst_i(rstForFPGA),
    .Sck_i(Sck_o),
    .Ss_i(Ss_o),
    .SsFlash_i(SsFlash_o),
    .Mosi0_i(Mosi0_o),
    .Mosi1_io(Mosi1_o),
    .Mosi2_i(Mosi2_o),
    .Mosi3_i(Mosi3_o),

    /* LMK_A */
    .LmkAMosi_o(),
    .LmkACs_o(),
    .LmkASck_o(),
    .LmkAMiso_i(),
    /* LMK_B */
    .LmkBMosi_o(),
    .LmkBCs_o(),
    .LmkBSck_o(),
    .LmkBMiso_i(),
    /* CtrlCp2444v1 */
    .CtrlCp2444v1Mosi0_o(),
    .CtrlCp2444v1Mosi1_o(),
    .CtrlCp2444v1Mosi2_o(),
    .CtrlCp2444v1Mosi3_o(),
    .CtrlCp2444v1Sck_o(),
    .CtrlCp2444v1Cs_o(),
    .CtrlCp2444v1Rst_o(),
    .CtrlCp2444v1Ld_i(),
    /* HUB-1854 */
    .TfeClk_o(),
    .TfeCs_o(),
    .TfeMosi_o(),
    .TfeMiso_i()


);





endmodule