`timescale 1ns / 1ns

module PacketAnalyzer1MosiTb (
);

localparam [4:0] LMX_ID 		= 5'd0;
localparam [4:0] DDS_ID 		= 5'd1;
localparam [4:0] POT_ID 		= 5'd2;
localparam [4:0] DAC_ID 		= 5'd3;
localparam [4:0] ATT_ID 		= 5'd4;
localparam [4:0] SH_REG_ID 		= 5'd5;
localparam [4:0] MAX_ID 		= 5'd6;
localparam [4:0] GPIO_ID 		= 5'd7;
localparam [4:0] TEMP_ID 		= 5'd8;

//===============USER DEFINE===================
localparam [16:0] CNT_DATA_WORDS = 7;
localparam [4:0] DEV_ID = ATT_ID;
//===============USER DEFINE_END===============

localparam MODE_4MOSI = 1'b1;
localparam MODE_1MOSI = 1'b0;

//===============USER DEFINE===================
localparam MODE_SELECT = MODE_1MOSI;
//===============USER DEFINE_END===============

localparam [23:0] CFG_REG = {MODE_SELECT, DEV_ID, CNT_DATA_WORDS, 1'b0};

reg clkMain_tb;
reg rstMain_tb;
reg busyMosi4_tb;

reg [23:0] DataFromSpi_tb;
reg ValDataFromSpi_tb;

reg [4:0] test;

always #10 clkMain_tb = ~clkMain_tb;

initial begin
	clkMain_tb = 0;
	rstMain_tb = 1;
	busyMosi4_tb = 0;
	test = DEV_ID;
	#100
	rstMain_tb = 0;
end

reg	[7:0]	state; 
reg	[63:0]	cnt;
reg	[63:0]	countState;

always @(posedge clkMain_tb) begin
	if (rstMain_tb) begin
		cnt <= 0;
		state <= 0;
		ValDataFromSpi_tb <= 0;	
		DataFromSpi_tb <= 0;
		countState <= 0;
	end
	else begin
		case(state)
			0: begin
				DataFromSpi_tb <= CFG_REG;

				if (cnt == 6) begin
					cnt <= 0;
					ValDataFromSpi_tb <= 1;
					state <= state + 1;
				end
				else begin
					cnt <= cnt + 1;
					state <= state;
				end
			end
			1: begin
				ValDataFromSpi_tb <= 0;
				if (cnt == 1) begin
					cnt <= 0;
					state <= state + 1;
				end
				else begin
					cnt <= cnt + 1;
					state <= state;
				end
			end
			2: begin
				DataFromSpi_tb <= 24'hA; //DATA0

				if (cnt == 6) begin
					cnt <= 0;
					ValDataFromSpi_tb <= 1;
					state <= state + 1;
					countState <= countState + 1;
				end
				else begin
					cnt <= cnt + 1;
					state <= state;
				end
			end
			3: begin
				ValDataFromSpi_tb <= 0;
				if (countState == CNT_DATA_WORDS) begin
					state <= 5;
				end
				else if (cnt == 1) begin
					cnt <= 0;
					state <= state + 1;
				end
				else begin
					cnt <= cnt + 1;
					state <= state;
				end
			end
			4: begin
				DataFromSpi_tb <= 24'hF; //DATA1

				if (cnt == 6) begin
					cnt <= 0;
					ValDataFromSpi_tb <= 1;
					state <= state + 1;
					countState <= countState + 1;
				end
				else begin
					cnt <= cnt + 1;
					state <= state;
				end
			end
			5: begin
				ValDataFromSpi_tb <= 0;
				if (countState == CNT_DATA_WORDS) begin
					state <= state;
				end
				else if (cnt == 1) begin
					cnt <= 0;
					state <= 2;
				end
				else begin
					cnt <= cnt + 1;
					state <= state;
				end
			end
		endcase
	end
end

PacketAnalyzer1Mosi DUT (
	.Clk_i					(clkMain_tb),	
	.Rst_i					(rstMain_tb),	
	
	.DataFromSpi_i 			(DataFromSpi_tb),
	.ValDataFromSpi_i 		(ValDataFromSpi_tb),
	
	.BusyMosi4_i			(busyMosi4_tb),

	.FlagDirectLmx_o		(),
	.FlagDirectDds_o		(),
	.FlagDirectPot_o		(),
	.FlagDirectDac_o		(),
	.FlagDirectAtt_o		(),
	.FlagDirectShReg_o		(),
	.FlagDirectMax_o		(),
	.FlagDirectGpio_o		(),
	.FlagDirectTemp_o		(),

	.Busy_o					()
);


endmodule