`timescale 1ns/1ps

module TopSbTmsgTb;
   parameter CLK_PERIOD = 8.13; // Clock period in ns

    // Inputs
    logic Clk_i;
    logic Clk100;
    logic Clk20;
    logic Clk80;
    logic Clk50;
    logic Clk24;
    logic Clk10; 
    logic Rst_i;
    logic Start_i;
    logic CPHA_i;
    logic [31:0] SPIdata;
	logic SpiDataVal_i;
    logic SELST_i;
    logic [1:0] WidthSel_i;
    logic LAG_i;
    logic LEAD_i;
    logic EndianSel_i;
    logic [5:0] Stop_i;
    logic PulsePol_i;

    // Outputs
    wire Mosi0_o;
    wire Mosi1_o;
    wire Mosi1_io;
    wire Mosi2_o;
    wire Mosi3_o;
    wire Sck_o;
    wire Ss_o;
    wire Val_o;

    wire valR;
    wire valQ;
    wire SckR;
    wire SckQ;
    wire SsR;
    wire SsQ;
    wire mosi0R;
    wire mosi0Q;

    wire locked;
    wire rstInit;

    logic [16:0] trCnt;
    logic [4:0] trCntSync;


    logic modeSel; 
    logic [23:0] randData;
    logic [31:0] randData32;
    logic [5:0] QSPITotalWordNum;
    logic Stop;
    logic [31:0] stopCnt;
    logic rstForFPGA;

//***********************************************
//	            Lines From RF Top
//***********************************************

    logic [7:0] sckFromRFTop;
    logic [7:0] mosiFromRFTop;
    logic [7:0] ssFromRFTop;


    logic [23:0] dataFromSPItb;
    logic        valFromSPItb; 

//***********************************************
//	            CLASSES
//***********************************************

class Packet;
    rand bit [23:0] data;
    rand bit [31:0] data32;
endclass

Packet pkt;

//***********************************************
//	      HEADERS FOR DEVICES
//***********************************************
localparam [4:0]  DeviceIdLmx2594 = 5'h0;
localparam [4:0]  DeviceIdDDS = 5'h1;
localparam [4:0]  DeviceIdPot = 5'h2;
localparam [4:0]  DeviceIdDac = 5'h3;
localparam [4:0]  DeviceIdAtt = 5'h4;
localparam [4:0]  DeviceIdShReg = 5'h5;
localparam [4:0]  DeviceIdMax2870 = 5'h6;
localparam [4:0]  DeviceIdGPIO = 5'h7;

localparam [16:0] Lmx2594InitWordNum = 17'd113;
localparam [16:0] DDSInitWordNum = 17'd37;
localparam [16:0] MaxInitWordNum = 17'd6;

localparam [23:0] InitLMX2594Header = {1'h0, DeviceIdLmx2594, Lmx2594InitWordNum, 1'h1};
localparam [23:0] InitDDSHeader = {1'h0, DeviceIdDDS, DDSInitWordNum, 1'h1};
localparam [23:0] InitMAX2870Header = {1'h0, DeviceIdMax2870, MaxInitWordNum, 1'h1};
localparam [3:0]  LMXWordNum = 4'd14;
localparam [1:0]  DDSWordNum = 2'd3;
localparam        POTWordNum = 1'd1;
localparam        DACWordNum = 1'd1;
localparam        ATTWordNum = 1'd1;
localparam [1:0]  ShRegWordNum = 1'd1;
localparam [2:0]  MaxWordNum =   3'd2;
localparam [1:0]  GPIOWordNum =  2'd1;

localparam [23:0] AllDevQSPIHeader = {1'h1, LMXWordNum, DDSWordNum, POTWordNum, DACWordNum,ATTWordNum, ShRegWordNum,MaxWordNum, GPIOWordNum, 7'h1};

//***********************************************
//	           ASSIGNS
//***********************************************
assign Val_o = (modeSel) ? valQ : valR;
assign Sck_o = (modeSel) ? SckQ : SckR;
assign Ss_o = (modeSel) ? SsQ : SsR;
assign Mosi0_o = (modeSel) ? mosi0Q : mosi0R;

assign emptyFlagTx = (trCnt > 183) ? 1'b1 : 1'b0;
assign QSPITotalWordNum = LMXWordNum + DDSWordNum + POTWordNum + DACWordNum + ATTWordNum + ShRegWordNum + MaxWordNum + GPIOWordNum; 

//***********************************************
//	           CLOCK GENERATION
//***********************************************
always #(CLK_PERIOD/2) Clk_i = ~Clk_i;
always #(10/2) Clk100 = ~Clk100;
always #(20/2) Clk50 = ~Clk50;
always #(12.5/2) Clk80 = ~Clk80;
always #(41.67/2) Clk24 = ~Clk24;
always #(50/2) Clk20 = ~Clk20;
always #(50)   Clk10 = ~Clk10; 

//***********************************************
//	           INITIALIZATION
//***********************************************

initial begin
      // Initialize Inputs
      Clk_i = 1;
      Clk100= 1;
      Clk20 = 1;
      Clk50 = 1;
      Clk80 = 1;
      Clk24 = 1;
      rstForFPGA = 0;
      Clk10 = 1;
      pkt = new();
      Rst_i = 1;
      Start_i = 0;
      CPHA_i = 0;		SpiDataVal_i = 0;
      SELST_i = 1;//0:High, 1:Low
    //   WidthSel_i = 2; // 3-32bit, 2-24bit, 1-16bit, 0-8bit
      LAG_i = 0;
      LEAD_i = 0;
      EndianSel_i = 0; // 0:MSB first, 1:lsb first
      PulsePol_i = 0;
      // Reset the system
      #(CLK_PERIOD*10) Rst_i = 0;
      #(300000-60) rstForFPGA = 1;
      #(CLK_PERIOD*74) rstForFPGA = 0;
      #(20) Start_i = 1; // Start SPI transaction
    
  end
//***********************************************

always_ff @(posedge Clk10) begin
    if (Rst_i) begin 
        trCnt <= 0;
    end
    else begin 
        if (Val_o) begin 
            trCnt <= trCnt + 1;
        end
    end
end

genvar i;
always_comb begin 
    if (Rst_i) begin 
        WidthSel_i = 2'd0;
    end
    else begin 
        if (trCnt > 152 && trCnt < 159) begin 
            WidthSel_i = 2'd3;
        end
        else begin 
            WidthSel_i = 2'd2;
        end
    end
end

always_comb begin 
    if (Rst_i) begin 
        modeSel = 0;
    end
    else begin 
        if (trCnt == 159) begin 
            modeSel = 1;
        end
    end
end

always_comb begin 
    if (Rst_i) begin 
        Stop_i = 6'd0;
    end
    else begin 
        if (trCnt == 158) begin 
            Stop_i = 6'h0;
        end
        else begin
            Stop_i = 6'd0;
        end
    end
end

always_ff @(posedge Clk10) begin 
    if (Rst_i) begin 
        randData<=0;
        randData32 <= 0;
    end
    else begin 
        randData <= pkt.randomize(data);
        randData32 <= pkt.randomize(data32);
    end
end

always_comb begin 
    if (Rst_i) begin 
        SPIdata = 0;
    end
    else begin 
        // if (!rstInit && locked) begin
            if (trCnt == 0) begin 
                SPIdata = InitLMX2594Header;
            end
            // else if (trCnt > 0 && trCnt < 114) begin 
            //     SPIdata = pkt.data;
            // end
            else if (trCnt == 114) begin 
                SPIdata = InitDDSHeader;
            end
            else if (trCnt == 152) begin 
                SPIdata = InitMAX2870Header;
            end
            else if (trCnt > 152 && trCnt < 159) begin 
                // if (trCnt % 2 == 0) begin 
                //     SPIdata = 32'haaaaaaaa;
                // end
                // else begin 
                //     SPIdata = 32'h55555555;
                // end
                SPIdata = 32'haaaaaaaa;
                // SPIdata = pkt.data32;
            end
            else if (trCnt == 159) begin 
                SPIdata = AllDevQSPIHeader;
            end
            else begin
                // if (trCnt % 2 == 0) begin 
                //     SPIdata = 24'haaaaaa;
                // end
                // else begin 
                //     SPIdata = 24'h555555;
                // end
                SPIdata = 24'haaaaaa;
                // SPIdata = pkt.data;
            end
        end
    end
// end

//***********************************************
//	           DUT INSTANTIATION
//***********************************************
    GSR GSR(.GSRI(1'b1));

   ExtSpiMEmul ExtSpiMEmul_inst (
        .Clk_i(Clk10), 
        .Rst_i(Rst_i || modeSel), 
        .Start_i(Start_i), 
        .ClockPhase_i(CPHA_i),
        .EmptyFlag_i(emptyFlagTx), 
        .SpiData_i(SPIdata),
        .SelSt_i(SELST_i),
        .WidthSel_i(WidthSel_i),
        .Lag_i(LAG_i),
        .Lead_i(LEAD_i),
        .EndianSel_i(EndianSel_i),
        .Stop_i(Stop_i),
        .PulsePol_i(PulsePol_i),
        .Mosi0_o(mosi0R),
        .Sck_o(SckR),
        .Ss_o(SsR),
        .Val_o(valR)
    );

    ExtQspiMEmul ExtQspiMEmul_inst (
        .Clk_i(Clk10),
        .Rst_i(Rst_i || !modeSel),
        .Start_i(Start_i),
        .ClockPhase_i(CPHA_i),
        .EmptyFlag_i(emptyFlagTx),
        .SpiData_i(SPIdata),
        .SelSt_i(SELST_i),
        .WidthSel_i(WidthSel_i),
        .Lag_i(LAG_i),
        .Lead_i(LEAD_i),
        .EndianSel_i(EndianSel_i),
        .Stop_i(Stop_i),
        .PulsePol_i(PulsePol_i),
        .Mosi0_o(mosi0Q),
        .Mosi1_o(Mosi1_o),
        .Mosi2_o(Mosi2_o),
        .Mosi3_o(Mosi3_o),
        .Sck_o(SckQ),
        .Ss_o(SsQ),
        .Val_o(valQ)
    );

    TopSbTmsg TopSbTmsg_inst (
        .Clk_i(Clk24),
        .Rst_i(rstForFPGA),
        .Sck_i(Sck_o),
        .Ss_i(Ss_o),
        .Mosi0_i(Mosi0_o),
        .Mosi1_io(Mosi1_o),
        .Mosi2_i(Mosi2_o),
        .Mosi3_i(Mosi3_o)
    );

    endmodule