Тестовый вариант

src/src/Top/TopSbTmsgTb.sv

@@ -123,7 +123,7 @@ localparam [23:0] InitDacHeader         = {1'h0, DeviceIdDac, DacWordInitNum, 1'
 localparam [23:0] InitAttHeader         = {1'h0, DeviceIdAtt, AttWordInitNum, 1'h1};
 localparam [23:0] InitShRegHeader       = {1'h0, DeviceIdShReg, ShRegWordInitNum, 1'h1};
 
-localparam [3:0]  LMXWordNum = 4'd4;
+localparam [3:0]  LMXWordNum = 4'd1;
 localparam [2:0]  DDSWordNum = 3'd4;
 localparam        POTWordNum = 2'd2;
 localparam        DACWordNum = 1'd1;
@@ -175,7 +175,7 @@ assign Mosi0_o = (modeSel) ? mosi0Q : mosi0R;
 assign Mosi1_io = (anyFlag) ? 1'bz : Mosi1_o;
 assign MisoLdLmx_i = 1'b1;
 
-assign emptyFlagTx = (trCnt > 61) ? 1'b1 : 1'b0;
+assign emptyFlagTx = (trCnt > 58) ? 1'b1 : 1'b0;
 assign QSPITotalWordNum = LMXWordNum + DDSWordNum + POTWordNum + DACWordNum + ATTWordNum + ShRegWordNum + MaxWordNum + GPIOWordNum; 
 
 assign currClk = (modeSel) ? Clk60 : Clk10;

src/src/WrapFifoChain/DDSWrapper.v

@@ -60,14 +60,42 @@ reg ssReg;
 reg ddsDirectFlagR;
 reg [2:0] ddsWordNumReg;
 reg [2:0] ddsWordNumRegSync;
+
+reg plsToggle;
+reg plsToggleSyncA;
+reg plsToggleSyncB;
 //================================================================================
 //	                                ASSIGNMENTS
 //================================================================================ 
 assign DdsWordNumReg_o = ddsWordNumReg;
+assign ddsWordNumValSync = plsToggleSyncB^plsToggleSyncA;
 //==========================================================================//
 //									CODING									//
 //==========================================================================//
 always @(posedge WrClk_i) begin
+	if (Rst_i) begin 
+		plsToggle <= 1'b0;
+	end
+	else if (DdsWordNumVal_i) begin 
+		plsToggle <= ~plsToggle;
+	end
+	else begin 
+		plsToggle <= plsToggle;
+	end
+end
+
+always @(posedge RdClk_i) begin 
+	if (Rst_i) begin 
+		plsToggleSyncA <= 1'b0;
+		plsToggleSyncB <= 1'b0;
+	end
+	else begin 
+		plsToggleSyncA <= plsToggle;
+		plsToggleSyncB <= plsToggleSyncA;
+	end
+end
+
+always @(posedge RdClk_i) begin
 	if (Rst_i) begin 
 		ssR <= 1'b0;
 	end
@@ -89,16 +117,16 @@ always @(posedge RdClk_i) begin
 	ssReg <= Ss_o;
 end
 
-always @(posedge WrClk_i) begin
+always @(posedge RdClk_i) begin
 	if (Rst_i) begin 
 		ddsWordNumReg <= 3'h0;
 	end
 	else begin 
-		if (DdsWordNumVal_i) begin 
+		if (ddsWordNumValSync) begin 
 			ddsWordNumReg <= DdsWordNum_i>>2;
 		end
 		else begin 
-			if (Ss_o && !ssR) begin 
+			if ((Ss_o && !ssR) && ddsWordNumReg != 0 ) begin 
 				ddsWordNumReg <= ddsWordNumReg-1;
 			end
 		end
@@ -122,11 +150,11 @@ always @(posedge RdClk_i) begin
 		if (ddsDirectFlagR && !DdsDirectFlag_i) begin 
 				DdsSyncFpga_o <= 1'b1;
 		end 
-		else if ((!Ss_o && ssReg) && (ddsWordNumRegSync != 0)) begin 
+		else if ((!Ss_o && ssReg) && (ddsWordNumReg != 0)) begin 
 			DdsSyncFpga_o <= 1'b0;
 		end
 		else begin 
-			if (ddsWordNumRegSync == 3'h1 && (Ss_o && !ssReg)) begin 
+			if (ddsWordNumReg == 3'h1 && (Ss_o && !ssReg)) begin 
 				DdsSyncFpga_o <= 1'b1;
 			end
 			else begin 

src/src/WrapFifoChain/LmxWrapper.v

@@ -62,6 +62,7 @@ reg ssReg;
 reg ssRegDds;
 reg [3:0] lmxWordNumReg; 
 reg [3:0] lmxWordNumRegR;
+reg [2:0] ddsWordNumRegSync;
 //==========================================================================//
 //									ASSIGNMENTS								//
 //==========================================================================//
@@ -135,16 +136,25 @@ always @(posedge RdClk_i) begin
 	end
 end
 
+always @(posedge RdClk_i) begin 
+	if (Rst_i) begin 
+		ddsWordNumRegSync <= 3'h0;
+	end
+	else begin 
+		ddsWordNumRegSync <= DdsWordNumReg_i;
+	end
+end
+
 always @(posedge RdClk_i) begin 
 	if (Rst_i) begin 
 		PllVtuneCtrl_o <=1'b0;
 	end
 	else begin
 		if (!LmxDirectFlag_i) begin  
-			if ((lmxWordNumReg == 0) && (DdsWordNumReg_i == 0) ) begin
+			if ((lmxWordNumReg == 0) && (ddsWordNumRegSync == 0) ) begin
 				PllVtuneCtrl_o <= 1'b1;
 			end
-			else if ((!DdsCs_i && ssRegDds) && (DdsWordNumReg_i != 0)) begin 
+			else if ((!DdsCs_i && ssRegDds) && (ddsWordNumRegSync != 0)) begin 
 				PllVtuneCtrl_o <= 1'b0;
 			end
 			else if ((!Ss_o && ssReg) && (lmxWordNumReg != 0) ) begin