Написан модуль GpioCtrl. Написана документация.

src/src/GpioCtrl/GpioCtrl.v

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+////////////////////////////////////////////////////////////////////////////////////////////
+// Company:			TAIR
+// Engineer:		Zaytsev Mikhail
+// 
+// Create Date:		24/04/2024 
+// Design Name: 
+// Module Name:		GpioCtrl 
+// Project Name:	SB_TMSG44V1_FPGA
+// Target Devices:	Board: SB_TMSG44v1. FPGA: GW1N-LV9PG256C6/I5
+// Tool versions:
+// Description:		The module saves data to the register by validity signal for GPIO devices.
+//
+// Dependencies:	
+// Revision: 
+// Revision 1.0 - File Created
+// Additional Comments: 
+//
+////////////////////////////////////////////////////////////////////////////////////////////
+module GpioCtrl (
+	input Clk_i,
+	input Rst_i,
+	
+	input ValGpioDataToFifo_i,
+	input [23:0] Data_i,
+
+	output reg [21:0] GpioReg_o
+);
+
+always @(posedge Clk_i) begin
+	if(Rst_i) begin
+		GpioReg_o <= 0;
+	end 
+	else if (ValGpioDataToFifo_i) begin
+		GpioReg_o <= Data_i[21:0];
+	end
+end
+
+endmodule

src/src/GpioCtrl/GpioCtrlTb.v

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+`timescale 1ns / 1ns
+
+module GpioCtrlTb();
+
+reg Clk;
+reg Rst;
+reg [4:0] cnt;
+reg [4:0] state;
+
+reg [23:0] DataGpio;
+reg ValData;
+
+always #5 Clk = ~Clk;
+
+initial begin
+	Clk	=	1'b1;
+	Rst = 	1'b1;
+	#100
+	Rst = 	1'b0;
+end
+
+always @(posedge Clk) begin
+	if(Rst) begin
+		DataGpio <= 0;
+		cnt <= 0;
+		state <= 0;
+		ValData <= 0;
+	end 
+	else begin
+		case (state)
+			0: begin
+				DataGpio <= 23'h3FFFFF;
+
+				if (cnt == 6) begin
+					cnt <= 0;
+					ValData <= 1;
+					state <= state + 1;
+				end
+				else begin
+					ValData = 0;
+					cnt <= cnt + 1;
+					state <= state;
+				end
+			end
+			1: begin
+				DataGpio <= 23'h311111;
+
+				if (cnt == 6) begin
+					cnt <= 0;
+					ValData <= 1;
+					state <= state + 1;
+				end
+				else begin
+					ValData = 0;
+					cnt <= cnt + 1;
+					state <= state;
+				end
+			end
+			2: begin
+				DataGpio <= 23'h3AAAAA;
+
+				if (cnt == 6) begin
+					cnt <= 0;
+					ValData <= 1;
+					state <= state + 1;
+				end
+				else begin
+					ValData = 0;
+					cnt <= cnt + 1;
+					state <= state;
+				end
+			end
+			3: begin
+				ValData = 0;
+			end
+		endcase
+	end
+end
+
+GpioCtrl DUT(
+	.Clk_i					(Clk),
+	.Rst_i					(Rst),
+
+	.ValGpioDataToFifo_i	(ValData),
+	.Data_i					(DataGpio),
+
+	.GpioReg_o				()
+);
+
+endmodule