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Anatoliy Chigirinskiy 1 年之前
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36812c60fd
共有 2 個文件被更改,包括 39 次插入6 次删除
  1. 11 6
      src/constr/SbTmsg.cst
  2. 28 0
      src/src/Top/TopSbTmsg.v

+ 11 - 6
src/constr/SbTmsg.cst

@@ -1,11 +1,10 @@
 //Copyright (C)2014-2024 Gowin Semiconductor Corporation.
 //All rights reserved. 
 //File Title: Physical Constraints file
-//Tool Version: V1.9.9.02
+//Tool Version: V1.9.9.03 (64-bit)
 //Part Number: GW1N-LV9PG256C6/I5
 //Device: GW1N-9
-//Device Version: C
-//Created Time: Thu 05 02 13:46:56 2024
+//Created Time: Tue 08 13 10:29:35 2024
 
 IO_LOC "DataMax2870MixRf2_o" C1;
 IO_PORT "DataMax2870MixRf2_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
@@ -49,6 +48,12 @@ IO_LOC "ClkLmx94_o" G2;
 IO_PORT "ClkLmx94_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
 IO_LOC "CsLmx94_o" F1;
 IO_PORT "CsLmx94_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
+IO_LOC "FpgaLed_o" L16;
+IO_PORT "FpgaLed_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
+IO_LOC "HrCtrlFpga_o" J16;
+IO_PORT "HrCtrlFpga_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
+IO_LOC "LrCtrlFpga_o" J15;
+IO_PORT "LrCtrlFpga_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
 IO_LOC "DdsSaw1Fpga_o" E1;
 IO_PORT "DdsSaw1Fpga_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
 IO_LOC "GpioAdRfV2_o" C16;
@@ -87,7 +92,7 @@ IO_LOC "DdsResetFpga_o" T5;
 IO_PORT "DdsResetFpga_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
 IO_LOC "DdsSyncCtrlFpga_o" T6;
 IO_PORT "DdsSyncCtrlFpga_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
-IO_LOC "CtrlAmSw3_o" J16;
+IO_LOC "CtrlAmSw3_o" K16;
 IO_PORT "CtrlAmSw3_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
 IO_LOC "RfSw2_o" H16;
 IO_PORT "RfSw2_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
@@ -96,9 +101,9 @@ IO_PORT "RfSw1_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
 IO_PORT "AnyFlag_o" IO_TYPE=LVCMOS33;
 IO_LOC "RfLd_o" R8;
 IO_PORT "RfLd_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
-IO_LOC "I2cScl_o" K16;
+IO_LOC "I2cScl_o" T8;
 IO_PORT "I2cScl_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
-IO_LOC "I2cSda_io" L16;
+IO_LOC "I2cSda_io" T7;
 IO_PORT "I2cSda_io" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
 IO_LOC "Mosi1_io" T12;
 IO_PORT "Mosi1_io" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;

+ 28 - 0
src/src/Top/TopSbTmsg.v

@@ -73,6 +73,13 @@ module TopSbTmsg
 	output GpioAdRfV2_o,
 	output DdsSaw1Fpga_o,
 
+	// RFAM Filt Ctrl 
+	output LrCtrlFpga_o,
+	output HrCtrlFpga_o,
+
+	// Succesfull firmware load LED
+	output reg FpgaLed_o,
+
 	//Output SPI devices
 	output reg CsLmx94_o,
 	output reg ClkLmx94_o,
@@ -195,6 +202,9 @@ localparam [11:0] FIRMWARE_VER	= 12'h1;
 
 	reg misoReg;
 
+	//Led
+	reg [31:0] ledCnt;
+
 	wire [23:0] servInfo;
 
 //================================================================================
@@ -230,8 +240,26 @@ assign AnyFlag_o = anyFlag;//Debug-only
 
 assign servInfo	= {BOARD_VER, FIRMWARE_VER};
 
+assign LrCtrlFpga_o = 1'b0;
+assign HrCtrlFpga_o = 1'b0;
+
 //================================================================================
 //  CODING
+always @(posedge Clk_i ) begin 
+	if (ledCnt == 24000000) begin 
+		ledCnt <= 0;
+	end
+	else begin 
+		ledCnt <= ledCnt + 1;
+	end
+end
+
+always @(posedge Clk_i ) begin 
+	if (ledCnt == 12000000) begin 
+		FpgaLed_o <= ~FpgaLed_o;
+	end
+end
+
 always @(*) begin 
 	if (Rst_i) begin 
 		misoReg = 1'b0;