В тестбенче в режиме 1Mosi добавлена прямая передача 8 бит. В InterfaceArbiter вернул отслеживание состояние IDLE. В top-файле добавлен счётчик для дебага. В PacketAnalyzer4Mosi исправлена ошибка - теперь учитывается terminateBit.

src/src/InterfaceArbiter/InterfaceArbiter.v

@@ -87,6 +87,8 @@ module InterfaceArbiter
 	
 	assign DataVal_o = dataValReg;
 	assign Data_o = (spiMode)? dataRegQSpi:dataRegSSpi;
+
+	//assign ssCntRstThresh = (spiMode) ? QSPIWORDWIDTH-1:SSPIWORDWIDTH-1;
 	
 //================================================================================
 //  CODING
@@ -153,18 +155,20 @@ module InterfaceArbiter
 		if (Rst_i) begin 
 			spiMode <= 1'b0;
 		end
-		else begin 
-			if (ssCnt == 1) begin 
-				if (captRegSspi[0]) begin 
-					spiMode <= 1'b1; 
-				end 
-				else begin 
-					spiMode <= 1'b0; 
+		else begin
+			if (currState == IDLE) begin
+				if (ssCnt == 1) begin 
+					if (captRegSspi[0]) begin 
+						spiMode <= 1'b1; 
+					end 
+					else begin 
+						spiMode <= 1'b0; 
+					end
 				end
 			end
 		end
-	end 
-	
+	end
+
 	always @(posedge Clk_i) begin
 		if (!Rst_i) begin
 			if (currState == IDLE) begin

src/src/PacketAnalyzer4Mosi/PacketAnalyzer4Mosi.v

@@ -120,7 +120,7 @@ always @(posedge Clk_i) begin
 	end
 	else if (ValDataFromSpi_i) begin
 		if ((dataSpiReg == 0) && (DataFromSpi_i[23] == 1'b1)) begin
-			dataSpiReg <= DataFromSpi_i[22:0];
+			dataSpiReg[22:1] <= DataFromSpi_i[22:1];
 		end
 		else begin
 			casez(selector)

src/src/Top/TopSbTmsg.v

@@ -180,6 +180,8 @@ module TopSbTmsg
 	wire maxMosiSpiM;
 
 	reg misoReg;
+	
+	reg [15:0] cntDebug;
 
 //================================================================================
 //  ASSIGNMENTS
@@ -215,6 +217,18 @@ assign AnyFlag_o = anyFlag;//Debug-only
 
 //================================================================================
 //  CODING
+
+//-----------------DEBUG_BEGIN-------------------
+always @(posedge gclk100) begin
+	if (Rst_i) begin
+		cntDebug <= 0;
+	end
+	else if (spiDataVal) begin
+		cntDebug <= cntDebug + 1;
+	end
+end
+//-----------------DEBUG_END---------------------
+
 always @(*) begin 
 	if (Rst_i) begin 
 		misoReg = 1'b0;

src/src/Top/TopSbTmsgTb.sv

@@ -141,7 +141,7 @@ assign Mosi0_o = (modeSel) ? mosi0Q : mosi0R;
 assign Mosi1_io = (anyFlag) ? 1'bz : Mosi1_o;
 assign MisoLdLmx_i = 1'b1;
 
-assign emptyFlagTx = (trCnt > 69) ? 1'b1 : 1'b0;
+assign emptyFlagTx = (trCnt > 94) ? 1'b1 : 1'b0;
 assign QSPITotalWordNum = LMXWordNum + DDSWordNum + POTWordNum + DACWordNum + ATTWordNum + ShRegWordNum + MaxWordNum + GPIOWordNum; 
 
 //***********************************************
@@ -184,7 +184,11 @@ initial begin
       #(300000-60) rstForFPGA = 1;
       #(CLK_PERIOD*74) rstForFPGA = 0;
       #(165000) Start_i = 1; // Start SPI transaction
-    
+      wait (trCnt == 70) begin 
+            Start_i = 0;
+        end
+        #(CLK_PERIOD*100) 
+        Start_i = 1; // Start SPI transaction
   end
 //***********************************************
 
@@ -215,8 +219,11 @@ always_comb begin
     if (Rst_i) begin 
         WidthSel_i = 2'd0;
     end
-    else begin 
-        if (trCnt > 36 && trCnt < 43) begin 
+    else begin
+        if (trCnt == 1 || trCnt == 3 ) begin 
+            WidthSel_i = 2'd0;
+        end 
+        else if (trCnt > 36 && trCnt < 43) begin 
             WidthSel_i = 2'd3;
         end
         else begin 
@@ -309,6 +316,9 @@ always_comb begin
             else if (trCnt == 45) begin 
                 SPIdata = AllDevQSPIHeader;
             end
+            else if (trCnt == 70) begin 
+                SPIdata = AllDevQSPIHeader;
+            end
             else begin
                 SPIdata = 24'haaaaaa;
             end