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@@ -72,7 +72,7 @@ module InterfaceArbiter
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reg [OUTWORDWIDTH/4-1:0] ssCnt;
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reg [16:0] wordsCnt;
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- wire [OUTWORDWIDTH/4-1:0] ssCntRstThresh = (spiMode) ? QSPIWORDWIDTH-1:SSPIWORDWIDTH-1;
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+ // wire [OUTWORDWIDTH/4-1:0] ssCntRstThresh = (spiMode) ? QSPIWORDWIDTH-1:SSPIWORDWIDTH-1;
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reg [16:0] wordsNum;
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@@ -118,13 +118,12 @@ module InterfaceArbiter
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ssCnt <= 0;
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end
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else begin
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- if (!Ss_i) begin
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- if (ssCnt == ssCntRstThresh) begin
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- ssCnt <= 0;
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- end
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- else begin
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+ if (currState == IDLE) begin
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+ if (!Ss_i) begin
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ssCnt <= ssCnt+1;
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end
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+ end else begin
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+ ssCnt <= 0;
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end
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end
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end
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@@ -156,14 +155,12 @@ module InterfaceArbiter
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spiMode <= 1'b0;
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end
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else begin
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- if (currState == IDLE) begin
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- if (ssCnt == 1) begin
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- if (captRegSspi[0]) begin
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- spiMode <= 1'b1;
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- end
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- else begin
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- spiMode <= 1'b0;
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- end
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+ if (ssCnt == 1) begin
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+ if (captRegSspi[0]) begin
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+ spiMode <= 1'b1;
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+ end
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+ else begin
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+ spiMode <= 1'b0;
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end
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end
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end
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