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@@ -129,6 +129,36 @@ localparam [1:0] ShRegWordNum = 2'd1;
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localparam [1:0] MaxWordNum = 2'd2;
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localparam [1:0] GPIOWordNum = 2'd1;
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+//***********************************************
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+// GPIO 1 REG
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+//***********************************************
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+localparam [0:0] RF_SW1 = 1'h0;
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+localparam [0:0] RF_SW2 = 1'h0;
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+localparam [0:0] CTRL_AM_SW3 = 1'h0;
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+localparam [0:0] DDS_SYNC_CTRL_FPGA = 1'h0;
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+localparam [0:0] DDS_RESET_FPGA = 1'h0;
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+localparam [0:0] DDS_SYNC_FPGA = 1'h0;
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+localparam [0:0] SW_CAP4 = 1'h0;
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+localparam [0:0] AM_ALC_SW = 1'h0;
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+localparam [0:0] SW_CAP3 = 1'h0;
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+localparam [0:0] SW_CAP2 = 1'h0;
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+localparam [0:0] SW_CAP1 = 1'h0;
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+localparam [0:0] AM_ALC_1_FIX = 1'h0;
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+localparam [0:0] PLL_VTUNE_CTRL = 1'h0;
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+localparam [0:0] PLL_SYNC_CTRL = 1'h0;
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+localparam [0:0] PLL_SYNC = 1'h0;
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+localparam [0:0] PLL_LOOP_CTRL = 1'h0;
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+localparam [0:0] DDS_X2_FPGA = 1'h0;
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+localparam [0:0] DDS_SAW2_FPGA = 1'h0;
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+localparam [0:0] REF_OFFSET_CTRL_FPGA = 1'h0;
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+localparam [0:0] GPIO_ADRF_V1 = 1'h0;
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+localparam [0:0] GPIO_ADRF_V2 = 1'h0;
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+localparam [0:0] DDS_SAW1_FPGA = 1'h0;
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+
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+localparam [23:0] GPIO_REG = {DDS_SAW1_FPGA,GPIO_ADRF_V2,GPIO_ADRF_V1,REF_OFFSET_CTRL_FPGA,DDS_SAW2_FPGA,DDS_X2_FPGA,PLL_LOOP_CTRL,PLL_SYNC,PLL_SYNC_CTRL,PLL_VTUNE_CTRL,AM_ALC_1_FIX,SW_CAP1,SW_CAP2,SW_CAP3,AM_ALC_SW,SW_CAP4,DDS_SYNC_FPGA,DDS_RESET_FPGA,DDS_SYNC_CTRL_FPGA,CTRL_AM_SW3,RF_SW2,RF_SW1};
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+
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+//***********************************************
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+
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// localparam [23:0] AllDevQSPIHeader = {1'h1, LMXWordNum, DDSWordNum, POTWordNum, DACWordNum,ATTWordNum, ShRegWordNum,MaxWordNum, GPIOWordNum, 7'h1};
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localparam [23:0] AllDevQSPIHeader = {1'h1, 1'h0,DDSWordNum,1'h0,GPIOWordNum, LMXWordNum,1'h0,MaxWordNum,1'h0,ShRegWordNum,1'h0,POTWordNum,DACWordNum,ATTWordNum,1'h1};
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