Добавлен бит FPGA_AM_CTRL. Исправлена отгрузка на сдвиговый регистр. Исправлен регистр R78 для LMX.

Devices/lmx2594regs.h

@@ -9,6 +9,9 @@
 #define     PLL_NUM_M                                   0x2B
 #define     OUTA_MUX                                    0x2D
 
+
+//R78
+#define     CAP_CTRL_START                              0x4E
 // R75
 #define     CHDIV                                       0x4B
 // R31
@@ -84,6 +87,12 @@
  *********************************************************************************/
 #define BITP_LMX2594_R75_CHDIV                          6
 #define BITM_LMX2594_R75_CHDIV                          (0x3F << BITP_LMX2594_R75_CHDIV)
+
+/**********************************************************************************
+ * 										R78
+ *********************************************************************************/
+#define BITP_LMX2594_R78_VCO_CAP_CTRL_START             1
+#define BITM_LMX2594_R78_VCO_CAP_CTRL_START             (0xFF<<BITP_LMX2594_R78_VCO_CAP_CTRL_START)
 /*********************************************************************************/
 
 /**********************************************************************************

Devices/tmsgheaders.c

@@ -50,21 +50,21 @@ void key_switch (void  *bar1, double freq, double lmx_freq) {
         *ptr_header = InitShRegHeader;
         // Data for Shift Reg
         uint32_t *ptr = bar1 + LMX_BASE_ADDR;
-        *ptr = 0x1<<SHIFT_REG_SW1_RF_BITP | 0x0 <<SHIFT_REG_SW2_RF_BITP | 0x1<<SHIFT_REG_SW_MIXER_RF | 0x1<<SHIFT_REG_GPIO_SW_015_RF_BITP  | 0x1 << SHIFT_REG_SW_RF_BITP;
+        *ptr = 0x1<<SHIFT_REG_SW1_RF_BITP | 0x0 <<SHIFT_REG_SW2_RF_BITP | 0x1<<SHIFT_REG_SW_MIXER_RF_BITP | 0x1<<SHIFT_REG_GPIO_SW_015_RF_BITP  | 0x1 << SHIFT_REG_SW_RF_BITP;
     }
     else if (freq > 3600e6 && freq <= 5500e6) {
         uint32_t *ptr_header = bar1 + LMX_BASE_ADDR;
         *ptr_header = InitShRegHeader;
         // Data for Shift Reg
         uint32_t *ptr = bar1 + LMX_BASE_ADDR;
-        *ptr = 0x0<<SHIFT_REG_SW1_RF_BITP | 0x1<<SHIFT_REG_SW_MIXER_RF | 0x1<<SHIFT_REG_GPIO_SW_015_RF_BITP  | 0x1 << SHIFT_REG_SW_RF_BITP;
+        *ptr = 0x0<<SHIFT_REG_SW1_RF_BITP | 0x1<<SHIFT_REG_SW_MIXER_RF_BITP | 0x1<<SHIFT_REG_GPIO_SW_015_RF_BITP  | 0x1 << SHIFT_REG_SW_RF_BITP;
     }
     else if (freq >5500e6 && freq <= 9000e6){
         uint32_t *ptr_header = bar1 + LMX_BASE_ADDR;
         *ptr_header = InitShRegHeader;
         // Data for Shift Reg
         uint32_t *ptr = bar1 + LMX_BASE_ADDR;
-        *ptr = 0x1<<SHIFT_REG_SW_MIXER_RF | 0x1<<SHIFT_REG_GPIO_SW_015_RF_BITP  | 0x0 << SHIFT_REG_SW_RF_BITP;
+        *ptr = 0x1<<SHIFT_REG_SW_MIXER_RF_BITP | 0x1<<SHIFT_REG_GPIO_SW_015_RF_BITP  | 0x0 << SHIFT_REG_SW_RF_BITP;
     }
 };
     

Devices/tmsgheaders.h

@@ -99,6 +99,7 @@
 #define GPIO_ADRF_V1                        0x2
 #define GPIO_ADRF_V2                        0x0
 #define DDS_SAW1_FPGA                       0x0
+#define FPGA_AM_CTRL                        0x0
 
 // Define values for Shift Reg
 #define SHIFT_REG_SW_RF                     0x0
@@ -125,7 +126,8 @@
                     (SHIFT_REG_SW1_RF <<5) | \
                     (SHIFT_REG_SW_MIXER_RF <<4))
 
-#define GPIO_REG ((DDS_SAW1_FPGA << 21) | \
+#define GPIO_REG  ((FPGA_AM_CTRL << 22) | \
+                  (DDS_SAW1_FPGA << 21) | \
                   (GPIO_ADRF_V2 << 20) | \
                   (GPIO_ADRF_V1 << 19) | \
                   (REF_OFFSET_CTRL_FPGA << 18) | \

main.c

@@ -15,6 +15,7 @@
 #include "Devices//max2870.h"
 #include "Devices//lmk04821.h"
 #include "Devices//ad9912.h"
+#include "Devices/pe43711.h"
 
 #include "command.h"
 
@@ -106,11 +107,12 @@ int main(int argc, char *argv[])
     usleep(500);
     lmk04821_b_init(bar1);
 	pe43711_att_1_init(bar1);
+	usleep(1);
 	pe43711_att_2_init(bar1);
     rst_for_fpga(bar1);
     shift_reg(bar1);
     ad9912_init(bar1);
-	max2870_init(bar1);
+	// // max2870_init(bar1);
     lmx2594_init(bar1);
 
 	// Установка обработчика сигналов