Тестирование режима QuadSpi для Lmx2594

Devices/lmx2594.c

@@ -557,7 +557,9 @@ int lmx_freq_set_main_band_int_mode(void *bar1, double freq, double f_pd) {
             lmx2594regs[112-FCAL_ADDR]
     };
     // Create a header for the LMX2594 with the appropriate number of words
-    uint32_t LMX_HEADER = ((0 << 23) | (DeviceIdLmx2594 << 18) | ((sizeof(lmx_change_freq_regs)/4) << 1) | 1);
+    // uint32_t LMX_HEADER = ((0 << 23) | (DeviceIdLmx2594 << 18) | ((sizeof(lmx_change_freq_regs)/4) << 1) | 1);
+     // Create a header for the LMX2594 with the appropriate number of words MOSI 4
+    uint32_t LMX_HEADER = ((ENUM_SPIMODE_4MOSI << 23) | ((sizeof(lmx_change_freq_regs) / 4) << BITP_LMX2594_4MOSI_HEADER) | 1);
     uint32_t *ptr = bar1 + LMX_BASE_ADDR;
     *ptr = LMX_HEADER;
     for (int i = 0; i < sizeof(lmx_change_freq_regs)/4; i++) {
@@ -1292,7 +1294,9 @@ int lmx_freq_set_out_of_band_int_mode(void *bar1, double freq, double f_pd) {
     };
 
     // Create a header for the LMX2594 with the appropriate number of words
-    uint32_t LMX_HEADER = ((0 << 23) | (DeviceIdLmx2594 << 18) | ((sizeof(lmx_change_freq_regs) / 4) << 1) | 1);
+    // uint32_t LMX_HEADER = ((0 << 23) | (DeviceIdLmx2594 << 18) | ((sizeof(lmx_change_freq_regs) / 4) << 1) | 1);
+    // Create a header for the LMX2594 with the appropriate number of words MOSI 4
+    uint32_t LMX_HEADER = ((ENUM_SPIMODE_4MOSI << 23) | ((sizeof(lmx_change_freq_regs) / 4) << BITP_LMX2594_4MOSI_HEADER) | 1);
     uint32_t *ptr = bar1 + LMX_BASE_ADDR;
     *ptr = LMX_HEADER;
     // Send the data
@@ -1328,6 +1332,9 @@ double lmx_lower_bond_set (double freq, double f_pd) {
 int lmx_freq_set(void *bar1, double freq,double f_pd) {
 
     // double f_pd = 175e6;
+    // Set the 4 Mosi mode
+    uint32_t *spi_mode = bar1 +RST_ADDR;
+    *spi_mode = SPI_MODE_4MOSI;
     double N_div = 0;
     if (freq < 10e6 || freq > 15e9) {
         printf("Frequency range is 10 MHz to 15 GHz\n");
@@ -1344,6 +1351,10 @@ int lmx_freq_set(void *bar1, double freq,double f_pd) {
     }
     // Switch the keys 
     key_switch(bar1, freq,lmx_freq);
+    usleep(1);
+    // Return the 1 MOSI mode
+    *spi_mode = SPI_MODE_1MOSI;
+    
     return 0;
 }
 

Devices/tmsgheaders.h

@@ -65,6 +65,47 @@
 #define InitAttHeader      ((0 << 23) | (DeviceIdAtt << 18) | (AttWordInitNum << 1) | 1)
 #define InitShRegHeader    ((0 << 23) | (DeviceIdShReg << 18) | (ShRegWordInitNum << 1) | 1)
 
+// Headers 4-Mosi
+#define BITP_LMX2594_4MOSI_HEADER  12
+//Bit mask [15:12]
+#define BITM_LMX2594_4MOSI_HEADER  (0xF << BITP_LMX2594_4MOSI_HEADER)
+
+#define BITP_DDS_4MOSI_HEADER      19
+//Bit mask [21:19]
+#define BITM_DDS_4MOSI_HEADER      (0x7 << BITP_DDS_4MOSI_HEADER)
+
+// MAX2870
+#define BITP_MAX2870_4MOSI_HEADER  9
+//Bit mask [10:9]
+#define BITM_MAX2870_4MOSI_HEADER  (0x3 << BITP_MAX2870_4MOSI_HEADER)
+//Shift Reg 
+#define BITP_SHIFT_REG_4MOSI_HEADER  6
+//Bit mask [7:6]
+#define BITM_SHIFT_REG_4MOSI_HEADER  (0x3 << BITP_SHIFT_REG_4MOSI_HEADER)
+// GPIO
+#define BITP_GPIO_4MOSI_HEADER       16
+//Bit mask [17:16]
+#define BITM_GPIO_4MOSI_HEADER       (0x3 << BITP_GPIO_4MOSI_HEADER)
+// POT
+#define BITP_POT_4MOSI_HEADER        3
+//Bit mask [4:3]
+#define BITM_POT_4MOSI_HEADER        (0x3 << BITP_POT_4MOSI_HEADER)
+// DAC
+#define BITP_DAC_4MOSI_HEADER        2
+//Bit mask [2:2]
+#define BITM_DAC_4MOSI_HEADER        (0x1 << BITP_DAC_4MOSI_HEADER)
+// ATT
+#define BITP_ATT_4MOSI_HEADER        1
+//Bit mask [1:1]
+#define BITM_ATT_4MOSI_HEADER        (0x1 << BITP_ATT_4MOSI_HEADER)
+// SpiMode
+#define BITP_SPIMODE_4MOSI_HEADER    23
+//Bit mask [23:23]
+#define BITM_SPIMODE_4MOSI_HEADER    (0x1 << BITP_SPIMODE_4MOSI_HEADER)
+// SpiMode 1MOSI
+#define ENUM_SPIMODE_1MOSI          (0x0 << BITP_SPIMODE_4MOSI_HEADER)
+// SpiMode 4MOSI
+#define ENUM_SPIMODE_4MOSI          (0x1 << BITP_SPIMODE_4MOSI_HEADER)
 
 // Word Numbers 4-MOSI
 #define LMXWordNum              14
@@ -160,11 +201,14 @@
 #define    TMSG_RST_CMD_REG_BITP        0
 #define    CURR_WIDTH_CMD_REG_BITP      1
 #define    MOD_CMD_REG_BITP             2
+#define    TMSG_CMD_REG_SPI_MODE_BITP   5
 
 #define    CURR_WIDTH_24_BIT            (0x0 << CURR_WIDTH_CMD_REG_BITP)
 #define    CURR_WIDTH_32_BIT            (0x1 << CURR_WIDTH_CMD_REG_BITP)
 #define    MOD_0                        (0x0 << MOD_CMD_REG_BITP)
 #define    MOD_1                        (0x1 << MOD_CMD_REG_BITP)
+#define    SPI_MODE_1MOSI               (0x0 << TMSG_CMD_REG_SPI_MODE_BITP)
+#define    SPI_MODE_4MOSI               (0x1 << TMSG_CMD_REG_SPI_MODE_BITP)
 
 
 #define     LMX_BASE_ADDR       0x04