Тестирование одновременной перестройки AD9912 и LMX2594

Devices/ad9912.c

@@ -59,9 +59,13 @@ void ad9912_init(void *bar1) {
 }
 /*----------------------------------------------------------------------*/
 
-double ad9912_set_main_band(double freq, int lmx_n) {
-    double f_pd = freq/lmx_n;
-
+double ad9912_set_main_band(double freq, int lmx_n, double f_pd) {
+    // Divide the frequncy by the old value of the phase detector frequency and only left with the integer part
+    uint32_t N = (uint32_t) (freq/f_pd);
+    printf("N = %d\n", N);
+    // Calculate the new phase detector frequency by dividing the frequency by the new value of N
+    f_pd = freq/N; // Phase detector frequency
+    printf("f_pd = %f\n", f_pd);
     return f_pd;
 }
 
@@ -142,16 +146,20 @@ double ad9912_set_out_of_band(double freq,int lmx_n) {
     }
 }
 
-    f_pd = f_vco/lmx_n;
+       // Divide the frequncy by the old value of the phase detector frequency and only left with the integer part
+    uint32_t N = (uint32_t) (f_vco/f_pd);
+    printf("N = %d\n", N);
+    // Calculate the new phase detector frequency by dividing the frequency by the new value of N
+    f_pd = f_vco/N; // Phase detector frequency
+    printf("f_pd = %f\n", f_pd);
 
     return f_pd;
 
 
-double ad9912_set(void *bar1, double freq) {
+double ad9912_set(void *bar1, double freq, double f_pd) {
     double fs = 1e9;
     int lmx_n = 50;
 
-    double f_pd;
     if (freq >= 7500e6 && freq <= 15000e6) {
         f_pd = ad9912_set_main_band(freq, fs, lmx_n);
     }

Devices/lmx2594.c

@@ -82,7 +82,7 @@ uint32_t lmx2594regs[LMX_COUNT] = {
         0x280000,
         0x2703E8,
         0x260000,
-        0x250304,
+        0x250204,
         0x240032,
         0x230004,
         0x220000,
@@ -357,6 +357,165 @@ int lmx_freq_set_main_band(void *bar1, double freq, double f_pd) {
     printf("frac_d = %u\n", frac_d);
 }
 
+int lmx_freq_set_main_band_int_mode(void *bar1, double freq, double f_pd) {
+
+    uint32_t N_div;
+    N_div = freq / f_pd;
+
+    int vco_core;
+    double f_coremin;
+    double f_coremax;
+    int c_core_min;
+    int c_core_max;
+    int a_core_min;
+    int a_core_max;
+    uint16_t vco_cap_ctrl_strt;
+    uint16_t vco_daciset_strt;
+
+    // Partial assist for the calibration
+
+    //Determine a VCO core and other parameters
+
+    if (freq >= 7500e6 && freq <= 8600e6) {
+        vco_core = 1;
+        f_coremin = 7500e6;
+        f_coremax = 8600e6;
+        c_core_min = 164;
+        c_core_max = 12;
+        a_core_min = 299;
+        a_core_max = 240;
+    }
+    else if (freq > 8600e6 && freq < 9800e6) {
+        vco_core = 2;
+        f_coremin = 8600e6;
+        f_coremax = 9800e6;
+        c_core_min = 165;
+        c_core_max = 16;
+        a_core_min = 356;
+        a_core_max = 247;
+    }
+    else if (freq >= 9800e6 && freq <= 10800e6) {
+        vco_core = 3;
+        f_coremin = 9800e6;
+        f_coremax = 10800e6;
+        c_core_min = 158;
+        c_core_max = 19;
+        a_core_min = 324;
+        a_core_max = 224;
+    }
+    else if (freq > 10800e6 && freq <= 12000e6) {
+        vco_core = 4;
+        f_coremin = 10800e6;
+        f_coremax = 12000e6;
+        c_core_min = 140;
+        c_core_max = 0;
+        a_core_min = 383;
+        a_core_max = 244;
+    }
+    else if (freq > 12000e6 && freq <= 12900e6) {
+        vco_core = 5;
+        f_coremin = 12000e6;
+        f_coremax = 12900e6;
+        c_core_min = 183;
+        c_core_max = 36;
+        a_core_min = 205;
+        a_core_max = 146;
+    }
+    else if (freq > 12900e6 && freq <= 13900e6) {
+        vco_core = 6;
+        f_coremin = 12900e6;
+        f_coremax = 13900e6;
+        c_core_min = 155;
+        c_core_max = 6;
+        a_core_min = 242;
+        a_core_max = 163;
+    }
+    else if (freq > 13900e6 && freq <= 15000e6) {
+        vco_core = 7;
+        f_coremin = 13900e6;
+        f_coremax = 15000e6;
+        c_core_min = 175;
+        c_core_max = 19;
+        a_core_min = 323;
+        a_core_max = 244;
+    };
+    if (freq >=11900e6 && freq <=12100e6) {
+        vco_daciset_strt = 300;
+        vco_core = 4;
+        vco_cap_ctrl_strt = 1;
+    }
+    vco_cap_ctrl_strt = round(c_core_min - (c_core_min - c_core_max) * (freq - f_coremin) / (f_coremax - f_coremin));
+    vco_daciset_strt = round(a_core_min + (a_core_min - a_core_max) * (freq - f_coremin) / (f_coremax - f_coremin));
+    
+    printf("VCO_CORE = %d\n", vco_core);
+    printf("VCO_CAP_CTRL_STR = %d\n", vco_cap_ctrl_strt);
+    printf("VCO_DACISET_STR = %d\n", vco_daciset_strt);
+
+    //Set the VCO_CORE 
+    lmx2594regs[112 - VCO_SEL] = lmx2594regs[112 - VCO_SEL] & (~BITM_LMX2594_R20_VCO_SEL);
+    lmx2594regs[112 - VCO_SEL] = lmx2594regs[112 - VCO_SEL] | (vco_core << BITP_LMX2594_R20_VCO_SEL);
+    // Set the VCO_CAP_CTRL
+    lmx2594regs[112 - CAP_CTRL_START] = lmx2594regs[112 - CAP_CTRL_START] & (~BITM_LMX2594_R78_VCO_CAP_CTRL_START);
+    lmx2594regs[112 - CAP_CTRL_START] = lmx2594regs[112 - CAP_CTRL_START] | (vco_cap_ctrl_strt << BITP_LMX2594_R78_VCO_CAP_CTRL_START);
+    // Set the VCO_DACISET
+    lmx2594regs[112 - VCO_DACISET] = lmx2594regs[112 - VCO_DACISET] & (~BITM_LMX2594_R17_VCO_DACISET);
+    lmx2594regs[112 - VCO_DACISET] = lmx2594regs[112 - VCO_DACISET] | (vco_daciset_strt << BITP_LMX2594_R17_VCO_DACISET);
+
+    // Set the PF_DLY_SEL
+    if (freq <= 12500e6) {
+        lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
+        lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] | (0x1 << BITP_LMX2594_R37_PFD_DLY_SEL);
+        printf("PFD_DLY_SEL = %d\n", 1);
+    }
+    else if (freq > 12500e6) {
+        lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
+        lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] | (0x2 << BITP_LMX2594_R37_PFD_DLY_SEL);
+        printf("PFD_DLY_SEL = %d\n", 2);
+    }
+    // SET the N_DIV
+      lmx2594regs[112-PLL_N_S] = lmx2594regs[112-PLL_N_S] &(~0xFFFF);
+    lmx2594regs[112-PLL_N_S] = lmx2594regs[112-PLL_N_S] | (N_div >> 16);
+    //CLear the lower 16 bits of the register
+    lmx2594regs[112-PLL_N_M] = lmx2594regs[112-PLL_N_M] & (~0xFFFF);
+    // Next 16 bits of the register
+    lmx2594regs[112-PLL_N_M] = lmx2594regs[112-PLL_N_M] | (N_div & 0xFFFF);
+    // Set the OUTA_MUX to channel divider R45[12:11]; 0 - Channel divider, 1 - VCO;
+    lmx2594regs[112 - OUTA_MUX] = lmx2594regs[112 - OUTA_MUX] & (~BITM_LMX2594_R45_OUTA_MUX);
+    lmx2594regs[112 - OUTA_MUX] = lmx2594regs[112 - OUTA_MUX] | ENUM_LMX2594_R45_OUTA_MUX_VCO;
+       // Program the FCAL_EN bit
+    lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] & (~BITM_LMX2594_R0_FCAL);   
+    lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] | (LMX2594_R0_FCAL_EN);
+
+    uint32_t lmx_change_freq_regs[] = {
+            lmx2594regs[112 - VCO_SEL],
+            lmx2594regs[112 - CAP_CTRL_START],
+            lmx2594regs[112 - VCO_DACISET],
+            lmx2594regs[112-PFD_DLY_SEL],
+            lmx2594regs[112-PLL_N_S],
+            lmx2594regs[112-PLL_N_M],
+            lmx2594regs[112 - OUTA_MUX],
+            lmx2594regs[112-FCAL_ADDR]
+    };
+    // Create a header for the LMX2594 with the appropriate number of words
+    uint32_t LMX_HEADER = ((0 << 23) | (DeviceIdLmx2594 << 18) | ((sizeof(lmx_change_freq_regs)/4) << 1) | 1);
+    uint32_t *ptr = bar1 + LMX_BASE_ADDR;
+    *ptr = LMX_HEADER;
+    for (int i = 0; i < sizeof(lmx_change_freq_regs)/4; i++) {
+        uint32_t *data_ptr = bar1 + LMX_BASE_ADDR;
+        *data_ptr = lmx_change_freq_regs[i];
+    }
+    char filename[100];
+    sprintf(filename, "%f.txt", freq);
+    FILE * f = fopen(filename, "w");
+    for (int i = 0; i < sizeof(lmx2594regs) / 4; i++) {
+        fprintf(f, "0x%08X\n", lmx2594regs[i]);
+    }
+    fclose(f);
+
+    return 0;
+
+}
+
 int lmx_freq_set_out_of_band(void *bar1, double freq, double f_pd) {
 
     if (freq >= 10e6 && freq <= 1000e6) {
@@ -715,6 +874,324 @@ int lmx_freq_set_out_of_band(void *bar1, double freq, double f_pd) {
     return 0;
 }
 
+int lmx_freq_set_out_of_band_int_mode(void *bar1, double freq, double f_pd) {
+
+    if (freq >= 10e6 && freq <= 1000e6) {
+        lmx_freq = lmx_lower_bond_set(freq, f_pd);
+    }
+    else {
+        lmx_freq = freq;
+    }
+
+    double f_vco = 2 * lmx_freq;
+    int chan_div = 2;
+    uint8_t ch_div_reg = 0; // 2
+    double vco_div = 7.5e9 / lmx_freq;
+
+    int vco_core;
+    double f_coremin;
+    double f_coremax;
+    int c_core_min;
+    int c_core_max;
+    int a_core_min;
+    int a_core_max;
+    uint16_t vco_cap_ctrl_strt;
+    uint16_t vco_daciset_strt;
+
+    // minimum N_div value is 28 and Vco frequency can't be less than 7.5 GHz
+    if (f_vco < 7.5e9) {
+        if (vco_div > 2 && vco_div <= 4)
+            chan_div = 4;  // 4
+        f_vco = lmx_freq * chan_div;
+        if (vco_div > 4 && vco_div <= 6) {
+            chan_div = 6;  // 6
+            f_vco = lmx_freq * chan_div;
+        }
+        if (vco_div > 6 && vco_div <= 8) {
+            chan_div = 8;  // 8
+            f_vco = lmx_freq * chan_div;
+        }
+        if (vco_div > 8 && vco_div <= 12) {
+            chan_div = 12;  // 12
+            f_vco = lmx_freq * chan_div;
+        }
+        if (vco_div > 12 && vco_div <= 16) {
+            chan_div = 16;  // 16
+            f_vco = lmx_freq * chan_div;
+        }
+        if (vco_div > 16 && vco_div <= 24) {
+            chan_div = 24;  // 24
+            f_vco = lmx_freq * chan_div;
+        }
+        if (vco_div > 24 && vco_div <= 32) {
+            chan_div = 32;  // 32
+            f_vco = lmx_freq * chan_div;
+        }
+        if (vco_div > 32 && vco_div <= 48) {
+            chan_div = 48;  // 48
+            f_vco = lmx_freq * chan_div;
+        }
+        if (vco_div > 48 && vco_div <= 64) {
+            chan_div = 64;  // 64
+            f_vco = lmx_freq * chan_div;
+        }
+        if (vco_div > 64 && vco_div <= 72) {
+            chan_div = 72;  // 72
+            f_vco = lmx_freq * chan_div;
+        }
+        if (vco_div > 72 && vco_div <= 96) {
+            chan_div = 96;  // 96
+            f_vco = lmx_freq * chan_div;
+        }
+        if (vco_div > 96 && vco_div <= 128) {
+            chan_div = 128;  // 128
+            f_vco = lmx_freq * chan_div;
+        }
+        if (vco_div > 128 && vco_div <= 192) {
+            chan_div = 192;  // 192
+            f_vco = lmx_freq * chan_div;
+        }
+        if (vco_div > 192 && vco_div <= 256) {
+            chan_div = 256;  // 256
+            f_vco = lmx_freq * chan_div;
+        }
+        if (vco_div > 256 && vco_div <= 384) {
+            chan_div = 384;  // 384
+            f_vco = lmx_freq * chan_div;
+        }
+        if (vco_div > 384 && vco_div <= 512) {
+            chan_div = 512;  // 512
+            f_vco = lmx_freq * chan_div;
+        }
+        if (vco_div > 512 && vco_div <= 768) {
+            chan_div = 768;  // 768
+            f_vco = lmx_freq * chan_div;
+        }
+        switch (chan_div) {
+            case 2:
+                ch_div_reg = 0;
+                break;
+            case 4:
+                ch_div_reg = 1;
+                break;
+            case 6:
+                ch_div_reg = 2;
+                break;
+            case 8:
+                ch_div_reg = 3;
+                break;
+            case 12:
+                ch_div_reg = 4;
+                break;
+            case 16:
+                ch_div_reg = 5;
+                break;
+            case 24:
+                ch_div_reg = 6;
+                break;
+            case 32:
+                ch_div_reg = 7;
+                break;
+            case 48:
+                ch_div_reg = 8;
+                break;
+            case 64:
+                ch_div_reg = 9;
+                break;
+            case 72:
+                ch_div_reg = 10;
+                break;
+            case 96:
+                ch_div_reg = 11;
+                break;
+            case 128:
+                ch_div_reg = 12;
+                break;
+            case 192:
+                ch_div_reg = 13;
+                break;
+            case 256:
+                ch_div_reg = 14;
+                break;
+            case 384:
+                ch_div_reg = 15;
+                break;
+            case 512:
+                ch_div_reg = 16;
+                break;
+            case 768:
+                ch_div_reg = 17;
+                break;
+        }
+    } else {
+        ch_div_reg = 0;
+        f_vco = lmx_freq * 2;
+    }
+    uint32_t N_div = f_vco / f_pd;
+
+    // Partial assist for the calibration
+
+    //Determine a VCO core and other parameters
+
+    if (f_vco >= 7500e6 && f_vco <= 8600e6) {
+        vco_core = 1;
+        f_coremin = 7500e6;
+        f_coremax = 8600e6;
+        c_core_min = 164;
+        c_core_max = 12;
+        a_core_min = 299;
+        a_core_max = 240;
+    }
+    else if (f_vco > 8600e6 && f_vco < 9800e6) {
+        vco_core = 2;
+        f_coremin = 8600e6;
+        f_coremax = 9800e6;
+        c_core_min = 165;
+        c_core_max = 16;
+        a_core_min = 356;
+        a_core_max = 247;
+    }
+    else if (f_vco >= 9800e6 && f_vco <= 10800e6) {
+        vco_core = 3;
+        f_coremin = 9800e6;
+        f_coremax = 10800e6;
+        c_core_min = 158;
+        c_core_max = 19;
+        a_core_min = 324;
+        a_core_max = 224;
+    }
+    else if (f_vco > 10800e6 && f_vco <= 12000e6) {
+        vco_core = 4;
+        f_coremin = 10800e6;
+        f_coremax = 12000e6;
+        c_core_min = 140;
+        c_core_max = 0;
+        a_core_min = 383;
+        a_core_max = 244;
+    }
+    else if (f_vco > 12000e6 && f_vco <= 12900e6) {
+        vco_core = 5;
+        f_coremin = 12000e6;
+        f_coremax = 12900e6;
+        c_core_min = 183;
+        c_core_max = 36;
+        a_core_min = 205;
+        a_core_max = 146;
+    }
+    else if (f_vco > 12900e6 && f_vco <= 13900e6) {
+        vco_core = 6;
+        f_coremin = 12900e6;
+        f_coremax = 13900e6;
+        c_core_min = 155;
+        c_core_max = 6;
+        a_core_min = 242;
+        a_core_max = 163;
+    }
+    else if (f_vco > 13900e6 && f_vco <= 15000e6) {
+        vco_core = 7;
+        f_coremin = 13900e6;
+        f_coremax = 15000e6;
+        c_core_min = 175;
+        c_core_max = 19;
+        a_core_min = 323;
+        a_core_max = 244;
+    };
+
+    vco_cap_ctrl_strt = round(c_core_min - (c_core_min - c_core_max) * (f_vco - f_coremin) / (f_coremax - f_coremin));
+    vco_daciset_strt = round(a_core_min + (a_core_min - a_core_max) * (f_vco - f_coremin) / (f_coremax - f_coremin));
+   
+    if (f_vco >=11900e6 && f_vco <=12100e6) {
+        vco_daciset_strt = 300;
+        vco_core = 4;
+        vco_cap_ctrl_strt = 1;
+    }
+     printf("VCO_CORE = %d\n", vco_core);
+     printf("VCO_CAP_CTRL_STR = %d\n", vco_cap_ctrl_strt);
+     printf("VCO_DACISET_STR = %d\n", vco_daciset_strt);
+
+    // Calibration assist 
+    //Set the VCO_CORE 
+    lmx2594regs[112 - VCO_SEL] = lmx2594regs[112 - VCO_SEL] & (~BITM_LMX2594_R20_VCO_SEL);
+    lmx2594regs[112 - VCO_SEL] = lmx2594regs[112 - VCO_SEL] | (vco_core << BITP_LMX2594_R20_VCO_SEL);
+    // Set the VCO_CAP_CTRL_START
+    lmx2594regs[112 - CAP_CTRL_START] = lmx2594regs[112 - CAP_CTRL_START] & (~BITM_LMX2594_R78_VCO_CAP_CTRL_START);
+    lmx2594regs[112 - CAP_CTRL_START] = lmx2594regs[112 - CAP_CTRL_START] | (vco_cap_ctrl_strt << BITP_LMX2594_R78_VCO_CAP_CTRL_START);
+    // Set the VCO_DACISET
+    lmx2594regs[112 - VCO_DACISET] = lmx2594regs[112 - VCO_DACISET] & (~BITM_LMX2594_R17_VCO_DACISET);
+    lmx2594regs[112 - VCO_DACISET] = lmx2594regs[112 - VCO_DACISET] | (vco_daciset_strt << BITP_LMX2594_R17_VCO_DACISET);
+
+    // Set the PFD_DLY_SEL to appropriate value
+    if (freq <= 12500e6) {
+        lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
+        lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] | (0x1 << BITP_LMX2594_R37_PFD_DLY_SEL);
+        printf("PFD_DLY_SEL = %d\n", 1);
+    }
+    else if (freq > 12500e6) {
+        lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
+        lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] | (0x2 << BITP_LMX2594_R37_PFD_DLY_SEL);
+        printf("PFD_DLY_SEL = %d\n", 2);
+    }
+    // Set the N value
+    lmx2594regs[112 - PLL_N_S] = lmx2594regs[112 - PLL_N_S] & (~0xFFFF);
+    lmx2594regs[112 - PLL_N_S] = lmx2594regs[112 - PLL_N_S] | (N_div >> 16);
+    // Clear the lower 16 bits of the register
+    lmx2594regs[112 - PLL_N_M] = lmx2594regs[112 - PLL_N_M] & (~0xFFFF);
+    lmx2594regs[112 - PLL_N_M] = lmx2594regs[112 - PLL_N_M] | (N_div & 0xFFFF);
+     // Program the CHDIV value
+    lmx2594regs[112 - CHDIV] = lmx2594regs[112 - CHDIV] & (~BITM_LMX2594_R75_CHDIV);
+    // Set the CHDIV value with the starting position BITP_LMX2594_R75_CHDIV
+    lmx2594regs[112 - CHDIV] = lmx2594regs[112 - CHDIV] | (ch_div_reg << BITP_LMX2594_R75_CHDIV);
+    // If the ch_div > 2 then set the SEG1_EN bit
+    if (chan_div > 2) {
+        lmx2594regs[112 - CHDIV_DIV2] = lmx2594regs[112 - CHDIV_DIV2] & (~BITM_LMX2594_R31_CHDIV_DIV2);
+        lmx2594regs[112 - CHDIV_DIV2] = lmx2594regs[112 - CHDIV_DIV2] | (ENUM_LMX2594_R31_CHDIV_DIV2_EN);
+    }
+    else {
+        lmx2594regs[112-CHDIV_DIV2] =  lmx2594regs[112 - CHDIV_DIV2] & (~BITM_LMX2594_R31_CHDIV_DIV2);
+    }
+    // Set the OUTA_MUX to channel divider R45[12:11]; 0 - Channel divider, 1 - VCO;
+    lmx2594regs[112 - OUTA_MUX] = lmx2594regs[112 - OUTA_MUX] & (~BITM_LMX2594_R45_OUTA_MUX);
+    lmx2594regs[112 - OUTA_MUX] = lmx2594regs[112 - OUTA_MUX] | ENUM_LMX2594_R45_OUTA_MUX_CH_DIV;
+
+    // Program the FCAL_EN bit
+    lmx2594regs[112 - FCAL_ADDR] = lmx2594regs[112 - FCAL_ADDR] & (~LMX2594_R0_FCAL_EN);
+    lmx2594regs[112 - FCAL_ADDR] = lmx2594regs[112 - FCAL_ADDR] | (LMX2594_R0_FCAL_EN);
+
+    uint32_t lmx_change_freq_regs []={
+        lmx2594regs[112-CPG_REG] = (lmx2594regs[112-CPG_REG] & (~BITM_LMX2594_R14_CPG)) | ENUM_LMX2594_R14_CPG_TRISTATE,
+        lmx2594regs[112 - VCO_SEL],
+        lmx2594regs[112 - CAP_CTRL_START],
+        lmx2594regs[112 - VCO_DACISET],
+        lmx2594regs[112-PFD_DLY_SEL],
+        lmx2594regs[112 - PLL_N_S],
+        lmx2594regs[112 - PLL_N_M],
+        lmx2594regs[112 - CHDIV],
+        lmx2594regs[112 - CHDIV_DIV2],
+        lmx2594regs[112 - OUTA_MUX],
+        lmx2594regs[112-CPG_REG] = (lmx2594regs[112-CPG_REG] & (~BITM_LMX2594_R14_CPG)) | ENUM_LMX2594_R14_CPG_15ma,
+        lmx2594regs[112 - FCAL_ADDR]
+    };
+
+    // Create a header for the LMX2594 with the appropriate number of words
+    uint32_t LMX_HEADER = ((0 << 23) | (DeviceIdLmx2594 << 18) | ((sizeof(lmx_change_freq_regs) / 4) << 1) | 1);
+    uint32_t *ptr = bar1 + LMX_BASE_ADDR;
+    *ptr = LMX_HEADER;
+    // Send the data
+    for (int i = 0; i < sizeof(lmx_change_freq_regs) / 4; i++) {
+        uint32_t *data_ptr = bar1 + LMX_BASE_ADDR;
+        *data_ptr = lmx_change_freq_regs[i];
+    }
+    char filename[100];
+    sprintf(filename, "%f.txt", freq);
+    FILE * f = fopen(filename, "w");
+    for (int i = 0; i < sizeof(lmx2594regs) / 4; i++) {
+        fprintf(f, "0x%08X\n", lmx2594regs[i]);
+    }
+    fclose(f);
+    return 0;
+}
+
+
 double lmx_lower_bond_set (double freq, double f_pd) {
     double f_max2870 = 4e9;
 
@@ -723,9 +1200,10 @@ double lmx_lower_bond_set (double freq, double f_pd) {
     return lmx_req_freq;
 }
 
-int lmx_freq_set(void *bar1, double freq) {
 
-    double f_pd = 175e6;
+int lmx_freq_set(void *bar1, double freq,double f_pd) {
+
+    // double f_pd = 175e6;
     double N_div = 0;
     if (freq < 10e6 || freq > 15e9) {
         printf("Frequency range is 10 MHz to 15 GHz\n");
@@ -733,10 +1211,12 @@ int lmx_freq_set(void *bar1, double freq) {
     }
     // if the frequency is in the main band - 7.5 GHz to 15 GHz
     if (freq >= 7.5e9 && freq <= 15e9) {
-        lmx_freq_set_main_band(bar1, freq, f_pd);
+        // lmx_freq_set_main_band(bar1, freq, f_pd);
+        lmx_freq_set_main_band_int_mode(bar1, freq, f_pd);
     }
     else if (freq < 7.5e9) {
-        lmx_freq_set_out_of_band(bar1, freq, f_pd);
+        // lmx_freq_set_out_of_band(bar1, freq, f_pd);
+        lmx_freq_set_out_of_band_int_mode(bar1, freq, f_pd);
     }
     // Switch the keys 
     key_switch(bar1, freq,lmx_freq);

Devices/lmx2594.h

@@ -10,9 +10,12 @@
 void lmx2594_init(void *bar1);
 
 int lmx_freq_set_main_band(void *bar1, double freq, double f_pd);
+int lmx_freq_set_main_band_int_mode(void *bar1, double freq, double f_pd);
 int lmx_freq_set_out_of_band(void *bar1, double freq, double f_pd);
+int lmx_freq_set_out_of_band_int_mode(void *bar1, double freq, double f_pd);
+
 double lmx_lower_bond_set (double freq, double f_pd);
-int lmx_freq_set(void *bar1, double freq);
+int lmx_freq_set(void *bar1, double freq,double f_pd);
 uint32_t lmx_ld_status(void *bar1);
 
 #endif //DMADRIVER_LMX2594_H

Devices/lmx2594regs.h

@@ -130,6 +130,7 @@
 #define ENUM_LMX2594_R0_FCAL_LPFD_AD_LESS_2_5_MHZ       (0x03 << BITP_LMX2594_R0_FCAL_LPFD_ADJ)
 
 #define BITP_LMX2594_R0_FCAL                            3
+#define BITM_LMX2594_R0_FCAL                         (0x01 << BITP_LMX2594_R0_FCAL)
 #define LMX2594_R0_FCAL_EN                              (0x01 << BITP_LMX2594_R0_FCAL)
 /*********************************************************************************/
 

command.c

@@ -13,6 +13,8 @@
 #include "Devices/lmx2594.h"
 #include "Devices/dac8811.h"
 
+double f_pd = 175e6;
+
 //Массив структур Command, который связывает строки команд с соответствующими функциями.
 Command commands[] = {
 	{"TMSG44:FREQ ", 	handleFreqCmd},
@@ -33,7 +35,8 @@ void handleFreqCmd(const char* recvBuff)
 	splitLexeme(recvBuff, freq, sizeof(freq[0]), convertToDouble);
 
 	printf("Frequency: %.2f Hz\n", freq[0]);
-    lmx_freq_set(bar1, freq[0]);
+	f_pd = ad9912_set(bar1, freq[0], f_pd);
+    lmx_freq_set(bar1, freq[0], f_pd);
     printf("The frequency is set to %.2f MHz\n", freq[0]/1e6);
 }