pe43711_att теперь отгружаются одновременно. AM_ALC_FIX в диапазоне 0-6 ГГц - 1, а в 6-27 - 0.

Devices/pe43711.c

@@ -1,11 +1,11 @@
 #include "pe43711.h"
 
 void pe43711_att_1_init(reg_addr_pci* pci_bar_1) {
-    pci_bar_1->att_pe_1_addr = PE43711_ATTEN_0DB;
+    pci_bar_1->att_pe_1_addr = PE43711_ATTEN_0DB | (PE43711_ATTEN_0DB << 8);
 }
 
 void pe43711_att_2_init(reg_addr_pci* pci_bar_1) {
-    pci_bar_1->att_pe_2_addr = PE43711_ATTEN_0DB;
+    pci_bar_1->att_pe_2_addr = PE43711_ATTEN_16DB;
 }
 
 void pe43711_att_1_set(reg_addr_pci* pci_bar_1, uint8_t atten) {

Devices/tmsgheaders.c

@@ -151,6 +151,7 @@ void key_switch (reg_addr_pci* pci_bar_1, double freq, double lmx_freq) {
 		SET_REGISTER_PARAM(tmsg_gpio_reg, CTRL_AM_SW3_BITM, CTRL_AM_SW3_BITP, CTRL_AM_SW3_0);
 		SET_REGISTER_PARAM(tmsg_gpio_reg, FPGA_AM_CTRL_BITM, FPGA_AM_CTRL_BITP, FPGA_AM_CTRL_0);
 		SET_REGISTER_PARAM(tmsg_gpio_reg, AM_ALC_SW_BITM, AM_ALC_SW_BITP, AM_ALC_SW_1);
+        SET_REGISTER_PARAM(tmsg_gpio_reg, AM_ALC_1_FIX_BITM,AM_ALC_1_FIX_BITP, AM_ALC_1_FIX_1);
 		// *ptr = tmsg_gpio_reg;
 	}
 	else if (freq > 6000e6 && freq <= 27000e6) {
@@ -233,6 +234,7 @@ void key_switch (reg_addr_pci* pci_bar_1, double freq, double lmx_freq) {
 		SET_REGISTER_PARAM(tmsg_gpio_reg, CTRL_AM_SW3_BITM, CTRL_AM_SW3_BITP, CTRL_AM_SW3_1);
 		SET_REGISTER_PARAM(tmsg_gpio_reg, FPGA_AM_CTRL_BITM, FPGA_AM_CTRL_BITP, FPGA_AM_CTRL_1);
 		SET_REGISTER_PARAM(tmsg_gpio_reg, AM_ALC_SW_BITM, AM_ALC_SW_BITP, AM_ALC_SW_0);
+        SET_REGISTER_PARAM(tmsg_gpio_reg, AM_ALC_1_FIX_BITM,AM_ALC_1_FIX_BITP, AM_ALC_1_FIX_0);
 		// *ptr = tmsg_gpio_reg;
 
 		// Data CFG_REG

main.c

@@ -115,9 +115,9 @@ int main(int argc, char *argv[])
     lmk04821_a_init(pci_bar_1);
     usleep(500);
     lmk04821_b_init(pci_bar_1);
+//    pe43711_att_2_init(pci_bar_1);
 	pe43711_att_1_init(pci_bar_1);
-	usleep(1);
-	pe43711_att_2_init(pci_bar_1);
+//	usleep(1);
     rst_for_fpga(pci_bar_1);
     shift_reg(pci_bar_1);
 	potentiometer_set(pci_bar_1, 0, 0);