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@@ -2,6 +2,148 @@
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#include <math.h>
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+struct vco_params calculate_vco_params (double lmx_freq, double f_pd) {
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+ struct vco_params params;
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+
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+ if (lmx_freq >= 7500e6 && lmx_freq <= 8600e6) {
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+ params.vco_core = 1;
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+ params.f_coremin = 7500e6;
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+ params.f_coremax = 8600e6;
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+ params.c_core_min = 164;
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+ params.c_core_max = 12;
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+ params.a_core_min = 299;
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+ params.a_core_max = 240;
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+ }
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+ else if (lmx_freq > 8600e6 && lmx_freq < 9800e6) {
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+ params.vco_core = 2;
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+ params.f_coremin = 8600e6;
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+ params.f_coremax = 9800e6;
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+ params.c_core_min = 165;
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+ params.c_core_max = 16;
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+ params.a_core_min = 356;
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+ params.a_core_max = 247;
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+ }
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+ else if (lmx_freq >= 9800e6 && lmx_freq <= 10800e6) {
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+ params.vco_core = 3;
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+ params.f_coremin = 9800e6;
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+ params.f_coremax = 10800e6;
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+ params.c_core_min = 158;
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+ params.c_core_max = 19;
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+ params.a_core_min = 324;
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+ params.a_core_max = 224;
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+ }
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+ else if (lmx_freq > 10800e6 && lmx_freq <= 12000e6) {
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+ params.vco_core = 4;
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+ params.f_coremin = 10800e6;
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+ params.f_coremax = 12000e6;
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+ params.c_core_min = 140;
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+ params.c_core_max = 0;
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+ params.a_core_min = 383;
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+ params.a_core_max = 244;
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+ }
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+ else if (lmx_freq > 12000e6 && lmx_freq <= 12900e6) {
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+ params.vco_core = 5;
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+ params.f_coremin = 12000e6;
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+ params.f_coremax = 12900e6;
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+ params.c_core_min = 183;
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+ params.c_core_max = 36;
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+ params.a_core_min = 205;
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+ params.a_core_max = 146;
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+ }
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+ else if (lmx_freq > 12900e6 && lmx_freq <= 13900e6) {
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+ params.vco_core = 6;
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+ params.f_coremin = 12900e6;
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+ params.f_coremax = 13900e6;
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+ params.c_core_min = 155;
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+ params.c_core_max = 6;
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+ params.a_core_min = 242;
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+ params.a_core_max = 163;
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+ }
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+ else if (lmx_freq > 13900e6 && lmx_freq <= 15000e6) {
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+ params.vco_core = 7;
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+ params.f_coremin = 13900e6;
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+ params.f_coremax = 15000e6;
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+ params.c_core_min = 175;
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+ params.c_core_max = 19;
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+ params.a_core_min = 323;
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+ params.a_core_max = 244;
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+ }
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+
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+ if (lmx_freq >=11900e6 && lmx_freq <=12100e6) {
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+ params.vco_daciset_strt = 300;
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+ params.vco_core = 4;
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+ params.vco_cap_ctrl_strt = 1;
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+ }
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+
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+ params.vco_cap_ctrl_strt = round(params.c_core_min - (params.c_core_min - params.c_core_max) * (lmx_freq - params.f_coremin) / (params.f_coremax - params.f_coremin));
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+ params.vco_daciset_strt = round(params.a_core_min + (params.a_core_min - params.a_core_max) * (lmx_freq - params.f_coremin) / (params.f_coremax - params.f_coremin));
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+
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+ if (lmx_freq <= 12500e6) {
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+ params.pfd_dly_sel = 1;
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+ }
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+ else if (lmx_freq > 12500e6) {
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+ params.pfd_dly_sel = 2;
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+ }
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+
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+ if (f_pd <= 100e6) {
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+ params.fcal_hpfd_adj = ENUM_LMX2594_R0_FCAL_HPFD_ADJ_LESS100MHZ;
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+ }
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+ else if (f_pd > 100e6 && f_pd <= 150e6) {
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+ params.fcal_hpfd_adj = ENUM_LMX2594_R0_FCAL_HPFD_ADJ_100_150MHZ;
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+ }
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+ else if (f_pd > 150e6 && f_pd <= 200e6) {
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+ params.fcal_hpfd_adj = ENUM_LMX2594_R0_FCAL_HPFD_ADJ_150_200MHZ;
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+ }
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+ else if (f_pd > 200e6) {
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+ params.fcal_hpfd_adj = ENUM_LMX2594_R0_FCAL_HPFD_ADJ_MORE200MHZ;
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+ }
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+
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+ // SET the CAL_CLK_DIV value
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+ if (f_pd <= 200e6 ) {
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+ params.cal_clk_div = ENUM_LMX2594_R1_CAL_CLK_DIV1;
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+ }
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+ else if (f_pd > 200e6 && f_pd <= 400e6) {
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+ params.cal_clk_div = ENUM_LMX2594_R1_CAL_CLK_DIV2;
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+ }
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+ else if (f_pd > 400e6 && f_pd < 800e6) {
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+ params.cal_clk_div = ENUM_LMX2594_R1_CAL_CLK_DIV4;
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+ }
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+
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+ // Calculate the ACAL_CMP_DLY
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+ double Fsmclk = f_pd/(pow(2,params.cal_clk_div));
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+ params.acal_cmp_dly = (uint8_t) ((uint64_t)round((Fsmclk)/10e6));
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+ return params;
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+}
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+
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+void set_vco_params (struct vco_params *params) {
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+ // Set the VCO_CORE
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+ lmx2594regs[112 - VCO_SEL] = lmx2594regs[112 - VCO_SEL] & (~BITM_LMX2594_R20_VCO_SEL);
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+ lmx2594regs[112 - VCO_SEL] = lmx2594regs[112 - VCO_SEL] | (params->vco_core << BITP_LMX2594_R20_VCO_SEL);
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+ // Set the VCO_CAP_CTRL_START
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+ lmx2594regs[112 - CAP_CTRL_START] = lmx2594regs[112 - CAP_CTRL_START] & (~BITM_LMX2594_R78_VCO_CAP_CTRL_START);
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+ lmx2594regs[112 - CAP_CTRL_START] = lmx2594regs[112 - CAP_CTRL_START] | (params->vco_cap_ctrl_strt << BITP_LMX2594_R78_VCO_CAP_CTRL_START);
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+ // Set the VCO_DACISET
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+ lmx2594regs[112 - VCO_DACISET] = lmx2594regs[112 - VCO_DACISET] & (~BITM_LMX2594_R17_VCO_DACISET);
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+ lmx2594regs[112 - VCO_DACISET] = lmx2594regs[112 - VCO_DACISET] | (params->vco_daciset_strt << BITP_LMX2594_R17_VCO_DACISET);
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+
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+ // Set PFD_DLY_SEL
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+ lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
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+ lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] | (params->pfd_dly_sel << BITP_LMX2594_R37_PFD_DLY_SEL);
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+
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+ // Set the FCAL_HPFD_ADJ
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+ lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] & (~BITM_LMX2594_RO_FCAL_HPFD_ADJ);
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+ lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] | params->fcal_hpfd_adj;
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+
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+ // SET the CAL_CLK_DIV value
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+ lmx2594regs[112-R1_ADDR] = lmx2594regs[112-R1_ADDR] & (~BITM_LMX2594_R1_CAL_CLK_DIV);
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+ lmx2594regs[112-R1_ADDR] = lmx2594regs[112-R1_ADDR] | params->cal_clk_div;
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+
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+ // Set the ACAL_CMP_DLY value
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+ lmx2594regs[112-R4_ADDR] = lmx2594regs[112-R4_ADDR] & (~BITM_LMX2594_R4_ACAL_CMP_DLY);
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+ lmx2594regs[112-R4_ADDR] = lmx2594regs[112-R4_ADDR] | (params->acal_cmp_dly << BITP_LMX2594_R4_ACAL_CMP_DLY);
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+
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+}
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+
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const uint32_t lmx2594_rst[] = {
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0x002516,
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0x002514
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@@ -169,149 +311,11 @@ int lmx_freq_set_main_band_int_mode(void *bar1, double lmx_freq, double f_pd) {
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}
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};
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- int vco_core;
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- double f_coremin;
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- double f_coremax;
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- int c_core_min;
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- int c_core_max;
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- int a_core_min;
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- int a_core_max;
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- uint16_t vco_cap_ctrl_strt;
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- uint16_t vco_daciset_strt;
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-
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// Partial assist for the calibration
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+ struct vco_params params = calculate_vco_params(lmx_freq, f_pd);
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- //Determine a VCO core and other parameters
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-
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- if (lmx_freq >= 7500e6 && lmx_freq <= 8600e6) {
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- vco_core = 1;
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- f_coremin = 7500e6;
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- f_coremax = 8600e6;
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- c_core_min = 164;
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- c_core_max = 12;
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- a_core_min = 299;
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- a_core_max = 240;
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- }
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- else if (lmx_freq > 8600e6 && lmx_freq < 9800e6) {
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- vco_core = 2;
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- f_coremin = 8600e6;
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- f_coremax = 9800e6;
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- c_core_min = 165;
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- c_core_max = 16;
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- a_core_min = 356;
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- a_core_max = 247;
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- }
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- else if (lmx_freq >= 9800e6 && lmx_freq <= 10800e6) {
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- vco_core = 3;
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- f_coremin = 9800e6;
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- f_coremax = 10800e6;
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- c_core_min = 158;
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- c_core_max = 19;
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- a_core_min = 324;
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- a_core_max = 224;
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- }
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- else if (lmx_freq > 10800e6 && lmx_freq <= 12000e6) {
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- vco_core = 4;
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- f_coremin = 10800e6;
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- f_coremax = 12000e6;
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- c_core_min = 140;
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- c_core_max = 0;
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- a_core_min = 383;
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- a_core_max = 244;
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- }
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- else if (lmx_freq > 12000e6 && lmx_freq <= 12900e6) {
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- vco_core = 5;
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- f_coremin = 12000e6;
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- f_coremax = 12900e6;
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- c_core_min = 183;
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- c_core_max = 36;
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- a_core_min = 205;
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- a_core_max = 146;
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- }
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- else if (lmx_freq > 12900e6 && lmx_freq <= 13900e6) {
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- vco_core = 6;
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- f_coremin = 12900e6;
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- f_coremax = 13900e6;
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- c_core_min = 155;
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- c_core_max = 6;
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- a_core_min = 242;
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- a_core_max = 163;
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- }
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- else if (lmx_freq > 13900e6 && lmx_freq <= 15000e6) {
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- vco_core = 7;
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- f_coremin = 13900e6;
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- f_coremax = 15000e6;
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- c_core_min = 175;
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- c_core_max = 19;
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- a_core_min = 323;
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- a_core_max = 244;
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- };
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- if (lmx_freq >=11900e6 && lmx_freq <=12100e6) {
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- vco_daciset_strt = 300;
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- vco_core = 4;
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- vco_cap_ctrl_strt = 1;
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- }
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- vco_cap_ctrl_strt = round(c_core_min - (c_core_min - c_core_max) * (lmx_freq - f_coremin) / (f_coremax - f_coremin));
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- vco_daciset_strt = round(a_core_min + (a_core_min - a_core_max) * (lmx_freq - f_coremin) / (f_coremax - f_coremin));
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- //Set the VCO_CORE
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- lmx2594regs[112 - VCO_SEL] = lmx2594regs[112 - VCO_SEL] & (~BITM_LMX2594_R20_VCO_SEL);
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- lmx2594regs[112 - VCO_SEL] = lmx2594regs[112 - VCO_SEL] | (vco_core << BITP_LMX2594_R20_VCO_SEL);
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- // Set the VCO_CAP_CTRL
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- lmx2594regs[112 - CAP_CTRL_START] = lmx2594regs[112 - CAP_CTRL_START] & (~BITM_LMX2594_R78_VCO_CAP_CTRL_START);
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- lmx2594regs[112 - CAP_CTRL_START] = lmx2594regs[112 - CAP_CTRL_START] | (vco_cap_ctrl_strt << BITP_LMX2594_R78_VCO_CAP_CTRL_START);
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- // Set the VCO_DACISET
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- lmx2594regs[112 - VCO_DACISET] = lmx2594regs[112 - VCO_DACISET] & (~BITM_LMX2594_R17_VCO_DACISET);
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- lmx2594regs[112 - VCO_DACISET] = lmx2594regs[112 - VCO_DACISET] | (vco_daciset_strt << BITP_LMX2594_R17_VCO_DACISET);
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-
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- // Set the PF_DLY_SEL
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- if (lmx_freq <= 12500e6) {
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- lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
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- lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] | (0x1 << BITP_LMX2594_R37_PFD_DLY_SEL);
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- }
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- else if (lmx_freq > 12500e6) {
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- lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
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- lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] | (0x2 << BITP_LMX2594_R37_PFD_DLY_SEL);
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- };
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- int cal_clk_div;
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- //SET the FCAL_HPFD_ADJ
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- if (f_pd <= 100e6) {
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] & (~BITM_LMX2594_RO_FCAL_HPFD_ADJ);
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] | ENUM_LMX2594_R0_FCAL_HPFD_ADJ_LESS100MHZ;
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- }
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- else if (f_pd > 100e6 && f_pd <= 150e6) {
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] & (~BITM_LMX2594_RO_FCAL_HPFD_ADJ);
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] | ENUM_LMX2594_R0_FCAL_HPFD_ADJ_100_150MHZ;
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- }
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- else if (f_pd > 150e6 && f_pd <= 200e6) {
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] & (~BITM_LMX2594_RO_FCAL_HPFD_ADJ);
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] | ENUM_LMX2594_R0_FCAL_HPFD_ADJ_150_200MHZ;
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- }
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- else if (f_pd > 200e6) {
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] & (~BITM_LMX2594_RO_FCAL_HPFD_ADJ);
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] | ENUM_LMX2594_R0_FCAL_HPFD_ADJ_MORE200MHZ;
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- }
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- // SET the CAL_CLK_DIV value
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- if (f_pd <= 200e6 ) {
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- lmx2594regs[112-R1_ADDR] = lmx2594regs[112-R1_ADDR] & (~BITM_LMX2594_R1_CAL_CLK_DIV);
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- lmx2594regs[112-R1_ADDR] = lmx2594regs[112-R1_ADDR] | ENUM_LMX2594_R1_CAL_CLK_DIV1;
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- cal_clk_div = 0;
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- }
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- else if (f_pd > 200e6 && f_pd <= 400e6) {
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- lmx2594regs[112-R1_ADDR] = lmx2594regs[112-R1_ADDR] & (~BITM_LMX2594_R1_CAL_CLK_DIV);
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- lmx2594regs[112-R1_ADDR] = lmx2594regs[112-R1_ADDR] | ENUM_LMX2594_R1_CAL_CLK_DIV2;
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- cal_clk_div = 1;
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- }
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- else if (f_pd > 400e6 && f_pd < 800e6) {
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- lmx2594regs[112-R1_ADDR] = lmx2594regs[112-R1_ADDR] & (~BITM_LMX2594_R1_CAL_CLK_DIV);
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- lmx2594regs[112-R1_ADDR] = lmx2594regs[112-R1_ADDR] | ENUM_LMX2594_R1_CAL_CLK_DIV4;
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- cal_clk_div = 2;
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- };
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- //Calculate the ACAL_CMP_DLY
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- double Fsmclk = f_pd/(pow(2,cal_clk_div));
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- uint8_t acal_cmp_dly = (uint8_t) ((uint64_t)round((Fsmclk)/10e6));
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- //Set the ACAL_CMP_DLY value
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- lmx2594regs[112-R4_ADDR] = lmx2594regs[112-R4_ADDR] &(~BITM_LMX2594_R4_ACAL_CMP_DLY);
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- lmx2594regs[112-R4_ADDR] = lmx2594regs[112-R4_ADDR] | (acal_cmp_dly << BITP_LMX2594_R4_ACAL_CMP_DLY);
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+ // Set the vco params
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+ set_vco_params(¶ms);
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// SET the N_DIV
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lmx2594regs[112-PLL_N_S] = lmx2594regs[112-PLL_N_S] &(~0xFFFF);
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lmx2594regs[112-PLL_N_S] = lmx2594regs[112-PLL_N_S] | (N >> 16);
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@@ -322,7 +326,6 @@ int lmx_freq_set_main_band_int_mode(void *bar1, double lmx_freq, double f_pd) {
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// Clear the SEG1_EN bit
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lmx2594regs[112-CHDIV_DIV2] = lmx2594regs[112 - CHDIV_DIV2] & (~BITM_LMX2594_R31_CHDIV_DIV2);
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// Set the OUTA_MUX to channel divider R45[12:11]; 0 - Channel divider, 1 - VCO;
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- // Removed unnecessary commented-out LMX_HEADER definition
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lmx2594regs[112 - OUTA_MUX] = lmx2594regs[112 - OUTA_MUX] | ENUM_LMX2594_R45_OUTA_MUX_VCO;
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// Program the FCAL_EN bit
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lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] & (~BITM_LMX2594_R0_FCAL);
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@@ -341,8 +344,6 @@ int lmx_freq_set_main_band_int_mode(void *bar1, double lmx_freq, double f_pd) {
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lmx2594regs[112 - OUTA_MUX],
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lmx2594regs[112-FCAL_ADDR]
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};
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- // Create a header for the LMX2594 with the appropriate number of words
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- // uint32_t LMX_HEADER = ((0 << 23) | (DeviceIdLmx2594 << 18) | ((sizeof(lmx_change_freq_regs)/4) << 1) | 1);
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// Create a header for the LMX2594 with the appropriate number of words MOSI 4
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uint32_t LMX_HEADER = ((0x1<< 23) | ((sizeof(lmx_change_freq_regs) / 4) << BITP_LMX2594_4MOSI_HEADER) | 1);
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uint32_t *ptr = bar1 + LMX_BASE_ADDR;
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@@ -361,16 +362,6 @@ int lmx_freq_set_out_of_band_int_mode(void *bar1, double lmx_freq, double f_pd)
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uint8_t ch_div_reg = 0; // 2
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double vco_div = 7.5e9 / lmx_freq;
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- int vco_core;
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- double f_coremin;
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- double f_coremax;
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- int c_core_min;
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- int c_core_max;
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- int a_core_min;
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- int a_core_max;
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- uint16_t vco_cap_ctrl_strt;
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- uint16_t vco_daciset_strt;
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-
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// minimum N_div value is 28 and Vco frequency can't be less than 7.5 GHz
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if (f_vco < 7.5e9) {
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if (vco_div > 2 && vco_div <= 4) {
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@@ -516,141 +507,9 @@ int lmx_freq_set_out_of_band_int_mode(void *bar1, double lmx_freq, double f_pd)
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};
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// Partial assist for the calibration
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- //Determine a VCO core and other parameters
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-
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- if (f_vco >= 7500e6 && f_vco <= 8600e6) {
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- vco_core = 1;
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- f_coremin = 7500e6;
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- f_coremax = 8600e6;
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- c_core_min = 164;
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- c_core_max = 12;
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- a_core_min = 299;
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- a_core_max = 240;
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- }
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- else if (f_vco > 8600e6 && f_vco < 9800e6) {
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- vco_core = 2;
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- f_coremin = 8600e6;
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- f_coremax = 9800e6;
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- c_core_min = 165;
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- c_core_max = 16;
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- a_core_min = 356;
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- a_core_max = 247;
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- }
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- else if (f_vco >= 9800e6 && f_vco <= 10800e6) {
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- vco_core = 3;
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- f_coremin = 9800e6;
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- f_coremax = 10800e6;
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- c_core_min = 158;
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- c_core_max = 19;
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- a_core_min = 324;
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- a_core_max = 224;
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- }
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- else if (f_vco > 10800e6 && f_vco <= 12000e6) {
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- vco_core = 4;
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- f_coremin = 10800e6;
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- f_coremax = 12000e6;
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- c_core_min = 140;
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- c_core_max = 0;
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- a_core_min = 383;
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- a_core_max = 244;
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- }
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- else if (f_vco > 12000e6 && f_vco <= 12900e6) {
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- vco_core = 5;
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- f_coremin = 12000e6;
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- f_coremax = 12900e6;
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- c_core_min = 183;
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- c_core_max = 36;
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- a_core_min = 205;
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- a_core_max = 146;
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- }
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- else if (f_vco > 12900e6 && f_vco <= 13900e6) {
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- vco_core = 6;
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- f_coremin = 12900e6;
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- f_coremax = 13900e6;
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- c_core_min = 155;
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- c_core_max = 6;
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- a_core_min = 242;
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- a_core_max = 163;
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- }
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- else if (f_vco > 13900e6 && f_vco <= 15000e6) {
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- vco_core = 7;
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- f_coremin = 13900e6;
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- f_coremax = 15000e6;
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- c_core_min = 175;
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- c_core_max = 19;
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- a_core_min = 323;
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- a_core_max = 244;
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- };
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-
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- vco_cap_ctrl_strt = round(c_core_min - (c_core_min - c_core_max) * (f_vco - f_coremin) / (f_coremax - f_coremin));
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- vco_daciset_strt = round(a_core_min + (a_core_min - a_core_max) * (f_vco - f_coremin) / (f_coremax - f_coremin));
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-
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- if (f_vco >=11900e6 && f_vco <=12100e6) {
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- vco_daciset_strt = 300;
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- vco_core = 4;
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- vco_cap_ctrl_strt = 1;
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- }
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- // Calibration assist
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- //Set the VCO_CORE
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- lmx2594regs[112 - VCO_SEL] = lmx2594regs[112 - VCO_SEL] & (~BITM_LMX2594_R20_VCO_SEL);
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- lmx2594regs[112 - VCO_SEL] = lmx2594regs[112 - VCO_SEL] | (vco_core << BITP_LMX2594_R20_VCO_SEL);
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- // Set the VCO_CAP_CTRL_START
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- lmx2594regs[112 - CAP_CTRL_START] = lmx2594regs[112 - CAP_CTRL_START] & (~BITM_LMX2594_R78_VCO_CAP_CTRL_START);
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- lmx2594regs[112 - CAP_CTRL_START] = lmx2594regs[112 - CAP_CTRL_START] | (vco_cap_ctrl_strt << BITP_LMX2594_R78_VCO_CAP_CTRL_START);
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- // Set the VCO_DACISET
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- lmx2594regs[112 - VCO_DACISET] = lmx2594regs[112 - VCO_DACISET] & (~BITM_LMX2594_R17_VCO_DACISET);
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- lmx2594regs[112 - VCO_DACISET] = lmx2594regs[112 - VCO_DACISET] | (vco_daciset_strt << BITP_LMX2594_R17_VCO_DACISET);
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-
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- // Set the PFD_DLY_SEL to appropriate value
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- if (f_vco <= 12500e6) {
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- lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
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- lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] | (0x1 << BITP_LMX2594_R37_PFD_DLY_SEL);
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- // printf("PFD_DLY_SEL = %d\n", 1);
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- }
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- else if (f_vco > 12500e6) {
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- lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
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- lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] | (0x2 << BITP_LMX2594_R37_PFD_DLY_SEL);
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- // printf("PFD_DLY_SEL = %d\n", 2);
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- }
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- if (f_pd <= 100e6) {
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] & (~BITM_LMX2594_RO_FCAL_HPFD_ADJ);
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] | ENUM_LMX2594_R0_FCAL_HPFD_ADJ_LESS100MHZ;
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- }
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- else if (f_pd > 100e6 && f_pd <= 150e6) {
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] & (~BITM_LMX2594_RO_FCAL_HPFD_ADJ);
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] | ENUM_LMX2594_R0_FCAL_HPFD_ADJ_100_150MHZ;
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- }
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- else if (f_pd > 150e6 && f_pd <= 200e6) {
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] & (~BITM_LMX2594_RO_FCAL_HPFD_ADJ);
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] | ENUM_LMX2594_R0_FCAL_HPFD_ADJ_150_200MHZ;
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- }
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- else if (f_pd > 200e6) {
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] & (~BITM_LMX2594_RO_FCAL_HPFD_ADJ);
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- lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] | ENUM_LMX2594_R0_FCAL_HPFD_ADJ_MORE200MHZ;
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- };
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- // SET the CAL_CLK_DIV value
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- int cal_clk_div;
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- if (f_pd <= 200e6 ) {
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- lmx2594regs[112-R1_ADDR] = lmx2594regs[112-R1_ADDR] & (~BITM_LMX2594_R1_CAL_CLK_DIV);
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- lmx2594regs[112-R1_ADDR] = lmx2594regs[112-R1_ADDR] | ENUM_LMX2594_R1_CAL_CLK_DIV1;
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- cal_clk_div =0;
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- }
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- else if (f_pd > 200e6 && f_pd <= 400e6) {
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- lmx2594regs[112-R1_ADDR] = lmx2594regs[112-R1_ADDR] & (~BITM_LMX2594_R1_CAL_CLK_DIV);
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- lmx2594regs[112-R1_ADDR] = lmx2594regs[112-R1_ADDR] | ENUM_LMX2594_R1_CAL_CLK_DIV2;
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- cal_clk_div =1;
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- }
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- else if (f_pd > 400e6 && f_pd < 800e6) {
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- lmx2594regs[112-R1_ADDR] = lmx2594regs[112-R1_ADDR] & (~BITM_LMX2594_R1_CAL_CLK_DIV);
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- lmx2594regs[112-R1_ADDR] = lmx2594regs[112-R1_ADDR] | ENUM_LMX2594_R1_CAL_CLK_DIV4;
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- cal_clk_div = 2;
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- };
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- //Calculate the ACAL_CMP_DLY
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- double Fsmclk = f_pd/(pow(2,cal_clk_div));
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- uint8_t acal_cmp_dly = (uint8_t) ((uint64_t)round((Fsmclk)/10e6));;
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- //Set the ACAL_CMP_DLY value
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- lmx2594regs[112-R4_ADDR] = lmx2594regs[112-R4_ADDR] &(~BITM_LMX2594_R4_ACAL_CMP_DLY);
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- lmx2594regs[112-R4_ADDR] = lmx2594regs[112-R4_ADDR] | (acal_cmp_dly << BITP_LMX2594_R4_ACAL_CMP_DLY);
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+ struct vco_params params = calculate_vco_params(f_vco, f_pd);
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+ // Set the vco params
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+ set_vco_params(¶ms);
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// Set the N value
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lmx2594regs[112-PLL_N_S] = lmx2594regs[112-PLL_N_S] &(~0xFFFF);
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lmx2594regs[112-PLL_N_S] = lmx2594regs[112-PLL_N_S] | (N >> 16);
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