Обработка всего частотного диапазона

Devices/lmx2594.c

@@ -122,7 +122,6 @@ uint32_t lmx2594regs[LMX_COUNT] = {
         0x00251C
 };
 
-double lmx_freq; // Frequency of the LMX2594
 
 void auto_cal(void *bar1) {
     lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] & (~BITM_LMX2594_R0_FCAL);
@@ -154,235 +153,22 @@ void lmx2594_init(void *bar1) {
     }
     usleep(10);
     auto_cal(bar1);
-    FILE * f = fopen("init.txt", "w");
-    for (int i = 0; i < sizeof(lmx2594regs) / 4; i++) {
-        fprintf(f, "0x%08X\n", lmx2594regs[i]);
-    }
-    fclose(f);
-
 }
 
 /*-------------------------LMX2594 Frequency Set-------------------------*/
-int lmx_freq_set_main_band(void *bar1, double freq, double f_pd) {
-    double N_div;
-    N_div = freq / f_pd;
-
-    int vco_core;
-    double f_coremin;
-    double f_coremax;
-    int c_core_min;
-    int c_core_max;
-    int a_core_min;
-    int a_core_max;
-    uint16_t vco_cap_ctrl_strt;
-    uint16_t vco_daciset_strt;
-
-    // divide whole part and fractional part
-    uint32_t N = (uint32_t) N_div;
-    // In frac part there is separate denominator and numerator
-    // If frac part is 0 then the denominator is 1000 and numerator is 0
-    uint32_t frac_n = (uint32_t) ((N_div - N) * (4294967295-1));
-    uint32_t frac_d = 4294967295-1;
-    // If frac part is 0 then the denominator is 1000 and numerator is 0
-    if (frac_n == 0) {
-        frac_n = 0;
-        frac_d = 1000;
-    }
-
-    // Partial assist for the calibration
-
-    //Determine a VCO core and other parameters
-
-    if (freq >= 7500e6 && freq <= 8600e6) {
-        vco_core = 1;
-        f_coremin = 7500e6;
-        f_coremax = 8600e6;
-        c_core_min = 164;
-        c_core_max = 12;
-        a_core_min = 299;
-        a_core_max = 240;
-    }
-    else if (freq > 8600e6 && freq < 9800e6) {
-        vco_core = 2;
-        f_coremin = 8600e6;
-        f_coremax = 9800e6;
-        c_core_min = 165;
-        c_core_max = 16;
-        a_core_min = 356;
-        a_core_max = 247;
-    }
-    else if (freq >= 9800e6 && freq <= 10800e6) {
-        vco_core = 3;
-        f_coremin = 9800e6;
-        f_coremax = 10800e6;
-        c_core_min = 158;
-        c_core_max = 19;
-        a_core_min = 324;
-        a_core_max = 224;
-    }
-    else if (freq > 10800e6 && freq <= 12000e6) {
-        vco_core = 4;
-        f_coremin = 10800e6;
-        f_coremax = 12000e6;
-        c_core_min = 140;
-        c_core_max = 0;
-        a_core_min = 383;
-        a_core_max = 244;
-    }
-    else if (freq > 12000e6 && freq <= 12900e6) {
-        vco_core = 5;
-        f_coremin = 12000e6;
-        f_coremax = 12900e6;
-        c_core_min = 183;
-        c_core_max = 36;
-        a_core_min = 205;
-        a_core_max = 146;
-    }
-    else if (freq > 12900e6 && freq <= 13900e6) {
-        vco_core = 6;
-        f_coremin = 12900e6;
-        f_coremax = 13900e6;
-        c_core_min = 155;
-        c_core_max = 6;
-        a_core_min = 242;
-        a_core_max = 163;
-    }
-    else if (freq > 13900e6 && freq <= 15000e6) {
-        vco_core = 7;
-        f_coremin = 13900e6;
-        f_coremax = 15000e6;
-        c_core_min = 175;
-        c_core_max = 19;
-        a_core_min = 323;
-        a_core_max = 244;
-    };
-    if (freq >=11900e6 && freq <=12100e6) {
-        vco_daciset_strt = 300;
-        vco_core = 4;
-        vco_cap_ctrl_strt = 1;
-    }
-    vco_cap_ctrl_strt = round(c_core_min - (c_core_min - c_core_max) * (freq - f_coremin) / (f_coremax - f_coremin));
-    vco_daciset_strt = round(a_core_min + (a_core_min - a_core_max) * (freq - f_coremin) / (f_coremax - f_coremin));
-    
-    printf("VCO_CORE = %d\n", vco_core);
-    printf("VCO_CAP_CTRL_STR = %d\n", vco_cap_ctrl_strt);
-    printf("VCO_DACISET_STR = %d\n", vco_daciset_strt);
-    // Calibration assist 
-    //Set the VCO_CORE 
-    lmx2594regs[112 - VCO_SEL] = lmx2594regs[112 - VCO_SEL] & (~BITM_LMX2594_R20_VCO_SEL);
-    lmx2594regs[112 - VCO_SEL] = lmx2594regs[112 - VCO_SEL] | (vco_core << BITP_LMX2594_R20_VCO_SEL);
-    // Set the VCO_CAP_CTRL
-    lmx2594regs[112 - CAP_CTRL_START] = lmx2594regs[112 - CAP_CTRL_START] & (~BITM_LMX2594_R78_VCO_CAP_CTRL_START);
-    lmx2594regs[112 - CAP_CTRL_START] = lmx2594regs[112 - CAP_CTRL_START] | (vco_cap_ctrl_strt << BITP_LMX2594_R78_VCO_CAP_CTRL_START);
-    // Set the VCO_DACISET
-    lmx2594regs[112 - VCO_DACISET] = lmx2594regs[112 - VCO_DACISET] & (~BITM_LMX2594_R17_VCO_DACISET);
-    lmx2594regs[112 - VCO_DACISET] = lmx2594regs[112 - VCO_DACISET] | (vco_daciset_strt << BITP_LMX2594_R17_VCO_DACISET);
-
-    // Recommended sequnce for changin freq
-    // 1. Change the N-div value
-    // 2. Change the PLL numerator and denominator
-    // 3. Program FCAL_EN bit
-    // Clear the required parts of the register
-    lmx2594regs[112-MASH_ORDER] = lmx2594regs[112-MASH_ORDER] & (~BITM_LMX2594_R44_MASH_ORDER);
-    // Set the MASH_ORDER to 3
-    lmx2594regs[112-MASH_ORDER] = lmx2594regs[112-MASH_ORDER] | ENUM_LMX2594_R44_MASH_ORDER_3;
-    // Set PF_DLY_SEL to 3
-    if (freq <= 10e9) {
-        lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
-        lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] | (0x3 << BITP_LMX2594_R37_PFD_DLY_SEL);
-        printf("PFD_DLY_SEL = %d\n", 3);
-    }
-    else if (freq > 10e9) {
-        lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
-        lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] | (0x4 << BITP_LMX2594_R37_PFD_DLY_SEL);
-        printf("PFD_DLY_SEL = %d\n", 4);
-    }
-    lmx2594regs[112-PLL_N_S] = lmx2594regs[112-PLL_N_S] &(~0xFFFF);
-    lmx2594regs[112-PLL_N_S] = lmx2594regs[112-PLL_N_S] | (N >> 16);
-    //CLear the lower 16 bits of the register
-    lmx2594regs[112-PLL_N_M] = lmx2594regs[112-PLL_N_M] & (~0xFFFF);
-    // Next 16 bits of the register
-    lmx2594regs[112-PLL_N_M] = lmx2594regs[112-PLL_N_M] | (N & 0xFFFF);
-    // Clear the upper 16 bits of the register lmx2594regs[PLL_NUM_S]
-    lmx2594regs[112-PLL_NUM_S] = lmx2594regs[112-PLL_NUM_S] & (~0xFFFF);
-    lmx2594regs[112-PLL_NUM_S] = lmx2594regs[112-PLL_NUM_S] | (frac_n >> 16);
-    // Clear the lower 16 bits of the register lmx2594regs[PLL_NUM_M]
-    lmx2594regs[112-PLL_NUM_M] = lmx2594regs[112-PLL_NUM_M] & (~0xFFFF);
-    // Next 16 bits of the numerator
-    lmx2594regs[112-PLL_NUM_M] = lmx2594regs[112-PLL_NUM_M] | (frac_n & 0xFFFF);
-    // Clear the upper 16 bits of the register lmx2594regs[PLL_DEN_S]
-    lmx2594regs[112-PLL_DEN_S] = lmx2594regs[112-PLL_DEN_S] & (~0xFFFF);
-    // most significant 16 bits of the denominator
-    lmx2594regs[112-PLL_DEN_S] = lmx2594regs[112-PLL_DEN_S] | (frac_d >> 16);
-    // Clear the lower 16 bits of the register lmx2594regs[PLL_DEN_M]
-    lmx2594regs[112-PLL_DEN_M] = lmx2594regs[112-PLL_DEN_M] & (~0xFFFF);
-    // Next 16 bits of the denominator
-    lmx2594regs[112-PLL_DEN_M] = lmx2594regs[112-PLL_DEN_M] | (frac_d & 0xFFFF);
-    lmx2594regs[112-CHDIV_DIV2] = lmx2594regs[112 - CHDIV_DIV2] & (~BITM_LMX2594_R31_CHDIV_DIV2);
-    lmx2594regs[112 - CHDIV] = lmx2594regs[112 - CHDIV] & (~BITM_LMX2594_R75_CHDIV);
-    // Set the OUTA_MUX to channel divider R45[12:11]; 0 - Channel divider, 1 - VCO;
-    lmx2594regs[112 - OUTA_MUX] = lmx2594regs[112 - OUTA_MUX] & (~BITM_LMX2594_R45_OUTA_MUX);
-    lmx2594regs[112 - OUTA_MUX] = lmx2594regs[112 - OUTA_MUX] | ENUM_LMX2594_R45_OUTA_MUX_VCO;
-    // Program the FCAL_EN bit
-    lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] | (LMX2594_R0_FCAL_EN);
-    // Show the all the upper 16 bits of the register lmx2594regs[PLL_N_S]
-    // Determine which regs are changed and send only those
-    uint32_t lmx_change_freq_regs[] = {
-            lmx2594regs[112-CPG_REG] = (lmx2594regs[112-CPG_REG] & (~BITM_LMX2594_R14_CPG)) | ENUM_LMX2594_R14_CPG_TRISTATE,
-            lmx2594regs[112 - VCO_SEL],
-            lmx2594regs[112 - CAP_CTRL_START],
-            lmx2594regs[112 - VCO_DACISET],
-            lmx2594regs[112-MASH_ORDER],
-            lmx2594regs[112-PFD_DLY_SEL],
-            lmx2594regs[112-PLL_N_S],
-            lmx2594regs[112-PLL_N_M],
-            lmx2594regs[112-PLL_DEN_S],
-            lmx2594regs[112-PLL_DEN_M],
-            lmx2594regs[112-PLL_NUM_S],
-            lmx2594regs[112-PLL_NUM_M],
-            lmx2594regs[112 - CHDIV],
-            lmx2594regs[112 - CHDIV_DIV2],
-            lmx2594regs[112-OUTA_MUX],
-            lmx2594regs[112-CPG_REG] = (lmx2594regs[112-CPG_REG] & (~BITM_LMX2594_R14_CPG)) | ENUM_LMX2594_R14_CPG_15ma,
-            lmx2594regs[112-FCAL_ADDR]
-    };
-    // Create a header for the LMX2594 with the appropriate number of words
-    uint32_t LMX_HEADER = ((0 << 23) | (DeviceIdLmx2594 << 18) | ((sizeof(lmx_change_freq_regs)/4) << 1) | 1);
-    uint32_t *ptr = bar1 + LMX_BASE_ADDR;
-    *ptr = LMX_HEADER;
-    for (int i = 0; i < sizeof(lmx_change_freq_regs)/4; i++) {
-        uint32_t *data_ptr = bar1 + LMX_BASE_ADDR;
-        *data_ptr = lmx_change_freq_regs[i];
-    }
-    char filename[100];
-    sprintf(filename, "%f.txt", freq);
-    FILE * f = fopen(filename, "w");
-    for (int i = 0; i < sizeof(lmx2594regs) / 4; i++) {
-        fprintf(f, "0x%08X\n", lmx2594regs[i]);
-    }
-    fclose(f);
-    printf("File has been written\n");
-    printf("N_div = %f\n", N_div);
-    printf("f_vco = %f\n", freq);
-    printf("SEG1_EN %08X\n",lmx2594regs[112 - CHDIV_DIV2]);
-    printf("N = %d\n", N);
-    printf("frac_n = %u\n", frac_n);
-    printf("frac_d = %u\n", frac_d);
-}
-
-int lmx_freq_set_main_band_int_mode(void *bar1, double freq, double f_pd) {
+int lmx_freq_set_main_band_int_mode(void *bar1, double lmx_freq, double f_pd) {
 
     double N_div;
     printf("f_pd before = %f\n",f_pd);
-    N_div = freq / f_pd;
+    N_div = lmx_freq / f_pd;
 
     uint32_t N = (uint32_t) N_div;
-     if (freq <= 12500e6) {
+     if (lmx_freq <= 12500e6) {
         if (N < 28){
             N= 28;
         };
     }
-    else if (freq > 12500e6) {
+    else if (lmx_freq > 12500e6) {
         if (N <32) {
             N = 32;
         }
@@ -402,7 +188,7 @@ int lmx_freq_set_main_band_int_mode(void *bar1, double freq, double f_pd) {
 
     //Determine a VCO core and other parameters
 
-    if (freq >= 7500e6 && freq <= 8600e6) {
+    if (lmx_freq >= 7500e6 && lmx_freq <= 8600e6) {
         vco_core = 1;
         f_coremin = 7500e6;
         f_coremax = 8600e6;
@@ -411,7 +197,7 @@ int lmx_freq_set_main_band_int_mode(void *bar1, double freq, double f_pd) {
         a_core_min = 299;
         a_core_max = 240;
     }
-    else if (freq > 8600e6 && freq < 9800e6) {
+    else if (lmx_freq > 8600e6 && lmx_freq < 9800e6) {
         vco_core = 2;
         f_coremin = 8600e6;
         f_coremax = 9800e6;
@@ -420,7 +206,7 @@ int lmx_freq_set_main_band_int_mode(void *bar1, double freq, double f_pd) {
         a_core_min = 356;
         a_core_max = 247;
     }
-    else if (freq >= 9800e6 && freq <= 10800e6) {
+    else if (lmx_freq >= 9800e6 && lmx_freq <= 10800e6) {
         vco_core = 3;
         f_coremin = 9800e6;
         f_coremax = 10800e6;
@@ -429,7 +215,7 @@ int lmx_freq_set_main_band_int_mode(void *bar1, double freq, double f_pd) {
         a_core_min = 324;
         a_core_max = 224;
     }
-    else if (freq > 10800e6 && freq <= 12000e6) {
+    else if (lmx_freq > 10800e6 && lmx_freq <= 12000e6) {
         vco_core = 4;
         f_coremin = 10800e6;
         f_coremax = 12000e6;
@@ -438,7 +224,7 @@ int lmx_freq_set_main_band_int_mode(void *bar1, double freq, double f_pd) {
         a_core_min = 383;
         a_core_max = 244;
     }
-    else if (freq > 12000e6 && freq <= 12900e6) {
+    else if (lmx_freq > 12000e6 && lmx_freq <= 12900e6) {
         vco_core = 5;
         f_coremin = 12000e6;
         f_coremax = 12900e6;
@@ -447,7 +233,7 @@ int lmx_freq_set_main_band_int_mode(void *bar1, double freq, double f_pd) {
         a_core_min = 205;
         a_core_max = 146;
     }
-    else if (freq > 12900e6 && freq <= 13900e6) {
+    else if (lmx_freq > 12900e6 && lmx_freq <= 13900e6) {
         vco_core = 6;
         f_coremin = 12900e6;
         f_coremax = 13900e6;
@@ -456,7 +242,7 @@ int lmx_freq_set_main_band_int_mode(void *bar1, double freq, double f_pd) {
         a_core_min = 242;
         a_core_max = 163;
     }
-    else if (freq > 13900e6 && freq <= 15000e6) {
+    else if (lmx_freq > 13900e6 && lmx_freq <= 15000e6) {
         vco_core = 7;
         f_coremin = 13900e6;
         f_coremax = 15000e6;
@@ -465,17 +251,17 @@ int lmx_freq_set_main_band_int_mode(void *bar1, double freq, double f_pd) {
         a_core_min = 323;
         a_core_max = 244;
     };
-    if (freq >=11900e6 && freq <=12100e6) {
+    if (lmx_freq >=11900e6 && lmx_freq <=12100e6) {
         vco_daciset_strt = 300;
         vco_core = 4;
         vco_cap_ctrl_strt = 1;
     }
-    vco_cap_ctrl_strt = round(c_core_min - (c_core_min - c_core_max) * (freq - f_coremin) / (f_coremax - f_coremin));
-    vco_daciset_strt = round(a_core_min + (a_core_min - a_core_max) * (freq - f_coremin) / (f_coremax - f_coremin));
+    vco_cap_ctrl_strt = round(c_core_min - (c_core_min - c_core_max) * (lmx_freq - f_coremin) / (f_coremax - f_coremin));
+    vco_daciset_strt = round(a_core_min + (a_core_min - a_core_max) * (lmx_freq - f_coremin) / (f_coremax - f_coremin));
     
-    printf("VCO_CORE = %d\n", vco_core);
-    printf("VCO_CAP_CTRL_STR = %d\n", vco_cap_ctrl_strt);
-    printf("VCO_DACISET_STR = %d\n", vco_daciset_strt);
+    // printf("VCO_CORE = %d\n", vco_core);
+    // printf("VCO_CAP_CTRL_STR = %d\n", vco_cap_ctrl_strt);
+    // printf("VCO_DACISET_STR = %d\n", vco_daciset_strt);
 
     //Set the VCO_CORE 
     lmx2594regs[112 - VCO_SEL] = lmx2594regs[112 - VCO_SEL] & (~BITM_LMX2594_R20_VCO_SEL);
@@ -488,12 +274,12 @@ int lmx_freq_set_main_band_int_mode(void *bar1, double freq, double f_pd) {
     lmx2594regs[112 - VCO_DACISET] = lmx2594regs[112 - VCO_DACISET] | (vco_daciset_strt << BITP_LMX2594_R17_VCO_DACISET);
 
     // Set the PF_DLY_SEL
-    if (freq <= 12500e6) {
+    if (lmx_freq <= 12500e6) {
         lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
         lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] | (0x1 << BITP_LMX2594_R37_PFD_DLY_SEL);
         printf("PFD_DLY_SEL = %d\n", 1);
     }
-    else if (freq > 12500e6) {
+    else if (lmx_freq > 12500e6) {
         lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
         lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] | (0x2 << BITP_LMX2594_R37_PFD_DLY_SEL);
         printf("PFD_DLY_SEL = %d\n", 2);
@@ -577,37 +363,29 @@ int lmx_freq_set_main_band_int_mode(void *bar1, double freq, double f_pd) {
         uint32_t *data_ptr = bar1 + LMX_BASE_ADDR;
         *data_ptr = lmx_change_freq_regs[i];
     }
-    char filename[100];
-    sprintf(filename, "%f.txt", freq);
-    FILE * f = fopen(filename, "w");
-    for (int i = 0; i < sizeof(lmx2594regs) / 4; i++) {
-        fprintf(f, "0x%08X\n", lmx2594regs[i]);
-    }
-    fclose(f);
+    // char filename[100];
+    // sprintf(filename, "%f.txt", lmx_freq);
+    // FILE * f = fopen(filename, "w");
+    // for (int i = 0; i < sizeof(lmx2594regs) / 4; i++) {
+    //     fprintf(f, "0x%08X\n", lmx2594regs[i]);
+    // }
+    // fclose(f);
 
-    printf("N_div = %f\n", N_div);
-    printf("N = %d\n", N);
-    printf("f_vco = %f\n", freq);
-    printf("SEG1_EN %08X\n",lmx2594regs[112 - CHDIV_DIV2]);
+    // printf("N_div = %f\n", N_div);
+    // printf("N = %d\n", N);
+    // printf("f_vco = %f\n", lmx_freq);
+    // printf("SEG1_EN %08X\n",lmx2594regs[112 - CHDIV_DIV2]);
 
     return 0;
 
 }
 
-int lmx_freq_set_out_of_band(void *bar1, double freq, double f_pd) {
-
-    if (freq >= 10e6 && freq <= 1000e6) {
-        lmx_freq = lmx_lower_bond_set(freq, f_pd);
-    }
-    else {
-        lmx_freq = freq;
-    }
+int lmx_freq_set_out_of_band_int_mode(void *bar1, double lmx_freq, double f_pd) {
 
     double f_vco = 2 * lmx_freq;
     int chan_div = 2;
     uint8_t ch_div_reg = 0; // 2
     double vco_div = 7.5e9 / lmx_freq;
-    double N_div;
 
     int vco_core;
     double f_coremin;
@@ -623,364 +401,7 @@ int lmx_freq_set_out_of_band(void *bar1, double freq, double f_pd) {
     if (f_vco < 7.5e9) {
         if (vco_div > 2 && vco_div <= 4)
             chan_div = 4;  // 4
-        f_vco = lmx_freq * chan_div;
-        if (vco_div > 4 && vco_div <= 6) {
-            chan_div = 6;  // 6
-            f_vco = lmx_freq * chan_div;
-        }
-        if (vco_div > 6 && vco_div <= 8) {
-            chan_div = 8;  // 8
-            f_vco = lmx_freq * chan_div;
-        }
-        if (vco_div > 8 && vco_div <= 12) {
-            chan_div = 12;  // 12
-            f_vco = lmx_freq * chan_div;
-        }
-        if (vco_div > 12 && vco_div <= 16) {
-            chan_div = 16;  // 16
-            f_vco = lmx_freq * chan_div;
-        }
-        if (vco_div > 16 && vco_div <= 24) {
-            chan_div = 24;  // 24
-            f_vco = lmx_freq * chan_div;
-        }
-        if (vco_div > 24 && vco_div <= 32) {
-            chan_div = 32;  // 32
-            f_vco = lmx_freq * chan_div;
-        }
-        if (vco_div > 32 && vco_div <= 48) {
-            chan_div = 48;  // 48
             f_vco = lmx_freq * chan_div;
-        }
-        if (vco_div > 48 && vco_div <= 64) {
-            chan_div = 64;  // 64
-            f_vco = lmx_freq * chan_div;
-        }
-        if (vco_div > 64 && vco_div <= 72) {
-            chan_div = 72;  // 72
-            f_vco = lmx_freq * chan_div;
-        }
-        if (vco_div > 72 && vco_div <= 96) {
-            chan_div = 96;  // 96
-            f_vco = lmx_freq * chan_div;
-        }
-        if (vco_div > 96 && vco_div <= 128) {
-            chan_div = 128;  // 128
-            f_vco = lmx_freq * chan_div;
-        }
-        if (vco_div > 128 && vco_div <= 192) {
-            chan_div = 192;  // 192
-            f_vco = lmx_freq * chan_div;
-        }
-        if (vco_div > 192 && vco_div <= 256) {
-            chan_div = 256;  // 256
-            f_vco = lmx_freq * chan_div;
-        }
-        if (vco_div > 256 && vco_div <= 384) {
-            chan_div = 384;  // 384
-            f_vco = lmx_freq * chan_div;
-        }
-        if (vco_div > 384 && vco_div <= 512) {
-            chan_div = 512;  // 512
-            f_vco = lmx_freq * chan_div;
-        }
-        if (vco_div > 512 && vco_div <= 768) {
-            chan_div = 768;  // 768
-            f_vco = lmx_freq * chan_div;
-        }
-
-        switch (chan_div) {
-            case 2:
-                ch_div_reg = 0;
-                break;
-            case 4:
-                ch_div_reg = 1;
-                break;
-            case 6:
-                ch_div_reg = 2;
-                break;
-            case 8:
-                ch_div_reg = 3;
-                break;
-            case 12:
-                ch_div_reg = 4;
-                break;
-            case 16:
-                ch_div_reg = 5;
-                break;
-            case 24:
-                ch_div_reg = 6;
-                break;
-            case 32:
-                ch_div_reg = 7;
-                break;
-            case 48:
-                ch_div_reg = 8;
-                break;
-            case 64:
-                ch_div_reg = 9;
-                break;
-            case 72:
-                ch_div_reg = 10;
-                break;
-            case 96:
-                ch_div_reg = 11;
-                break;
-            case 128:
-                ch_div_reg = 12;
-                break;
-            case 192:
-                ch_div_reg = 13;
-                break;
-            case 256:
-                ch_div_reg = 14;
-                break;
-            case 384:
-                ch_div_reg = 15;
-                break;
-            case 512:
-                ch_div_reg = 16;
-                break;
-            case 768:
-                ch_div_reg = 17;
-                break;
-        }
-    } else {
-        ch_div_reg = 0;
-        f_vco = lmx_freq * 2;
-    }
-    N_div = f_vco / f_pd;
-
-    // divide whole part and fractional part
-    uint32_t N = (uint32_t) N_div;
-    uint32_t frac_n = (uint32_t) ((N_div - N) * (4294967295-1));
-    uint32_t frac_d = 4294967295-1;
-    // If frac part is 0 then the denominator is 1000 and numerator is 0
-    if (frac_n == 0) {
-        frac_n = 0;
-        frac_d = 1000;
-    }
-    // Partial assist for the calibration
-
-    //Determine a VCO core and other parameters
-
-    if (f_vco >= 7500e6 && f_vco <= 8600e6) {
-        vco_core = 1;
-        f_coremin = 7500e6;
-        f_coremax = 8600e6;
-        c_core_min = 164;
-        c_core_max = 12;
-        a_core_min = 299;
-        a_core_max = 240;
-    }
-    else if (f_vco > 8600e6 && f_vco < 9800e6) {
-        vco_core = 2;
-        f_coremin = 8600e6;
-        f_coremax = 9800e6;
-        c_core_min = 165;
-        c_core_max = 16;
-        a_core_min = 356;
-        a_core_max = 247;
-    }
-    else if (f_vco >= 9800e6 && f_vco <= 10800e6) {
-        vco_core = 3;
-        f_coremin = 9800e6;
-        f_coremax = 10800e6;
-        c_core_min = 158;
-        c_core_max = 19;
-        a_core_min = 324;
-        a_core_max = 224;
-    }
-    else if (f_vco > 10800e6 && f_vco <= 12000e6) {
-        vco_core = 4;
-        f_coremin = 10800e6;
-        f_coremax = 12000e6;
-        c_core_min = 140;
-        c_core_max = 0;
-        a_core_min = 383;
-        a_core_max = 244;
-    }
-    else if (f_vco > 12000e6 && f_vco <= 12900e6) {
-        vco_core = 5;
-        f_coremin = 12000e6;
-        f_coremax = 12900e6;
-        c_core_min = 183;
-        c_core_max = 36;
-        a_core_min = 205;
-        a_core_max = 146;
-    }
-    else if (f_vco > 12900e6 && f_vco <= 13900e6) {
-        vco_core = 6;
-        f_coremin = 12900e6;
-        f_coremax = 13900e6;
-        c_core_min = 155;
-        c_core_max = 6;
-        a_core_min = 242;
-        a_core_max = 163;
-    }
-    else if (f_vco > 13900e6 && f_vco <= 15000e6) {
-        vco_core = 7;
-        f_coremin = 13900e6;
-        f_coremax = 15000e6;
-        c_core_min = 175;
-        c_core_max = 19;
-        a_core_min = 323;
-        a_core_max = 244;
-    };
-
-    vco_cap_ctrl_strt = round(c_core_min - (c_core_min - c_core_max) * (f_vco - f_coremin) / (f_coremax - f_coremin));
-    vco_daciset_strt = round(a_core_min + (a_core_min - a_core_max) * (f_vco - f_coremin) / (f_coremax - f_coremin));
-   
-    if (f_vco >=11900e6 && f_vco <=12100e6) {
-        vco_daciset_strt = 300;
-        vco_core = 4;
-        vco_cap_ctrl_strt = 1;
-    }
-     printf("VCO_CORE = %d\n", vco_core);
-     printf("VCO_CAP_CTRL_STR = %d\n", vco_cap_ctrl_strt);
-     printf("VCO_DACISET_STR = %d\n", vco_daciset_strt);
-
-    // Calibration assist 
-    //Set the VCO_CORE 
-    lmx2594regs[112 - VCO_SEL] = lmx2594regs[112 - VCO_SEL] & (~BITM_LMX2594_R20_VCO_SEL);
-    lmx2594regs[112 - VCO_SEL] = lmx2594regs[112 - VCO_SEL] | (vco_core << BITP_LMX2594_R20_VCO_SEL);
-    // Set the VCO_CAP_CTRL_START
-    lmx2594regs[112 - CAP_CTRL_START] = lmx2594regs[112 - CAP_CTRL_START] & (~BITM_LMX2594_R78_VCO_CAP_CTRL_START);
-    lmx2594regs[112 - CAP_CTRL_START] = lmx2594regs[112 - CAP_CTRL_START] | (vco_cap_ctrl_strt << BITP_LMX2594_R78_VCO_CAP_CTRL_START);
-    // Set the VCO_DACISET
-    lmx2594regs[112 - VCO_DACISET] = lmx2594regs[112 - VCO_DACISET] & (~BITM_LMX2594_R17_VCO_DACISET);
-    lmx2594regs[112 - VCO_DACISET] = lmx2594regs[112 - VCO_DACISET] | (vco_daciset_strt << BITP_LMX2594_R17_VCO_DACISET);
-
-    lmx2594regs[112 - MASH_ORDER] = lmx2594regs[112 - MASH_ORDER] & (~BITM_LMX2594_R44_MASH_ORDER);
-    // Set the MASH_ORDER to 3
-    lmx2594regs[112 - MASH_ORDER] = lmx2594regs[112 - MASH_ORDER] | ENUM_LMX2594_R44_MASH_ORDER_3;
-    // Set PF_DLY_SEL to appropriate value
-    if (f_vco <=10e9){
-        lmx2594regs[112 - PFD_DLY_SEL] = lmx2594regs[112 - PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
-        lmx2594regs[112 - PFD_DLY_SEL] = lmx2594regs[112 - PFD_DLY_SEL] | (0x3 << BITP_LMX2594_R37_PFD_DLY_SEL);
-        printf("PFD_DLY_SEL = %d\n", 3);
-    }
-    else if (f_vco > 10e9) {
-        lmx2594regs[112 - PFD_DLY_SEL] = lmx2594regs[112 - PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
-        lmx2594regs[112 - PFD_DLY_SEL] = lmx2594regs[112 - PFD_DLY_SEL] | (0x4 << BITP_LMX2594_R37_PFD_DLY_SEL);
-        printf("PFD_DLY_SEL = %d\n", 4);
-    }
-    lmx2594regs[112 - PLL_N_S] = lmx2594regs[112 - PLL_N_S] & (~0xFFFF);
-    lmx2594regs[112 - PLL_N_S] = lmx2594regs[112 - PLL_N_S] | (N >> 16);
-    //CLear the lower 16 bits of the register
-    lmx2594regs[112 - PLL_N_M] = lmx2594regs[112 - PLL_N_M] & (~0xFFFF);
-    // Next 16 bits of the register
-    lmx2594regs[112 - PLL_N_M] = lmx2594regs[112 - PLL_N_M] | (N & 0xFFFF);
-    // Clear the upper 16 bits of the register lmx2594regs[PLL_NUM_S]
-    lmx2594regs[112 - PLL_NUM_S] = lmx2594regs[112 - PLL_NUM_S] & (~0xFFFF);
-    lmx2594regs[112 - PLL_NUM_S] = lmx2594regs[112 - PLL_NUM_S] | (frac_n >> 16);
-    // Clear the lower 16 bits of the register lmx2594regs[PLL_NUM_M]
-    lmx2594regs[112 - PLL_NUM_M] = lmx2594regs[112 - PLL_NUM_M] & (~0xFFFF);
-    // Next 16 bits of the numerator
-    lmx2594regs[112 - PLL_NUM_M] = lmx2594regs[112 - PLL_NUM_M] | (frac_n & 0xFFFF);
-    // Clear the upper 16 bits of the register lmx2594regs[PLL_DEN_S]
-    lmx2594regs[112 - PLL_DEN_S] = lmx2594regs[112 - PLL_DEN_S] & (~0xFFFF);
-    // most significant 16 bits of the denominator
-    lmx2594regs[112 - PLL_DEN_S] = lmx2594regs[112 - PLL_DEN_S] | (frac_d >> 16);
-    // Clear the lower 16 bits of the register lmx2594regs[PLL_DEN_M]
-    lmx2594regs[112 - PLL_DEN_M] = lmx2594regs[112 - PLL_DEN_M] & (~0xFFFF);
-    // Next 16 bits of the denominator
-    lmx2594regs[112 - PLL_DEN_M] = lmx2594regs[112 - PLL_DEN_M] | (frac_d & 0xFFFF);
-    // Program the CHDIV value
-    lmx2594regs[112 - CHDIV] = lmx2594regs[112 - CHDIV] & (~BITM_LMX2594_R75_CHDIV);
-    // Set the CHDIV value with the starting position BITP_LMX2594_R75_CHDIV
-    lmx2594regs[112 - CHDIV] = lmx2594regs[112 - CHDIV] | (ch_div_reg << BITP_LMX2594_R75_CHDIV);
-    // If the ch_div > 2 then set the SEG1_EN bit
-    if (chan_div > 2) {
-        lmx2594regs[112 - CHDIV_DIV2] = lmx2594regs[112 - CHDIV_DIV2] & (~BITM_LMX2594_R31_CHDIV_DIV2);
-        lmx2594regs[112 - CHDIV_DIV2] = lmx2594regs[112 - CHDIV_DIV2] | (ENUM_LMX2594_R31_CHDIV_DIV2_EN);
-    }
-    else {
-        lmx2594regs[112-CHDIV_DIV2] =  lmx2594regs[112 - CHDIV_DIV2] & (~BITM_LMX2594_R31_CHDIV_DIV2);
-    }
-    // Set the OUTA_MUX to channel divider R45[12:11]; 0 - Channel divider, 1 - VCO;
-    lmx2594regs[112 - OUTA_MUX] = lmx2594regs[112 - OUTA_MUX] & (~BITM_LMX2594_R45_OUTA_MUX);
-    lmx2594regs[112 - OUTA_MUX] = lmx2594regs[112 - OUTA_MUX] | ENUM_LMX2594_R45_OUTA_MUX_CH_DIV;
-
-    // Program the FCAL_EN bit
-    lmx2594regs[112 - FCAL_ADDR] = lmx2594regs[112 - FCAL_ADDR] | (LMX2594_R0_FCAL_EN);
-
-    uint32_t lmx_change_freq_regs[] = {
-            lmx2594regs[112-CPG_REG] = (lmx2594regs[112-CPG_REG] & (~BITM_LMX2594_R14_CPG)) | ENUM_LMX2594_R14_CPG_TRISTATE,
-            lmx2594regs[112 - VCO_SEL],
-            lmx2594regs[112 - CAP_CTRL_START],
-            lmx2594regs[112 - VCO_DACISET],
-            lmx2594regs[112-MASH_ORDER],
-            lmx2594regs[112-PFD_DLY_SEL],
-            lmx2594regs[112 - PLL_N_S],
-            lmx2594regs[112 - PLL_N_M],
-            lmx2594regs[112 - PLL_DEN_S],
-            lmx2594regs[112 - PLL_DEN_M],
-            lmx2594regs[112 - PLL_NUM_S],
-            lmx2594regs[112 - PLL_NUM_M],
-            lmx2594regs[112 - CHDIV],
-            lmx2594regs[112 - CHDIV_DIV2],
-            lmx2594regs[112 - OUTA_MUX],
-            lmx2594regs[112-CPG_REG] = (lmx2594regs[112-CPG_REG] & (~BITM_LMX2594_R14_CPG)) | ENUM_LMX2594_R14_CPG_15ma,
-            lmx2594regs[112 - FCAL_ADDR]
-    };
-    // Create a header for the LMX2594 with the appropriate number of words
-    uint32_t LMX_HEADER = ((0 << 23) | (DeviceIdLmx2594 << 18) | ((sizeof(lmx_change_freq_regs) / 4) << 1) | 1);
-    uint32_t *ptr = bar1 + LMX_BASE_ADDR;
-    *ptr = LMX_HEADER;
-    // Send the data
-    for (int i = 0; i < sizeof(lmx_change_freq_regs) / 4; i++) {
-        uint32_t *data_ptr = bar1 + LMX_BASE_ADDR;
-        *data_ptr = lmx_change_freq_regs[i];
-    }
-    char filename[100];
-    sprintf(filename, "%f.txt", freq);
-    FILE * f = fopen(filename, "w");
-    for (int i = 0; i < sizeof(lmx2594regs) / 4; i++) {
-        fprintf(f, "0x%08X\n", lmx2594regs[i]);
-    }
-    fclose(f);
-    printf("N_div = %f\n", N_div);
-    printf("f_vco = %f\n", f_vco);
-    printf("SEG1_EN %08X\n",lmx2594regs[112 - CHDIV_DIV2]);
-    printf("N = %d\n", N);
-    printf("frac_n = %u\n", frac_n);
-    printf("frac_d = %u\n", frac_d);
-    printf("chan_div = %d\n", chan_div);
-    printf("chan_div_reg = %d\n", ch_div_reg);
-    printf("LMX2594 Registers\n");
-    return 0;
-}
-
-int lmx_freq_set_out_of_band_int_mode(void *bar1, double freq, double f_pd) {
-
-    if (freq >= 10e6 && freq <= 1000e6) {
-        lmx_freq = lmx_lower_bond_set(freq, f_pd);
-    }
-    else {
-        lmx_freq = freq;
-    }
-
-    double f_vco = 2 * lmx_freq;
-    int chan_div = 2;
-    uint8_t ch_div_reg = 0; // 2
-    double vco_div = 7.5e9 / lmx_freq;
-
-    int vco_core;
-    double f_coremin;
-    double f_coremax;
-    int c_core_min;
-    int c_core_max;
-    int a_core_min;
-    int a_core_max;
-    uint16_t vco_cap_ctrl_strt;
-    uint16_t vco_daciset_strt;
-
-    // minimum N_div value is 28 and Vco frequency can't be less than 7.5 GHz
-    if (f_vco < 7.5e9) {
-        if (vco_div > 2 && vco_div <= 4)
-            chan_div = 4;  // 4
-        f_vco = lmx_freq * chan_div;
         if (vco_div > 4 && vco_div <= 6) {
             chan_div = 6;  // 6
             f_vco = lmx_freq * chan_div;
@@ -1117,8 +538,6 @@ int lmx_freq_set_out_of_band_int_mode(void *bar1, double freq, double f_pd) {
             N = 32;
         }
     };
-
-
     // Partial assist for the calibration
 
     //Determine a VCO core and other parameters
@@ -1195,9 +614,9 @@ int lmx_freq_set_out_of_band_int_mode(void *bar1, double freq, double f_pd) {
         vco_core = 4;
         vco_cap_ctrl_strt = 1;
     }
-     printf("VCO_CORE = %d\n", vco_core);
-     printf("VCO_CAP_CTRL_STR = %d\n", vco_cap_ctrl_strt);
-     printf("VCO_DACISET_STR = %d\n", vco_daciset_strt);
+    //  printf("VCO_CORE = %d\n", vco_core);
+    //  printf("VCO_CAP_CTRL_STR = %d\n", vco_cap_ctrl_strt);
+    //  printf("VCO_DACISET_STR = %d\n", vco_daciset_strt);
 
     // Calibration assist 
     //Set the VCO_CORE 
@@ -1214,12 +633,12 @@ int lmx_freq_set_out_of_band_int_mode(void *bar1, double freq, double f_pd) {
     if (f_vco <= 12500e6) {
         lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
         lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] | (0x1 << BITP_LMX2594_R37_PFD_DLY_SEL);
-        printf("PFD_DLY_SEL = %d\n", 1);
+        // printf("PFD_DLY_SEL = %d\n", 1);
     }
     else if (f_vco > 12500e6) {
         lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] & (~BITM_LMX2594_R37_PFD_DLY_SEL);
         lmx2594regs[112-PFD_DLY_SEL] = lmx2594regs[112-PFD_DLY_SEL] | (0x2 << BITP_LMX2594_R37_PFD_DLY_SEL);
-        printf("PFD_DLY_SEL = %d\n", 2);
+        // printf("PFD_DLY_SEL = %d\n", 2);
     }
     if (f_pd <= 100e6) {
         lmx2594regs[112-FCAL_ADDR] = lmx2594regs[112-FCAL_ADDR] & (~BITM_LMX2594_RO_FCAL_HPFD_ADJ);
@@ -1313,18 +732,18 @@ int lmx_freq_set_out_of_band_int_mode(void *bar1, double freq, double f_pd) {
         uint32_t *data_ptr = bar1 + LMX_BASE_ADDR;
         *data_ptr = lmx_change_freq_regs[i];
     }
-    char filename[100];
-    sprintf(filename, "%f.txt", freq);
-    FILE * f = fopen(filename, "w");
-    for (int i = 0; i < sizeof(lmx2594regs) / 4; i++) {
-        fprintf(f, "0x%08X\n", lmx2594regs[i]);
-    }
-    fclose(f);
-    printf("N_div = %f\n", N_div);
-    printf("f_vco = %f\n", f_vco);
-    printf("N = %d\n", N);
-    printf("chan_div = %d\n", chan_div);
-    printf("chan_div_reg = %d\n", ch_div_reg);
+    // char filename[100];
+    // sprintf(filename, "%f.txt", lmx_freq);
+    // FILE * f = fopen(filename, "w");
+    // for (int i = 0; i < sizeof(lmx2594regs) / 4; i++) {
+    //     fprintf(f, "0x%08X\n", lmx2594regs[i]);
+    // }
+    // fclose(f);
+    // printf("N_div = %f\n", N_div);
+    // printf("f_vco = %f\n", f_vco);
+    // printf("N = %d\n", N);
+    // printf("chan_div = %d\n", chan_div);
+    // printf("chan_div_reg = %d\n", ch_div_reg);
     return 0;
 }
 
@@ -1337,35 +756,54 @@ double lmx_lower_bond_set (double freq, double f_pd) {
     return lmx_req_freq;
 }
 
+double lmx_get_freq(double freq) {
+    
+    if (freq >= 100e3 && freq <= 1000e6) {
+        double f_max2870 = 4e9;
+        double lmx_freq = f_max2870-freq; // 4 GHz - freq
+        return lmx_freq;
+    }
+    else if (freq > 1000e6 && freq <= 15e9) {
+        return freq;
+    }
+    else if (freq > 15e9 && freq <=27e9) {
+        return freq/2;
+    }
+    else if (freq > 27e9 && freq <= 45e9) {
+        return freq/4;
+    }
+}
+
 
 int lmx_freq_set(void *bar1, double freq,double f_pd) {
 
-    // double f_pd = 175e6;
     // Set the 4 Mosi mode
     usleep(1);
-    uint32_t *spi_mode = bar1 +RST_ADDR;
-    *spi_mode = SPI_MODE_4MOSI;
+    uint32_t cfg_reg = get_cfg_reg();
+    SET_REGISTER_PARAM(cfg_reg,CFG_REG_SPI_MODE_BITM,CFG_REG_SPI_MODE_BITP, CFG_REG_SPI_MODE_4MOSI); 
+    uint32_t *spi_mode = bar1 +CFG_REG_ADDR;
+    *spi_mode = cfg_reg;
     usleep(1);
-    *spi_mode = SPI_MODE_4MOSI | TMSG_RST_ON;
+    *spi_mode = SET_REGISTER_PARAM(cfg_reg,CFG_REG_RST_FOR_FPGA_BITM, CFG_REG_RST_FOR_FPGA_BITP,CFG_REG_RST_FOR_FPGA_ON);
     usleep(1);
-    *spi_mode = SPI_MODE_4MOSI | TMSG_RST_OFF;
-    double N_div = 0;
-    if (freq < 10e6 || freq > 15e9) {
-        printf("Frequency range is 10 MHz to 15 GHz\n");
+    *spi_mode = SET_REGISTER_PARAM(cfg_reg,CFG_REG_RST_FOR_FPGA_BITM, CFG_REG_RST_FOR_FPGA_BITP,CFG_REG_RST_FOR_FPGA_OFF);
+    if (freq < 100e3 || freq > 45e9) {
+        printf("Frequency range is 100 kHz to 45 GHz\n");
         return -1;
     }
+    double lmx_freq = lmx_get_freq(freq);
     // if the frequency is in the main band - 7.5 GHz to 15 GHz
-    if (freq >= 7.5e9 && freq <= 15e9) {
+    if (lmx_freq >= 7.5e9 && lmx_freq <= 15e9) {
         // lmx_freq_set_main_band(bar1, freq, f_pd);
-        lmx_freq_set_main_band_int_mode(bar1, freq, f_pd);
+        lmx_freq_set_main_band_int_mode(bar1, lmx_freq, f_pd);
     }
-    else if (freq < 7.5e9) {
+    else if (lmx_freq < 7.5e9) {
         // lmx_freq_set_out_of_band(bar1, freq, f_pd);
-        lmx_freq_set_out_of_band_int_mode(bar1, freq, f_pd);
+        lmx_freq_set_out_of_band_int_mode(bar1, lmx_freq, f_pd);
     }
     // Return the 1 MOSI mode
     usleep(1);
-    *spi_mode = SPI_MODE_1MOSI;
+    *spi_mode = SET_REGISTER_PARAM(cfg_reg,CFG_REG_SPI_MODE_BITM,CFG_REG_SPI_MODE_BITP, CFG_REG_SPI_MODE_1MOSI);
     // Switch the keys 
      usleep(1);
     key_switch(bar1, freq,lmx_freq);

Devices/lmx2594.h

@@ -16,6 +16,7 @@ int lmx_freq_set_out_of_band(void *bar1, double freq, double f_pd);
 int lmx_freq_set_out_of_band_int_mode(void *bar1, double freq, double f_pd);
 
 double lmx_lower_bond_set (double freq, double f_pd);
+double lmx_get_freq(double freq);
 int lmx_freq_set(void *bar1, double freq,double f_pd);
 uint32_t lmx_ld_status(void *bar1);
 

Devices/tmsgheaders.h

@@ -299,12 +299,14 @@
 #define    CFG_REG_MOD_CMD_REG_BITP             2
 #define    CFG_REG_LR_GPIO_BITP                 3
 #define    CFG_REG_HR_GPIO_BITP                 4
+#define    CFG_REG_SPI_MODE_BITP                5
 
 #define    CFG_REG_RST_FOR_FPGA_BITM            (0x1 << CFG_REG_RST_FOR_FPGA_BITP)
 #define    CFG_REG_WIDTH_SPI_TMSG_BITM          (0x1 << CFG_REG_WIDTH_SPI_TMSG_BITP)
 #define    CFG_REG_MOD_CMD_REG_BITM             (0x1 << CFG_REG_MOD_CMD_REG_BITP)
 #define    CFG_REG_LR_GPIO_BITM                 (0x1 << CFG_REG_LR_GPIO_BITP)
 #define    CFG_REG_HR_GPIO_BITM                 (0x1 << CFG_REG_HR_GPIO_BITP)
+#define    CFG_REG_SPI_MODE_BITM                (0x1 << CFG_REG_SPI_MODE_BITP)
 
 #define    CFG_REG_RST_FOR_FPGA_ON              0x1
 #define    CFG_REG_RST_FOR_FPGA_OFF             0x0
@@ -321,6 +323,9 @@
 #define    CFG_REG_HR_GPIO_0                    (0x0 << CFG_REG_HR_GPIO_BITP)
 #define    CFG_REG_HR_GPIO_1                    (0x1 << CFG_REG_HR_GPIO_BITP)
 
+#define    CFG_REG_SPI_MODE_1MOSI               (0x0 << CFG_REG_SPI_MODE_BITP)
+#define    CFG_REG_SPI_MODE_4MOSI               (0x1 << CFG_REG_SPI_MODE_BITP)
+
 #define    LMX_BASE_ADDR            0x04
 
 void rst_for_fpga(void *bar1);