lmk04821.h 3.2 KB

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  1. #ifndef LMK04821_H
  2. #define LMK04821_H
  3. //#include "tmsgheaders.h"
  4. #include <stdint.h>
  5. #include <unistd.h>
  6. #include <stdio.h>
  7. #include "pci.h"
  8. #define LMK_COUNT 129
  9. #define LMK_TOTAL_COUNT 131
  10. /* Header for the BochV3 FPGA */
  11. /* 1-MOSI */
  12. /* Device ID's */
  13. #define DEVICE_ID_BITP 18
  14. #define DEVICE_ID_BITM (0x1F << DEVICE_ID_BITP)
  15. #define DEVICE_ID_LMK_A 0x0
  16. #define DEVICE_ID_LMK_B 0x1
  17. #define DEVICE_ID_CP2444 0x2
  18. #define DEVICE_ID_HUB_TFE 0x3
  19. #define DEVICE_ID_FLASH 0x4
  20. /* Word Counter */
  21. #define MOSI1_WORD_NUM_BITP 1
  22. #define MOSI1_WORD_NUM_BITM (1FFFF << MOSI1_WORD_NUM_BITP)
  23. /* 4-MOSI */
  24. #define CTRL_COLD_PART_BITP 18
  25. #define CTRL_COLD_PART_BITM (0xF << CTRL_COLD_PART_BITP)
  26. #define TFE_2B_BITP 17
  27. #define TFE_2B_BITM (0x1 << TFE_2B_BITP)
  28. #define TFE_4B_BITP 15
  29. #define TFE_4B_BITM (0x3 << TFE_4B_BITP)
  30. #define TFE_7B_BITP 13
  31. #define TFE_7B_BITM (0x3 << TFE_7B_BITP)
  32. #define TFE_6B_BITP 11
  33. #define TFE_6B_BITM (0x3 << TFE_6B_BITP)
  34. #define BOCHV3_MODE_BITP 23
  35. #define BOCHV3_MODE_BITM (0x1 << BOCHV3_MODE_BITP)
  36. #define BOCHV3_TERM_BITP 0
  37. #define BOCHV3_TERM_BITM (0x1 << BOCHV3_TERM_BITP)
  38. #define BOCHV3_MODE_4MOSI (0x1 << BOCHV3_MODE_BITP)
  39. #define BOCHV3_MODE_1M0SI (0x0 << BOCHV3_MODE_BITP)
  40. #define BOCHV3_TERM_ON (0x1 << BOCHV3_TERM_BITP)
  41. /* Header for the Cp2444v1 FPGA */
  42. /* 1-MOSI */
  43. /* Device ID's */
  44. #define DEVICE_ID_SW_P1_ 0x0
  45. #define DEVICE_ID_ATT_P1 0x1
  46. #define DEVICE_ID_ATT_P2 0x2
  47. #define DEVICE_ID_ATT_P3 0x3
  48. #define DEVICE_ID_ATT_P4 0x4
  49. #define DEVICE_ID_GPIO 0x5
  50. #define CP2444v1_MODE_BITP 23
  51. #define CP2444v1_MODE_BITM (0x1 << CP2444v1_MODE_BITP)
  52. #define CP2444v1_TERM_BITP 0
  53. #define CP2444v1_TERM_BITM (0x1 << CP2444v1_TERM_BITP)
  54. #define ENUM_CP2444v1_MODE_4MOSI (0x1 << CP2444v1_MODE_BITP)
  55. #define ENUN_CP2444v1_MODE_1M0SI (0x0 << CP2444v1_MODE_BITP)
  56. #define ENUM_CP2444v1_TERM_ON (0x1 << CP2444v1_TERM_BITP)
  57. #define CP2444v1_GPIO_BITP 22
  58. #define CP2444v1_GPIO_BITM (0x1 << CP2444v1_GPIO_BITP)
  59. #define CP2444v1_SW_P1_BITP 21
  60. #define CP2444v1_SW_P1_BITM (0x1 << CP2444v1_SW_P1_BITP)
  61. #define CP2444v1_ATT_P1_BITP 20
  62. #define CP2444v1_ATT_P1_BITM (0x1 << CP2444v1_ATT_P1_BITP)
  63. #define CP2444v1_ATT_P2_BITP 19
  64. #define CP2444v1_ATT_P2_BITM (0x1 << CP2444v1_ATT_P2_BITP)
  65. #define CP2444v1_ATT_P3_BITP 18
  66. #define CP2444v1_ATT_P3_BITM (0x1 << CP2444v1_ATT_P3_BITP)
  67. #define CP2444v1_ATT_P4_BITP 17
  68. #define CP2444v1_ATT_P4_BITM (0x1 << CP2444v1_ATT_P4_BITP)
  69. #define CP2444v1_QSPI_MAX_WORD_NUM 0x6
  70. void lmk04821_a_init(reg_addr_pci* pci_bar_1);
  71. void lmk04821_b_init(reg_addr_pci* pci_bar_1);
  72. void lmk04821_a_init_boch_v3(reg_addr_pci* pci_bar_1);
  73. void lmk04821_b_init_boch_v3(reg_addr_pci* pci_bar_1);
  74. void cp2444_test(reg_addr_pci* pci_bar_1);
  75. #endif //LMK04821_H