FifoTx ip unlock

sources_1/new/CDC/Cdc.v

@@ -225,7 +225,6 @@ assign Spi6CsCtrl_o = spi6CsCtrl_c[STAGES*WIDTH-1:(STAGES-1)*WIDTH];
 assign Spi6TxFifoCtrl_o = spi6TxFifoCtrl_c[STAGES*WIDTH-1:(STAGES-1)*WIDTH];
 assign Spi6RxFifoCtrl_o = spi6RxFifoCtrl_c[STAGES*WIDTH-1:(STAGES-1)*WIDTH];
 
-
 always @(posedge ClkFast_i) begin
     spi0Ctrl <= Spi0Ctrl_i;
     spi0CsDelay <= Spi0CsDelay_i;
@@ -264,10 +263,6 @@ always @(posedge ClkFast_i) begin
     spi6RxFifoCtrl <= Spi6RxFifoCtrl_i;
 end
 
-
-
-
-
 always @(posedge ClkSlow_i[0]) begin 
     spi0Ctrl_c <= {spi0Ctrl_c[(STAGES-1)*WIDTH-1:0],spi0Ctrl};
     spi0CsDelay_c <= {spi0CsDelay_c[(STAGES-1)*WIDTH-1:0],spi0CsDelay};
@@ -324,8 +319,4 @@ always@(posedge ClkSlow_i[6]) begin
     spi6RxFifoCtrl_c <= {spi6RxFifoCtrl_c[(STAGES-1)*WIDTH-1:0],spi6RxFifoCtrl};
 end
 
-
-
-
-
 endmodule

sources_1/new/QuadSPI/QuadSPIs.v

@@ -167,9 +167,7 @@ always @(posedge Clk_i) begin
         DebugData_o <= 192'h0;
     end
     else begin 
-        if (ssReg && !ssRegR) begin 
-            DebugData_o <= {shiftReg0Debug,shiftReg1Debug, shiftReg2Debug,shiftReg3Debug};
-        end
+        DebugData_o <= {shiftReg0Debug,shiftReg1Debug, shiftReg2Debug,shiftReg3Debug};
     end
 end
 

sources_1/new/S5443_3Top.v

@@ -518,7 +518,7 @@ module S5443_3Top
     assign SpiDir_o[2] = (spiMode[2])? 1'b1 : 1'b0 ;
     assign SpiDir_o[3] = (spiMode[3])? 1'b1 : 1'b0 ;
     assign SpiDir_o[4] = (spiMode[4])? 1'b1 : 1'b0 ;
-    assign SpiDir_o[5] = (spiMode[5])? 1'b1 : 1'b0 ;
+    assign SpiDir_o[5] = 1'b1;
     assign SpiDir_o[6] = (spiMode[6])? 1'b1 : 1'b0 ;
     
     assign sckMuxed[0] =  (spiMode[0])?sckQ[0]:sckR[0];
@@ -958,17 +958,22 @@ module S5443_3Top
             );
         end
     endgenerate
-
-    QuadSPIs QuadSPIs (
-        .Clk_i(spiClkBus[0]),
-        .Rst_i(initRstGen[0] | !spiMode[0]),
-        .Sck_i(sckQ[0]),
-        .Ss_i(ssQ[0]),
-        .Mosi0_i(mosi0Q[0]),
-        .Mosi1_i(mosi1[0]),
-        .Mosi2_i(mosi2[0]),
-        .Mosi3_i(mosi3[0])
-    );
+  //================================================================================
+    //  FOR DEBUG 
+    //================================================================================	
+    // QuadSPIs QuadSPIs (
+    //     .Clk_i(spiClkBus[0]),
+    //     .Rst_i(initRstGen[0] | !spiMode[0]),
+    //     .Sck_i(sckQ[0]),
+    //     .Ss_i(ssQ[0]),
+    //     .Mosi0_i(mosi0Q[0]),
+    //     .Mosi1_i(mosi1[0]),
+    //     .Mosi2_i(mosi2[0]),
+    //     .Mosi3_i(mosi3[0]),
+    //     .WidthSel_i(widthSel[0]),
+    //     .SELST_i(selSt[0]),
+    //     .EndianSel_i(endianSel[0])
+    // );
     
     InitRst InitRst_inst
      (

sources_1/new/S5443_3_tb.v

@@ -47,7 +47,7 @@ localparam ClockPhase0 = 1'b0;//
 localparam ClockPolarity0 = 1'b0;//0 for active high, 1 for active low
 localparam Assel0 = 1'b1;//0 for software control, 1 for hardware control
 localparam SelSt0 = 1'b1; //1 - assert slave select(low), 0 - deassert slave select(high)
-localparam Size0 = 2'd2; //0 - 8 bits, 1 - 16 bits, 2 - 24 bits, 3 - 32 bits
+localparam Size0 = 2'd1; //0 - 8 bits, 1 - 16 bits, 2 - 24 bits, 3 - 32 bits
 localparam Mode0 = 1'b0; // 1 - 4 Mosi, 0 - 1 Mosi
 localparam LSBF0 = 1'b0; // 1 - LSB first, 0 - MSB first
 
@@ -222,7 +222,7 @@ localparam GPIOAddr = 11'hFF0;
 assign SmcBe_i = (tb_cnt >0 && tb_cnt <=44) ? 2'b00 : 2'b11;
 assign SmcAmsN_i = (tb_cnt > 0 && tb_cnt <= 44) ? 1'b0 : 1'b1;
 assign smcData = SmcData_i;
-// assign mosi1_io = (!Mode0) ? mosi0_o : 1'bz;
+assign mosi1_io = (!Mode0) ? mosi0_o : 1'bz;
 
 //***********************************************
 //	           CLOCK GENERATION
@@ -360,7 +360,8 @@ always @(posedge Clk_i) begin
             endcase
         end
         else begin 
-                SmcData_i <= $urandom_range(0, 8'hFF);
+                SmcData_i <= $urandom_range(0, 16'hFFFF);
+                // SmcData_i <= 16'hff00;
             end
     end
 end

sources_1/new/SpiR/SPIm.v

@@ -39,7 +39,7 @@ module SPIm
     reg [2:0] delayCnt;
     reg stopFlag;
     
-    wire [31:0] txLenght = ssNum+Lag_i+Lead_i;
+    (* dont_touch = "true" *) wire [31:0] txLenght = ssNum+Lag_i+Lead_i;
     //================================================================================
     //  ASSIGNMENTS
     //================================================================================