Добавил маску для ldReg

sources_1/new/RegMap/RegMap.v

@@ -115,6 +115,7 @@ module RegMap #(
 	output reg [CMD_REG_WIDTH/2-1:0] SpiTxRxEnSetReg_o,
 	output reg [CMD_REG_WIDTH/2-1:0] SpiTxRxEnClrReg_o,
 	output [CMD_REG_WIDTH-1:0] GPIOAReg_o,
+	output reg [CMD_REG_WIDTH/2-1:0] LdMaskReg_o,
 
 	output [CMD_REG_WIDTH/2-1:0] AnsDataReg_o,
 	
@@ -230,9 +231,11 @@ module RegMap #(
 
 	localparam GPIO_CTRL_ADDR 	= 12'hFF0;
 	localparam GPIO_CTRL_ADDR_S = 12'hFF2;
+
+	/* LD Mask and LD Register */
+	localparam LD_REG_ADDR = 12'hFF4;
+	localparam LD_MASK_ADDR = 12'hFF8;
 	
-	localparam DEBUG_0_ADDR = 12'hFF8;
-	localparam DEBUG_1_ADDR = 12'hFFC;
 
 //================================================================================
 //  CODING
@@ -292,6 +295,7 @@ module RegMap #(
 			spiTxRxEnReg 		<= 0;
 			SpiTxRxEnSetReg_o 	<= 0;
 			SpiTxRxEnClrReg_o 	<= 0;
+			LdMaskReg_o 		<= 0;
 			GPIOAReg 			<= 0;
 			GPIOARegS 			<= 0;
 			ledReg 				<= 0;
@@ -436,15 +440,15 @@ module RegMap #(
 							SPI_TX_RX_EN_CLR : begin 
 								spiTxRxEnReg <= (spiTxRxEnReg) & (~Data_i);
 							end
+							LD_MASK_ADDR : begin
+								LdMaskReg_o <= Data_i;
+							end 
 							GPIO_CTRL_ADDR : begin 
 								GPIOAReg <= Data_i;
 							end
 							GPIO_CTRL_ADDR_S : begin 
 								GPIOARegS <= Data_i;
 							end
-							DEBUG_0_ADDR : begin 
-								ledReg <= Data_i;
-							end
 						endcase
 					end
 					1 : begin 
@@ -587,12 +591,12 @@ module RegMap #(
 							GPIO_CTRL_ADDR : begin 
 								GPIOAReg[15:8] <= Data_i[15:8];
 							end
+							LD_MASK_ADDR : begin 
+								LdMaskReg_o[15:8] <= Data_i[15:8];
+							end
 							GPIO_CTRL_ADDR_S : begin 
 								GPIOARegS[15:8] <= Data_i[15:8];
 							end
-							DEBUG_0_ADDR : begin 
-								ledReg[15:8] <= Data_i[15:8];
-							end
 						endcase 
 					end
 					2 : begin 
@@ -735,12 +739,12 @@ module RegMap #(
 							GPIO_CTRL_ADDR : begin 
 								GPIOAReg[7:0] <= Data_i[7:0];
 							end
+							LD_MASK_ADDR : begin 
+								LdMaskReg_o[7:0] <= Data_i[7:0];
+							end
 							GPIO_CTRL_ADDR_S : begin 
 								GPIOARegS[7:0] <= Data_i[7:0];
 							end
-							DEBUG_0_ADDR : begin 
-								ledReg[7:0] <= Data_i[7:0];
-							end
 						endcase
 					end
 				endcase
@@ -933,12 +937,9 @@ module RegMap #(
 				GPIO_CTRL_ADDR : begin 
 					ansReg = GPIOAReg;
 				end
-				GPIO_CTRL_ADDR_S : begin 
+				LD_REG_ADDR : begin 
 					ansReg = {9'd0,LdReg_i};
 				end
-				DEBUG_0_ADDR : begin 
-					ansReg = ledReg;
-				end
 				default : begin 
 					ansReg = 0;
 				end

sources_1/new/S5443_3Top.v

@@ -196,6 +196,7 @@ module S5443_3Top
 	wire [CMD_REG_WIDTH-1:0] spiTxRxEnSet;
 	wire [CMD_REG_WIDTH-1:0] spiTxRxEnClr;
 	wire [CMD_REG_WIDTH-1:0] Gpio;
+	wire [CMD_REG_WIDTH-1:0] ldMask;
 	
 	wire [ADDR_REG_WIDTH-1:0]	toRegMapAddr;
 	wire [CMD_REG_WIDTH/2-1:0]	toRegMapData;
@@ -244,6 +245,7 @@ module S5443_3Top
 	wire [SPI_NUM-1:0] spiEn;
 
 	wire [SPI_NUM-1:0] ldReg;
+	wire [SPI_NUM-1:0] ldRegMasked;
 
 	wire [SPI_NUM-1:0] ssW;
 
@@ -401,7 +403,15 @@ module S5443_3Top
 	assign fifoTxRst[5] = spi5TxFifoCtrlRR[0];
 	assign fifoTxRst[6] = spi6TxFifoCtrlRR[0];
 	
-	assign LD_o = ldReg[0]&ldReg[1]&ldReg[2]&ldReg[3]&ldReg[4]&ldReg[5]&ldReg[6];
+	assign ldRegMasked[0] = (ldMask[0]) ? ldReg[0] : 1'b1;
+	assign ldRegMasked[1] = (ldMask[1]) ? ldReg[1] : 1'b1;
+	assign ldRegMasked[2] = (ldMask[2]) ? ldReg[2] : 1'b1;
+	assign ldRegMasked[3] = (ldMask[3]) ? ldReg[3] : 1'b1;
+	assign ldRegMasked[4] = (ldMask[4]) ? ldReg[4] : 1'b1;
+	assign ldRegMasked[5] = (ldMask[5]) ? ldReg[5] : 1'b1;
+	assign ldRegMasked[6] = (ldMask[6]) ? ldReg[6] : 1'b1;
+
+	assign LD_o = ldRegMasked[0]&ldRegMasked[1]&ldRegMasked[2]&ldRegMasked[3]&ldRegMasked[4]&ldRegMasked[5]&ldRegMasked[6];
 	
 	assign wordCntRx[0] = spi0RxFifoCtrlRR[15:8];
 	assign wordCntRx[1] = spi1RxFifoCtrlRR[15:8];
@@ -634,7 +644,7 @@ module S5443_3Top
 		.RxFifoCtrlReg5_i		(spi5RxFifoCtrlReg),
 		.RxFifoCtrlReg6_i		(spi6RxFifoCtrlReg),
 
-		.LdReg_i				(ldReg),
+		.LdReg_i				(ldRegMasked),
 
 		//Spi0
 		.Spi0CtrlReg_o			(spi0Ctrl),
@@ -689,6 +699,7 @@ module S5443_3Top
 		.SpiTxRxEnReg_o			(spiTxRxEn),
 		.SpiTxRxEnSetReg_o		(spiTxRxEnSet),
 		.SpiTxRxEnClrReg_o		(spiTxRxEnClr),
+		.LdMaskReg_o			(ldMask),
 		.GPIOAReg_o				(Gpio),
 
 		.AnsDataReg_o			(ansData),

sources_1/new/S5443_3_tb.v

@@ -58,7 +58,7 @@ localparam [15:0] Spi0CtrlRegData = {8'h0,LSBF0, Mode0, Size0, SelSt0, Assel0, C
 //	           SPI0 Clk Reg Data
 //***********************************************
 
-localparam Div = 4'd1; // Custom divider value(input clock frequency = 80 MHz)
+localparam Div = 4'd5; // Custom divider value(input clock frequency = 80 MHz)
 localparam Mux0 = 1'b1; // 0 - input clock, 1 - MMCM output clock
 localparam Mux1 = 3'd0; // MMCM output clock number