Browse Source

Исправлены ошибки: назначении пинов, разбора команды настройки измерения, назначения пинов AmpEn. Актуализирован проект для Fpga Slave.

ChStepan 1 year ago
parent
commit
37f9edaef4

File diff suppressed because it is too large
+ 77 - 10
S5444_M/src/constrs/S5443Top.xdc


+ 0 - 1
S5444_M/src/src/ExtDspInterface/DspInterface.v

@@ -47,7 +47,6 @@ module	DspInterface
 	input	Ss_i,
 	input	SpiRst_i,
 	
-	input	Mode_i,
 	input	[CmdWidth-2:0]		PortSel_i,
 	input	[CmdWidth-1:0]		DecimFactor_i,
 	

+ 3 - 5
S5444_M/src/src/InternalDsp/InternalDsp.v

@@ -153,9 +153,7 @@ module InternalDsp
 	wire	[CorrAdcDataWidth-1:0]	adc2ChR2DataGated	=	(GatingPulse_i)?	adcDataBusExt[ChNum-2]:{CorrAdcDataWidth{1'b0}};
 	wire	[CorrAdcDataWidth-1:0]	adc2ChT2DataGated	=	(GatingPulse_i)?	adcDataBusExt[ChNum-1]:{CorrAdcDataWidth{1'b0}};	
 	
-	wire	[WindNcoPhIncWidth-1:0]	ncoPhInc = {ifFtw1HReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtw1LReg};
-	
-	wire	grDelayMeasFlag = {ifFtw2HReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtw2LReg} == 1'b0;
+	wire	grDelayMeasFlag = (measCtrlReg[1:0] == 2'h2);
 	
 //================================================================================
 //  ASSIGNMENTS
@@ -241,7 +239,7 @@ MeasCtrlModule
 	.MeasNum_i				(measNumReg),
 	.StartMeas_i			(StartMeas_i),
 	.StartMeasDsp_i			(StartMeasDsp_i),
-	.Mode_i					(measCtrlReg[0]),
+	.Mode_i					(measCtrlReg[1:0]),
 	.OscDataRdFlag_i		(OscDataRdFlag_i),
 		
 	.WindPointsNum_i		(windPointsNumReg),
@@ -292,7 +290,7 @@ Win_calc	WinCalcInst
 	.TukeyCtrl_i	(tukeyCtrl),
 	.MeasWind_i		(measWind),
 	.win_value_i	(windArg),
-	.win_type_i		(measCtrlReg[2:0]),
+	.win_type_i		(measCtrlReg[1:0]),
 	.win_o			(wind)
 );
 

+ 2 - 2
S5444_M/src/src/InternalDsp/MeasCtrlModule.v

@@ -31,7 +31,7 @@ module MeasCtrlModule
 	input	StartMeas_i,
 	input	StartMeasDsp_i,
 	input	[7:0]	FilterCmd_i,
-	input	Mode_i,
+	input	[1:0] Mode_i,
 	input	OscDataRdFlag_i,
 	
 	input	[32-1:0]	MeasNum_i,
@@ -82,7 +82,7 @@ module MeasCtrlModule
 
 	reg		[32-1:0]	windArg;
 	
-	wire	oscMode	=	(Mode_i	==	1'b1);
+	wire	oscMode	=	(Mode_i	==	2'h1);
 	
 	reg		oscWind;
 	

+ 4 - 8
S5444_M/src/src/InternalDsp/Win_calc.v

@@ -27,7 +27,7 @@ module Win_calc	(
 	input			MeasWind_i,
 	input	[1:0]	TukeyCtrl_i,
 	input	[31:0]	win_value_i,
-	input	[2:0]	win_type_i,	
+	input	[1:0]	win_type_i,	
 	output	signed [17:0]	win_o,
 	output	reg	signed [17:0]	sinWin_o
 );
@@ -179,14 +179,10 @@ end
 
 always	@(*)	begin
 	if	(!reset_i)	begin
-		if	(!win_type_i)	begin 
-			if	(!WinCtrl_i)	begin
-				tukeyWind	=	resultSin;
-			end	else	begin
-				tukeyWind	=	0-resultSin;
-			end
+		if	(!WinCtrl_i)	begin
+			tukeyWind	=	resultSin;
 		end	else	begin
-			tukeyWind	=	18'h0;
+			tukeyWind	=	0-resultSin;
 		end
 	end	else	begin
 		tukeyWind	=	18'h0;

+ 2 - 64
S5444_M/src/src/Sim/S5443TopPulseProfileTb.v

@@ -73,7 +73,8 @@ module S5443TopPulseProfileTb;
 	parameter	[31:0]	MeasCmdBypass	=	{8'h11,8'h0,8'h63,8'h1};
 	parameter	[31:0]	MeasCmdFft 		=	{8'h11,8'h0,8'h63,7'h5,1'b1};
 	// parameter	[31:0]	MeasCmd 		=	{8'h11,8'h0,8'h53,8'h0};
-	parameter	[31:0]	MeasCmd =	{8'h11,8'h3e,8'h72,8'h0};
+	parameter	[31:0]	MeasCmd =	{8'h11,6'h0,8'h63,4'h0,4'h0,2'h2};
+	parameter	[23:0]	testCmd = {6'h0,8'h63,4'h0,4'h0,2'h2};
 	parameter	[31:0]	AdcCtrl =	{8'h12,24'h2};
 	parameter	[31:0]	SensCtrlCmd =	{1'b0,27'h0,4'b1};
 	// parameter	[31:0]	DitherCmd 	= {8'h0E,24'h100192};
@@ -389,70 +390,7 @@ S5443Top MasterFpga
 	// .AdcData_i			(Data_i)
 );
 
-S5443TopS SlaveFpga 
-(
-	.ClkP_i				(Clk50),
-	.ClkN_i				(~Clk50),
-//------------------------------------------	
-    .Adc1FclkP_i		(),		
-    .Adc1FclkN_i		(),		
-
-    .Adc1DataDa0P_i		(),
-	.Adc1DataDa0N_i		(),		
-    .Adc1DataDa1P_i		(),
-    .Adc1DataDa1N_i		(),
-
-	.Adc1DataDb0P_i		(),
-    .Adc1DataDb0N_i		(),		
-    .Adc1DataDb1P_i		(),
-    .Adc1DataDb1N_i		(),
-//------------------------------------------	
-    .Adc2FclkP_i		(),		
-    .Adc2FclkN_i		(),		
 
-    .Adc2DataDa0P_i		(),
-    .Adc2DataDa0N_i		(),		
-    .Adc2DataDa1P_i		(),
-    .Adc2DataDa1N_i		(),
-  
-	.Adc2DataDb0P_i		(),
-    .Adc2DataDb0N_i		(),		
-    .Adc2DataDb1P_i		(),
-    .Adc2DataDb1N_i		(),
-//------------------------------------------
-	.AdcInitMosi_o		(),
-	.AdcInitClk_o		(),			
-	.Adc1InitCs_o		(),
-	.Adc2InitCs_o		(),
-	.AdcInitRst_o		(),
-	
-	.DitherCtrlCh1_o	(),
-	.DitherCtrlCh2_o	(),
-//------------------------------------------	
-	
-	.Mosi0_i			(mosi0),
-	.Mosi1_i			(mosi1),
-	.Miso0_Mosi2_io		(miso0_mosi2),
-	.Miso1_Mosi3_io		(miso1_mosi3),
-	.SpiRst_i			(spiRst),
-	.Sck_i				(Clk41),
-	.Ss_i				(ss),
-
-	.LpOutClk_o			(),
-	.LpOutFs_o			(),			
-	.LpOutData_o		(),
-	
-	//fpga-dsp signals
-	.StartMeasDsp_i		(startCalcSlaveFpga),
-	.StartMeasEvent_i	(startMeasS),
-	
-	.Overload_o			(),
-
-	//gain lines
-	.DspReadyForRx_i		(dspReadySlaveFpga),
-	.AmpEn_o				(),	//	0-adc1ChA 1-adc1ChB 2-adc2ChA 3-adc2ChB
-	.AdcData_i				(sin_value[17-:14])
-);
 parameter	IDLE	=	3'h0;
 parameter	CMD		=	3'h1;
 parameter	STX		=	3'h2;

+ 22 - 25
S5444_M/src/src/Top/S5443Top.v

@@ -380,7 +380,7 @@ module	S5443Top
 	wire	pGenRstDone;
 	wire	[CmdRegWidth-28:0]	pgMuxCtrlArray	[PGenNum-1:0];
 	wire	[CmdRegWidth-28:0]	extTrigMuxCtrlArray	[TrigPortsNum-1:0];
-	wire	[TrigPortsNum-1:0]	extTrigDirCmd	=	measCtrl[21:16];
+	wire	[TrigPortsNum-1:0]	extTrigDirCmd	=	measCtrl[23:18];
 	
 	wire	[CmdRegWidth-1:0]	pgP1DelArray	[PGenNum-1:0];
 	wire	[CmdRegWidth-1:0]	pgP2DelArray	[PGenNum-1:0];
@@ -578,19 +578,19 @@ module	S5443Top
 	
 	// assign	PortSelDir_o	=	4'd15;
 	
-	assign	Trig6to1Dir_o	[0]	=	!measCtrl[16];
-	assign	Trig6to1Dir_o	[1]	=	!measCtrl[17];
-	assign	Trig6to1Dir_o	[2]	=	!measCtrl[18];
-	assign	Trig6to1Dir_o	[3]	=	!measCtrl[19];
-	assign	Trig6to1Dir_o	[4]	=	!measCtrl[20];
-	assign	Trig6to1Dir_o	[5]	=	!measCtrl[21];
+	assign	Trig6to1Dir_o	[0]	=	!measCtrl[18];
+	assign	Trig6to1Dir_o	[1]	=	!measCtrl[19];
+	assign	Trig6to1Dir_o	[2]	=	!measCtrl[20];
+	assign	Trig6to1Dir_o	[3]	=	!measCtrl[21];
+	assign	Trig6to1Dir_o	[4]	=	!measCtrl[22];
+	assign	Trig6to1Dir_o	[5]	=	!measCtrl[23];
 	
-	assign	Trig6to1_io	[0]	=	(measCtrl[16])	?	1'bz:extPortsMuxedOut[0];	//1 - in, 0 - out
-	assign	Trig6to1_io	[1]	=	(measCtrl[17])	?	1'bz:extPortsMuxedOut[1];	//1 - in, 0 - out
-	assign	Trig6to1_io	[2]	=	(measCtrl[18])	?	1'bz:extPortsMuxedOut[2];	//1 - in, 0 - out
-	assign	Trig6to1_io	[3]	=	(measCtrl[19])	?	1'bz:extPortsMuxedOut[3];	//1 - in, 0 - out
-	assign	Trig6to1_io	[4]	=	(measCtrl[20])	?	1'bz:extPortsMuxedOut[4];	//1 - in, 0 - out
-	assign	Trig6to1_io	[5]	=	(measCtrl[21])	?	1'bz:extPortsMuxedOut[5];	//1 - in, 0 - out
+	assign	Trig6to1_io	[0]	=	(measCtrl[18])	?	1'bz:extPortsMuxedOut[0];	//1 - in, 0 - out
+	assign	Trig6to1_io	[1]	=	(measCtrl[19])	?	1'bz:extPortsMuxedOut[1];	//1 - in, 0 - out
+	assign	Trig6to1_io	[2]	=	(measCtrl[20])	?	1'bz:extPortsMuxedOut[2];	//1 - in, 0 - out
+	assign	Trig6to1_io	[3]	=	(measCtrl[21])	?	1'bz:extPortsMuxedOut[3];	//1 - in, 0 - out
+	assign	Trig6to1_io	[4]	=	(measCtrl[22])	?	1'bz:extPortsMuxedOut[4];	//1 - in, 0 - out
+	assign	Trig6to1_io	[5]	=	(measCtrl[23])	?	1'bz:extPortsMuxedOut[5];	//1 - in, 0 - out
 	
 	assign	DspReadyForRxToFpgaS_o	=	dspReadyForRxRegR;
 	assign	StartMeasDsp_o	=	startMeasSyncR;
@@ -628,15 +628,13 @@ end
 //--------------------------------------------------------------------------------
 IBUFDS 
 #(
-	.DIFF_TERM("TRUE"),       
-	.IBUF_LOW_PWR("FALSE"),     
-	.IOSTANDARD("DEFAULT")    
-) 
-ClkBuf 
-(
-	.O	(gclk),  
-	.I	(ClkN_i),  
-	.IB	(ClkP_i) 
+	.DIFF_TERM		("FALSE")
+)
+Clk50Buf
+(	
+	.I				(ClkN_i),
+	.IB				(ClkP_i),
+	.O				(gclk)
 );
    
 Clk200Gen	ClocksGenerator 
@@ -729,9 +727,8 @@ ExternalDspInterface
 	.Ss_i				(Ss_i),
 	.SpiRst_i			(SpiRst_i),
 
-	.Mode_i				(measCtrl[0]),
-	.PortSel_i			(measCtrl[23:22]),
-	.DecimFactor_i		(measCtrl[3:1]),
+	.PortSel_i			(measCtrl[9:6]),
+	.DecimFactor_i		(measCtrl[5:2]),
 	.IfFtwL_i			(ifFtw1L),
 	.IfFtwH_i			(ifFtw1H),
 	

+ 2 - 2
S5444_S/src/constrs/S5443Top.xdc

@@ -158,9 +158,9 @@ set_property PACKAGE_PIN A6 [get_ports {AmpEn_o[0]}]
 set_property IOSTANDARD LVCMOS25 [get_ports {AmpEn_o[0]}]
 set_property PACKAGE_PIN B6 [get_ports {AmpEn_o[1]}]
 set_property IOSTANDARD LVCMOS25 [get_ports {AmpEn_o[1]}]
-set_property PACKAGE_PIN A8 [get_ports {AmpEn_o[2]}]
+set_property PACKAGE_PIN A7 [get_ports {AmpEn_o[2]}]
 set_property IOSTANDARD LVCMOS25 [get_ports {AmpEn_o[2]}]
-set_property PACKAGE_PIN A7 [get_ports {AmpEn_o[3]}]
+set_property PACKAGE_PIN A8 [get_ports {AmpEn_o[3]}]
 set_property IOSTANDARD LVCMOS25 [get_ports {AmpEn_o[3]}]
 
 set_property PACKAGE_PIN A4 [get_ports DspReadyForRx_i]

+ 0 - 1
S5444_S/src/src/ExtDspInterface/DspInterface.v

@@ -47,7 +47,6 @@ module	DspInterface
 	input	Ss_i,
 	input	SpiRst_i,
 	
-	input	Mode_i,
 	input	[CmdWidth-2:0]		PortSel_i,
 	input	[CmdWidth-1:0]		DecimFactor_i,
 	

+ 3 - 5
S5444_S/src/src/InternalDsp/InternalDsp.v

@@ -153,9 +153,7 @@ module InternalDsp
 	wire	[CorrAdcDataWidth-1:0]	adc2ChR2DataGated	=	(GatingPulse_i)?	adcDataBusExt[ChNum-2]:{CorrAdcDataWidth{1'b0}};
 	wire	[CorrAdcDataWidth-1:0]	adc2ChT2DataGated	=	(GatingPulse_i)?	adcDataBusExt[ChNum-1]:{CorrAdcDataWidth{1'b0}};	
 	
-	wire	[WindNcoPhIncWidth-1:0]	ncoPhInc = {ifFtw1HReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtw1LReg};
-	
-	wire	grDelayMeasFlag = {ifFtw2HReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtw2LReg} == 1'b0;
+	wire	grDelayMeasFlag = (measCtrlReg[1:0] == 2'h2);
 	
 //================================================================================
 //  ASSIGNMENTS
@@ -241,7 +239,7 @@ MeasCtrlModule
 	.MeasNum_i				(measNumReg),
 	.StartMeas_i			(StartMeas_i),
 	.StartMeasDsp_i			(StartMeasDsp_i),
-	.Mode_i					(measCtrlReg[0]),
+	.Mode_i					(measCtrlReg[1:0]),
 	.OscDataRdFlag_i		(OscDataRdFlag_i),
 		
 	.WindPointsNum_i		(windPointsNumReg),
@@ -292,7 +290,7 @@ Win_calc	WinCalcInst
 	.TukeyCtrl_i	(tukeyCtrl),
 	.MeasWind_i		(measWind),
 	.win_value_i	(windArg),
-	.win_type_i		(measCtrlReg[2:0]),
+	.win_type_i		(measCtrlReg[1:0]),
 	.win_o			(wind)
 );
 

+ 2 - 2
S5444_S/src/src/InternalDsp/MeasCtrlModule.v

@@ -31,7 +31,7 @@ module MeasCtrlModule
 	input	StartMeas_i,
 	input	StartMeasDsp_i,
 	input	[7:0]	FilterCmd_i,
-	input	Mode_i,
+	input	[1:0] Mode_i,
 	input	OscDataRdFlag_i,
 	
 	input	[32-1:0]	MeasNum_i,
@@ -82,7 +82,7 @@ module MeasCtrlModule
 
 	reg		[32-1:0]	windArg;
 	
-	wire	oscMode	=	(Mode_i	==	1'b1);
+	wire	oscMode	=	(Mode_i	==	2'h1);
 	
 	reg		oscWind;
 	

+ 4 - 8
S5444_S/src/src/InternalDsp/Win_calc.v

@@ -27,7 +27,7 @@ module Win_calc	(
 	input			MeasWind_i,
 	input	[1:0]	TukeyCtrl_i,
 	input	[31:0]	win_value_i,
-	input	[2:0]	win_type_i,	
+	input	[1:0]	win_type_i,	
 	output	signed [17:0]	win_o,
 	output	reg	signed [17:0]	sinWin_o
 );
@@ -179,14 +179,10 @@ end
 
 always	@(*)	begin
 	if	(!reset_i)	begin
-		if	(!win_type_i)	begin 
-			if	(!WinCtrl_i)	begin
-				tukeyWind	=	resultSin;
-			end	else	begin
-				tukeyWind	=	0-resultSin;
-			end
+		if	(!WinCtrl_i)	begin
+			tukeyWind	=	resultSin;
 		end	else	begin
-			tukeyWind	=	18'h0;
+			tukeyWind	=	0-resultSin;
 		end
 	end	else	begin
 		tukeyWind	=	18'h0;

+ 3 - 4
S5444_S/src/src/Top/S5443Top.v

@@ -350,7 +350,7 @@ module	S5443Top
 	
 	wire	[CmdRegWidth-28:0]	pgMuxCtrlArray	[PGenNum-1:0];
 	wire	[CmdRegWidth-28:0]	extTrigMuxCtrlArray	[TrigPortsNum-1:0];
-	wire	[TrigPortsNum-1:0]	extTrigDirCmd	=	measCtrl[21:16];
+	wire	[TrigPortsNum-1:0]	extTrigDirCmd	=	measCtrl[23:18];
 	
 	wire	[CmdRegWidth-1:0]	pgP1DelArray	[PGenNum-1:0];
 	wire	[CmdRegWidth-1:0]	pgP2DelArray	[PGenNum-1:0];
@@ -639,9 +639,8 @@ ExternalDspInterface
 	.Ss_i				(Ss_i),
 	.SpiRst_i			(SpiRst_i),
 
-	.Mode_i				(measCtrl[0]),
-	.PortSel_i			(measCtrl[23:22]),
-	.DecimFactor_i		(measCtrl[3:1]),
+	.PortSel_i			(measCtrl[9:6]),
+	.DecimFactor_i		(measCtrl[5:2]),
 	.IfFtwL_i			(ifFtw1L),
 	.IfFtwH_i			(ifFtw1H),