Обновлен модуль приёма данных по QSPI

S5444_M/src/src/ExtDspInterface/QuadSlaveSpi.v

@@ -88,7 +88,7 @@ module	QuadSlaveSpi
 //	CODING
 //================================================================================
 	
-	always @(posedge Sck_i) begin
+	always @(posedge Rst_i or posedge Sck_i) begin
 		if (Rst_i) begin
 			singleCaptReg <= 0;
 			quadCaptReg0 <= 0;
@@ -114,7 +114,7 @@ module	QuadSlaveSpi
 		end 
 	end
 	
-	always @(posedge Sck_i)	begin
+	always @(posedge Rst_i or posedge Sck_i)	begin
 		if	(Rst_i)	begin
 			dataCnt	<=	0;
 		end else begin
@@ -124,7 +124,7 @@ module	QuadSlaveSpi
 		end
 	end
 
-	always @(posedge Sck_i)	begin
+	always @(posedge Rst_i or posedge Sck_i)	begin
 		if	(Rst_i)	begin
 			spiMode	<=	1'b0;
 		end else begin
@@ -146,7 +146,7 @@ module	QuadSlaveSpi
 		end
 	end
 
-	always @(negedge Sck_i)	begin
+	always @(posedge Rst_i or negedge Sck_i)	begin
 		if	(Rst_i)	begin
 			ansAddr	<=	7'h7F;	
 		end else begin
@@ -212,7 +212,7 @@ module	QuadSlaveSpi
 		end
 	end
 
-	always @(posedge Clk_i)	begin
+	always @(posedge Rst_i or posedge Clk_i)	begin
 		if (Rst_i) 	begin
 			Data_o <= 0;
 		end else begin

S5444_S/src/src/ExtDspInterface/QuadSlaveSpi.v

@@ -88,7 +88,7 @@ module	QuadSlaveSpi
 //	CODING
 //================================================================================
 	
-	always @(posedge Sck_i) begin
+	always @(posedge Rst_i or posedge Sck_i) begin
 		if (Rst_i) begin
 			singleCaptReg <= 0;
 			quadCaptReg0 <= 0;
@@ -114,7 +114,7 @@ module	QuadSlaveSpi
 		end 
 	end
 	
-	always @(posedge Sck_i)	begin
+	always @(posedge Rst_i or posedge Sck_i)	begin
 		if	(Rst_i)	begin
 			dataCnt	<=	0;
 		end else begin
@@ -124,7 +124,7 @@ module	QuadSlaveSpi
 		end
 	end
 
-	always @(posedge Sck_i)	begin
+	always @(posedge Rst_i or posedge Sck_i)	begin
 		if	(Rst_i)	begin
 			spiMode	<=	1'b0;
 		end else begin
@@ -146,7 +146,7 @@ module	QuadSlaveSpi
 		end
 	end
 
-	always @(negedge Sck_i)	begin
+	always @(posedge Rst_i or negedge Sck_i)	begin
 		if	(Rst_i)	begin
 			ansAddr	<=	7'h7F;	
 		end else begin
@@ -212,7 +212,7 @@ module	QuadSlaveSpi
 		end
 	end
 
-	always @(posedge Clk_i)	begin
+	always @(posedge Rst_i or posedge Clk_i)	begin
 		if (Rst_i) 	begin
 			Data_o <= 0;
 		end else begin