Merge branch 'Group_Delay_Measurement' of http://gogs.druzhinin.pro/ChStepan/S5444 into Group_Delay_Measurement

S5444_M/src/src/InternalDsp/InternalDsp.v

@@ -66,8 +66,11 @@ module InternalDsp
 	input	wire	CalModeEn_i,
 	output	wire	CalModeDone_o,
 
-	input	wire	[CmdDataRegWith-1:0]	IfFtwL_i,
-	input	wire	[CmdDataRegWith-1:0]	IfFtwH_i,
+	input	wire	[CmdDataRegWith-1:0]	IfFtw1L_i,
+	input	wire	[CmdDataRegWith-1:0]	IfFtw1H_i,
+	
+	input	wire	[CmdDataRegWith-1:0]	IfFtw2L_i,
+	input	wire	[CmdDataRegWith-1:0]	IfFtw2H_i,
 	
 	output	wire	[ResultWidth-1:0]	Adc1ImT1Data_o,
 	output	wire	[ResultWidth-1:0]	Adc1ReT1Data_o,
@@ -134,8 +137,12 @@ module InternalDsp
 	reg		[32-1:0]	windPointsNumReg;
 	reg		[32-1:0]	measNumReg;
 	reg		[WindCorrCoefWidth-1:0]	filterCorrCoeffReg;
-	reg		[CmdDataRegWith-1:0]	ifFtwLReg;
-	reg		[CmdDataRegWith-1:0]	ifFtwHReg;
+	reg		[CmdDataRegWith-1:0]	ifFtw1LReg;
+	reg		[CmdDataRegWith-1:0]	ifFtw1HReg;
+	
+	reg		[CmdDataRegWith-1:0]	ifFtw2LReg;
+	reg		[CmdDataRegWith-1:0]	ifFtw2HReg;
+	
 	reg		[CmdDataRegWith-1:0]	filterCorrCoefLReg;
 	reg		[CmdDataRegWith-1:0]	filterCorrCoefHReg;
 	
@@ -146,9 +153,10 @@ module InternalDsp
 	wire	[CorrAdcDataWidth-1:0]	adc2ChR2DataGated	=	(GatingPulse_i)?	adcDataBusExt[ChNum-2]:{CorrAdcDataWidth{1'b0}};
 	wire	[CorrAdcDataWidth-1:0]	adc2ChT2DataGated	=	(GatingPulse_i)?	adcDataBusExt[ChNum-1]:{CorrAdcDataWidth{1'b0}};	
 	
-	wire	[WindNcoPhIncWidth-1:0]	ncoPhInc = {ifFtwHReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtwLReg};
+	wire	[WindNcoPhIncWidth-1:0]	ncoPhInc = {ifFtw1HReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtw1LReg};
+	
+	wire	grDelayMeasFlag = {ifFtw2HReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtw2LReg} == 1'b0;
 	
-	wire	grDelayMeasFlag = 1'b1;
 //================================================================================
 //  ASSIGNMENTS
 
@@ -197,8 +205,10 @@ always	@(posedge	Clk_i)	begin
 	if	(!Rst_i)	begin
 		if	(!StartMeas_i)	begin
 			measCtrlReg			<=	MeasCtrl_i;
-			ifFtwLReg			<=	IfFtwL_i;
-			ifFtwHReg			<=	IfFtwH_i;
+			ifFtw1LReg			<=	IfFtw1L_i;
+			ifFtw1HReg			<=	IfFtw1H_i;
+			ifFtw2LReg			<=	IfFtw2L_i;
+			ifFtw2HReg			<=	IfFtw2H_i;
 			filterCorrCoefLReg	<=	FilterCorrCoefL_i;
 			filterCorrCoefHReg	<=	FilterCorrCoefH_i;
 			measNumReg			<=	MeasNum_i;
@@ -206,8 +216,10 @@ always	@(posedge	Clk_i)	begin
 		end 
 	end	else	begin
 		measCtrlReg			<=	0;
-		ifFtwLReg			<=	0;
-		ifFtwHReg			<=	0;
+		ifFtw1LReg			<=	0;
+		ifFtw1HReg			<=	0;
+		ifFtw2LReg			<=	0;
+		ifFtw2HReg			<=	0;
 		filterCorrCoefLReg	<=	0;
 		filterCorrCoefHReg	<=	0;
 		measNumReg			<=	0;
@@ -311,7 +323,7 @@ ncoInstFirstTone
 	.Clk_i		(Clk_i),
 	.Rst_i		(Rst_i|NcoRst_i),
 	.Val_i		(1'b1),
-	.PhaseInc_i	({ifFtwHReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtwLReg}),
+	.PhaseInc_i	({ifFtw1HReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtw1LReg}),
 	.WindVal_i	(1'b1),
 	.WinType_i	(),
 	.Wind_o		(),
@@ -332,7 +344,7 @@ ncoInstSecondTone
 	.Clk_i		(Clk_i),
 	.Rst_i		(Rst_i|NcoRst_i),
 	.Val_i		(1'b1),
-	.PhaseInc_i	({ifFtwHReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtwLReg}),
+	.PhaseInc_i	({ifFtw2HReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtw2LReg}),
 	.WindVal_i	(1'b1),
 	.WinType_i	(),
 	.Wind_o		(),

S5444_M/src/src/RegMap/RegMap.v

@@ -53,8 +53,10 @@ module	RegMap
 	output	[CmdDataRegWith-1:0]	AdcCtrlReg_o,
 	output	[CmdDataRegWith-1:0]	AdcDirectRd0Reg_o,
 	output	[CmdDataRegWith-1:0]	AdcDirectRd1Reg_o,
-	output	[CmdDataRegWith-1:0]	IfFtwRegL_o,
-	output	[CmdDataRegWith-1:0]	IfFtwRegH_o,
+	output	[CmdDataRegWith-1:0]	IfFtw1RegL_o,
+	output	[CmdDataRegWith-1:0]	IfFtw1RegH_o,
+	output	[CmdDataRegWith-1:0]	IfFtw2RegL_o,
+	output	[CmdDataRegWith-1:0]	IfFtw2RegH_o,
 	output	[CmdDataRegWith-1:0]	FilterCorrCoefRegL_o,
 	output	[CmdDataRegWith-1:0]	FilterCorrCoefRegH_o,
 	output	[CmdDataRegWith-1:0]	ActivePortSel_o,		
@@ -164,8 +166,10 @@ module	RegMap
 	localparam	AdcCtrlRegAddr			=	7'h12;
 	localparam	AdcDirectRd0RegAddr		=	7'h13;
 	localparam	AdcDirectRd1RegAddr		=	7'h14;
-	localparam	IfFtwRegHAddr			=	7'h15;
-	localparam	IfFtwRegLAddr			=	7'h16;
+	localparam	IfFtw1RegHAddr			=	7'h15;
+	localparam	IfFtw1RegLAddr			=	7'h16;
+	localparam	IfFtw2RegHAddr			=	7'h19;
+	localparam	IfFtw2RegLAddr			=	7'h1a;
 	localparam	FilterCorrCoefHAddr		=	7'h17;
 	localparam	FilterCorrCoefLAddr		=	7'h18;
 	localparam	ActivePortSelAddr		=	7'h19;	
@@ -278,8 +282,10 @@ module	RegMap
 	reg	[CmdDataRegWith-1:0]	adcCtrlReg;
 	reg	[CmdDataRegWith-1:0]	adcDirectRd0Reg;
 	reg	[CmdDataRegWith-1:0]	adcDirectRd1Reg;
-	reg	[CmdDataRegWith-1:0]	ifFtwRegL;
-	reg	[CmdDataRegWith-1:0]	ifFtwRegH;
+	reg	[CmdDataRegWith-1:0]	ifFtw1RegL;
+	reg	[CmdDataRegWith-1:0]	ifFtw1RegH;
+	reg	[CmdDataRegWith-1:0]	ifFtw2RegL;
+	reg	[CmdDataRegWith-1:0]	ifFtw2RegH;
 	reg	[CmdDataRegWith-1:0]	filterCorrCoefRegL;
 	reg	[CmdDataRegWith-1:0]	filterCorrCoefRegH;
 	reg	[CmdDataRegWith-1:0]	activePortSelReg;
@@ -390,8 +396,10 @@ module	RegMap
 	assign	AdcCtrlReg_o			=	adcCtrlReg;
 	assign	AdcDirectRd0Reg_o		=	adcDirectRd0Reg;
 	assign	AdcDirectRd1Reg_o		=	adcDirectRd1Reg;
-	assign	IfFtwRegL_o				=	ifFtwRegL;
-	assign	IfFtwRegH_o				=	ifFtwRegH;
+	assign	IfFtw1RegL_o			=	ifFtw1RegL;
+	assign	IfFtw1RegH_o			=	ifFtw1RegH;
+	assign	IfFtw2RegL_o			=	ifFtw2RegL;
+	assign	IfFtw2RegH_o			=	ifFtw2RegH;
 	assign	FilterCorrCoefRegL_o	=	filterCorrCoefRegL;
 	assign	FilterCorrCoefRegH_o	=	filterCorrCoefRegH;	
 	assign	ActivePortSel_o			=	activePortSelReg;		
@@ -533,11 +541,17 @@ module	RegMap
 					AdcDirectRd1RegAddr:	begin
 												adcDirectRd1Reg	<=	Data_i	[CmdDataRegWith-1:0];
 											end
-					IfFtwRegLAddr:			begin
-												ifFtwRegL	<=	Data_i	[CmdDataRegWith-1:0];
+					IfFtw1RegLAddr:			begin
+												ifFtw1RegL	<=	Data_i	[CmdDataRegWith-1:0];
 											end
-					IfFtwRegHAddr:			begin
-												ifFtwRegH	<=	Data_i	[CmdDataRegWith-1:0];
+					IfFtw1RegHAddr:			begin
+												ifFtw1RegH	<=	Data_i	[CmdDataRegWith-1:0];
+											end
+					IfFtw2RegLAddr:			begin
+												ifFtw2RegL	<=	Data_i	[CmdDataRegWith-1:0];
+											end
+					IfFtw2RegHAddr:			begin
+												ifFtw2RegH	<=	Data_i	[CmdDataRegWith-1:0];
 											end
 					FilterCorrCoefLAddr:	begin
 												filterCorrCoefRegL	<=	Data_i	[CmdDataRegWith-1:0];
@@ -775,8 +789,8 @@ module	RegMap
 			measCtrlReg			<=	{CmdDataRegWith{1'b0}};
 			adcDirectRd0Reg		<=	{CmdDataRegWith{1'b0}};
 			adcDirectRd1Reg		<=	{CmdDataRegWith{1'b0}};
-			ifFtwRegL			<=	{CmdDataRegWith{1'b0}};
-			ifFtwRegH			<=	{CmdDataRegWith{1'b0}};
+			ifFtw1RegL			<=	{CmdDataRegWith{1'b0}};
+			ifFtw1RegH			<=	{CmdDataRegWith{1'b0}};
 			filterCorrCoefRegL	<=	{CmdDataRegWith{1'b0}};
 			filterCorrCoefRegH	<=	{CmdDataRegWith{1'b0}};
 			activePortSelReg	<=	{CmdDataRegWith{1'b0}};
@@ -951,11 +965,11 @@ module	RegMap
 					AdcDirectRd1RegAddr:	begin
 												ansReg	=	adcDirectRd1Reg;
 											end
-					IfFtwRegLAddr:			begin
-												ansReg	=	ifFtwRegL;
+					IfFtw1RegLAddr:			begin
+												ansReg	=	ifFtw1RegL;
 											end
-					IfFtwRegHAddr:			begin
-												ansReg	=	ifFtwRegH;
+					IfFtw1RegHAddr:			begin
+												ansReg	=	ifFtw1RegH;
 											end
 					FilterCorrCoefLAddr:	begin
 												ansReg	=	filterCorrCoefRegL;

S5444_M/src/src/Top/S5443Top.v

@@ -221,8 +221,10 @@ module	S5443Top
 	wire	[CmdDataRegWith-1:0]	adcCtrl;
 	wire	[CmdDataRegWith-1:0]	adcDirectRd0;
 	wire	[CmdDataRegWith-1:0]	adcDirectRd1;
-	wire	[CmdDataRegWith-1:0]	ifFtwL;
-	wire	[CmdDataRegWith-1:0]	ifFtwH;
+	wire	[CmdDataRegWith-1:0]	ifF1twL;
+	wire	[CmdDataRegWith-1:0]	ifF1twH;
+	wire	[CmdDataRegWith-1:0]	ifF2twL;
+	wire	[CmdDataRegWith-1:0]	ifF2twH;
 	wire	[CmdDataRegWith-1:0]	measCtrl;
 	wire	[CmdDataRegWith-1:0]	amplitudeMod;
 	wire	[CmdDataRegWith-1:0]	activePortSel;
@@ -712,8 +714,8 @@ ExternalDspInterface
 	.Mode_i				(measCtrl[0]),
 	.PortSel_i			(measCtrl[23:22]),
 	.DecimFactor_i		(measCtrl[3:1]),
-	.IfFtwL_i			(ifFtwL),
-	.IfFtwH_i			(ifFtwH),
+	.IfFtwL_i			(ifF1twL),
+	.IfFtwH_i			(ifF1twH),
 	
 	.OscDataRdFlag_o	(oscDataRdFlag),
 	
@@ -760,7 +762,7 @@ NcoRstGen	NcoRstGenInst
 (
 	.Clk_i				(gclk),
 	.Rst_i				(initRst),
-	.NcoPhInc_i			({ifFtwH[0+:PhIncWidth-CmdDataRegWith],ifFtwL}),
+	.NcoPhInc_i			({ifF1twH[0+:PhIncWidth-CmdDataRegWith],ifF1twL}),
 	.StartMeasEvent_i	(startMeasEvent),
 	
 	.NcoRst_o			(ncoRst),
@@ -782,15 +784,15 @@ InternalDsp
 	.NcoRst_i				(ncoRst),
 	.OscWind_o				(oscWind),
 
-	// .Adc1ChT1Data_i			(adc1ChT1Data),	//T1
-	// .Adc1ChR1Data_i			(adc1ChR1Data),	//R1
-	// .Adc2ChR2Data_i			(adc2ChR2Data),	//R2
-	// .Adc2ChT2Data_i			(adc2ChT2Data),	//T2
+	.Adc1ChT1Data_i			(adc1ChT1Data),	//T1
+	.Adc1ChR1Data_i			(adc1ChR1Data),	//R1
+	.Adc2ChR2Data_i			(adc2ChR2Data),	//R2
+	.Adc2ChT2Data_i			(adc2ChT2Data),	//T2
 
-	.Adc1ChT1Data_i			(AdcData_i),	//T1
-	.Adc1ChR1Data_i			(AdcData_i),	//R1
-	.Adc2ChR2Data_i			(AdcData_i),	//R2
-	.Adc2ChT2Data_i			(AdcData_i),	//T2
+	// .Adc1ChT1Data_i			(AdcData_i),	//T1
+	// .Adc1ChR1Data_i			(AdcData_i),	//R1
+	// .Adc2ChR2Data_i			(AdcData_i),	//R2
+	// .Adc2ChT2Data_i			(AdcData_i),	//T2
 
 	.GatingPulse_i			(gatingPulse),
 
@@ -807,8 +809,11 @@ InternalDsp
 	.CalModeEn_i			(adcCtrl[1]),
 	.CalModeDone_o			(calDone),
 
-	.IfFtwL_i				(ifFtwL),
-	.IfFtwH_i				(ifFtwH),
+	.IfFtw1L_i				(ifF1twL),
+	.IfFtw1H_i				(ifF1twH),
+	
+	.IfFtw2L_i				(ifF2twL),
+	.IfFtw2H_i				(ifF2twH),
 	
 	.NcoSin_o				(ncoSin),
 	.NcoCos_o				(ncoCos),
@@ -868,8 +873,10 @@ RegMapInst
 	.AdcCtrlReg_o			(adcCtrl),
 	.AdcDirectRd0Reg_o		(adcDirectRd0),
 	.AdcDirectRd1Reg_o		(adcDirectRd1),
-	.IfFtwRegL_o			(ifFtwL),
-	.IfFtwRegH_o			(ifFtwH),
+	.IfFtw1RegL_o			(ifF1twL),
+	.IfFtw1RegH_o			(ifF1twH),
+	.IfFtw2RegL_o			(ifF2twL),
+	.IfFtw2RegH_o			(ifF2twH),
 	.FilterCorrCoefRegL_o	(filterCorrCoefL),
 	.FilterCorrCoefRegH_o	(filterCorrCoefH),
 	.ActivePortSel_o		(activePortSel),

S5444_S/src/src/InternalDsp/InternalDsp.v

@@ -66,8 +66,11 @@ module InternalDsp
 	input	wire	CalModeEn_i,
 	output	wire	CalModeDone_o,
 
-	input	wire	[CmdDataRegWith-1:0]	IfFtwL_i,
-	input	wire	[CmdDataRegWith-1:0]	IfFtwH_i,
+	input	wire	[CmdDataRegWith-1:0]	IfFtw1L_i,
+	input	wire	[CmdDataRegWith-1:0]	IfFtw1H_i,
+	
+	input	wire	[CmdDataRegWith-1:0]	IfFtw2L_i,
+	input	wire	[CmdDataRegWith-1:0]	IfFtw2H_i,
 	
 	output	wire	[ResultWidth-1:0]	Adc1ImT1Data_o,
 	output	wire	[ResultWidth-1:0]	Adc1ReT1Data_o,
@@ -134,8 +137,12 @@ module InternalDsp
 	reg		[32-1:0]	windPointsNumReg;
 	reg		[32-1:0]	measNumReg;
 	reg		[WindCorrCoefWidth-1:0]	filterCorrCoeffReg;
-	reg		[CmdDataRegWith-1:0]	ifFtwLReg;
-	reg		[CmdDataRegWith-1:0]	ifFtwHReg;
+	reg		[CmdDataRegWith-1:0]	ifFtw1LReg;
+	reg		[CmdDataRegWith-1:0]	ifFtw1HReg;
+	
+	reg		[CmdDataRegWith-1:0]	ifFtw2LReg;
+	reg		[CmdDataRegWith-1:0]	ifFtw2HReg;
+	
 	reg		[CmdDataRegWith-1:0]	filterCorrCoefLReg;
 	reg		[CmdDataRegWith-1:0]	filterCorrCoefHReg;
 	
@@ -146,9 +153,10 @@ module InternalDsp
 	wire	[CorrAdcDataWidth-1:0]	adc2ChR2DataGated	=	(GatingPulse_i)?	adcDataBusExt[ChNum-2]:{CorrAdcDataWidth{1'b0}};
 	wire	[CorrAdcDataWidth-1:0]	adc2ChT2DataGated	=	(GatingPulse_i)?	adcDataBusExt[ChNum-1]:{CorrAdcDataWidth{1'b0}};	
 	
-	wire	[WindNcoPhIncWidth-1:0]	ncoPhInc = {ifFtwHReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtwLReg};
+	wire	[WindNcoPhIncWidth-1:0]	ncoPhInc = {ifFtw1HReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtw1LReg};
+	
+	wire	grDelayMeasFlag = {ifFtw2HReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtw2LReg} == 1'b0;
 	
-	wire	grDelayMeasFlag = 1'b1;
 //================================================================================
 //  ASSIGNMENTS
 
@@ -197,8 +205,10 @@ always	@(posedge	Clk_i)	begin
 	if	(!Rst_i)	begin
 		if	(!StartMeas_i)	begin
 			measCtrlReg			<=	MeasCtrl_i;
-			ifFtwLReg			<=	IfFtwL_i;
-			ifFtwHReg			<=	IfFtwH_i;
+			ifFtw1LReg			<=	IfFtw1L_i;
+			ifFtw1HReg			<=	IfFtw1H_i;
+			ifFtw2LReg			<=	IfFtw2L_i;
+			ifFtw2HReg			<=	IfFtw2H_i;
 			filterCorrCoefLReg	<=	FilterCorrCoefL_i;
 			filterCorrCoefHReg	<=	FilterCorrCoefH_i;
 			measNumReg			<=	MeasNum_i;
@@ -206,8 +216,10 @@ always	@(posedge	Clk_i)	begin
 		end 
 	end	else	begin
 		measCtrlReg			<=	0;
-		ifFtwLReg			<=	0;
-		ifFtwHReg			<=	0;
+		ifFtw1LReg			<=	0;
+		ifFtw1HReg			<=	0;
+		ifFtw2LReg			<=	0;
+		ifFtw2HReg			<=	0;
 		filterCorrCoefLReg	<=	0;
 		filterCorrCoefHReg	<=	0;
 		measNumReg			<=	0;
@@ -311,7 +323,7 @@ ncoInstFirstTone
 	.Clk_i		(Clk_i),
 	.Rst_i		(Rst_i|NcoRst_i),
 	.Val_i		(1'b1),
-	.PhaseInc_i	({ifFtwHReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtwLReg}),
+	.PhaseInc_i	({ifFtw1HReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtw1LReg}),
 	.WindVal_i	(1'b1),
 	.WinType_i	(),
 	.Wind_o		(),
@@ -332,7 +344,7 @@ ncoInstSecondTone
 	.Clk_i		(Clk_i),
 	.Rst_i		(Rst_i|NcoRst_i),
 	.Val_i		(1'b1),
-	.PhaseInc_i	({ifFtwHReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtwLReg}),
+	.PhaseInc_i	({ifFtw2HReg[0+:WindNcoPhIncWidth-CmdDataRegWith],ifFtw2LReg}),
 	.WindVal_i	(1'b1),
 	.WinType_i	(),
 	.Wind_o		(),

S5444_S/src/src/RegMap/RegMap.v

@@ -53,8 +53,10 @@ module	RegMap
 	output	[CmdDataRegWith-1:0]	AdcCtrlReg_o,
 	output	[CmdDataRegWith-1:0]	AdcDirectRd0Reg_o,
 	output	[CmdDataRegWith-1:0]	AdcDirectRd1Reg_o,
-	output	[CmdDataRegWith-1:0]	IfFtwRegL_o,
-	output	[CmdDataRegWith-1:0]	IfFtwRegH_o,
+	output	[CmdDataRegWith-1:0]	IfFtw1RegL_o,
+	output	[CmdDataRegWith-1:0]	IfFtw1RegH_o,
+	output	[CmdDataRegWith-1:0]	IfFtw2RegL_o,
+	output	[CmdDataRegWith-1:0]	IfFtw2RegH_o,
 	output	[CmdDataRegWith-1:0]	FilterCorrCoefRegL_o,
 	output	[CmdDataRegWith-1:0]	FilterCorrCoefRegH_o,
 	output	[CmdDataRegWith-1:0]	DspTrigInReg_o,		
@@ -163,8 +165,10 @@ module	RegMap
 	localparam	AdcCtrlRegAddr			=	7'h12;
 	localparam	AdcDirectRd0RegAddr		=	7'h13;
 	localparam	AdcDirectRd1RegAddr		=	7'h14;
-	localparam	IfFtwRegHAddr			=	7'h15;
-	localparam	IfFtwRegLAddr			=	7'h16;
+	localparam	IfFtw1RegHAddr			=	7'h15;
+	localparam	IfFtw1RegLAddr			=	7'h16;
+	localparam	IfFtw2RegHAddr			=	7'h19;
+	localparam	IfFtw2RegLAddr			=	7'h1a;
 	localparam	FilterCorrCoefHAddr		=	7'h17;
 	localparam	FilterCorrCoefLAddr		=	7'h18;
 	localparam	DspTrigInAddr			=	7'h19;	
@@ -276,8 +280,10 @@ module	RegMap
 	reg	[CmdDataRegWith-1:0]	adcCtrlReg;
 	reg	[CmdDataRegWith-1:0]	adcDirectRd0Reg;
 	reg	[CmdDataRegWith-1:0]	adcDirectRd1Reg;
-	reg	[CmdDataRegWith-1:0]	ifFtwRegL;
-	reg	[CmdDataRegWith-1:0]	ifFtwRegH;
+	reg	[CmdDataRegWith-1:0]	ifFtw1RegL;
+	reg	[CmdDataRegWith-1:0]	ifFtw1RegH;
+	reg	[CmdDataRegWith-1:0]	ifFtw2RegL;
+	reg	[CmdDataRegWith-1:0]	ifFtw2RegH;
 	reg	[CmdDataRegWith-1:0]	filterCorrCoefRegL;
 	reg	[CmdDataRegWith-1:0]	filterCorrCoefRegH;
 	reg	[CmdDataRegWith-1:0]	dspTrigInReg;
@@ -386,8 +392,10 @@ module	RegMap
 	assign	AdcCtrlReg_o			=	adcCtrlReg;
 	assign	AdcDirectRd0Reg_o		=	adcDirectRd0Reg;
 	assign	AdcDirectRd1Reg_o		=	adcDirectRd1Reg;
-	assign	IfFtwRegL_o				=	ifFtwRegL;
-	assign	IfFtwRegH_o				=	ifFtwRegH;
+	assign	IfFtw1RegL_o			=	ifFtw1RegL;
+	assign	IfFtw1RegH_o			=	ifFtw1RegH;
+	assign	IfFtw2RegL_o			=	ifFtw2RegL;
+	assign	IfFtw2RegH_o			=	ifFtw2RegH;
 	assign	FilterCorrCoefRegL_o	=	filterCorrCoefRegL;
 	assign	FilterCorrCoefRegH_o	=	filterCorrCoefRegH;	
 	assign	DspTrigInReg_o			=	dspTrigInReg;		
@@ -528,11 +536,17 @@ module	RegMap
 					AdcDirectRd1RegAddr:	begin
 												adcDirectRd1Reg	<=	Data_i	[CmdDataRegWith-1:0];
 											end
-					IfFtwRegLAddr:			begin
-												ifFtwRegL	<=	Data_i	[CmdDataRegWith-1:0];
+					IfFtw1RegLAddr:			begin
+												ifFtw1RegL	<=	Data_i	[CmdDataRegWith-1:0];
 											end
-					IfFtwRegHAddr:			begin
-												ifFtwRegH	<=	Data_i	[CmdDataRegWith-1:0];
+					IfFtw1RegHAddr:			begin
+												ifFtw1RegH	<=	Data_i	[CmdDataRegWith-1:0];
+											end
+					IfFtw2RegLAddr:			begin
+												ifFtw2RegL	<=	Data_i	[CmdDataRegWith-1:0];
+											end
+					IfFtw2RegHAddr:			begin
+												ifFtw2RegH	<=	Data_i	[CmdDataRegWith-1:0];
 											end
 					FilterCorrCoefLAddr:	begin
 												filterCorrCoefRegL	<=	Data_i	[CmdDataRegWith-1:0];
@@ -767,8 +781,8 @@ module	RegMap
 			measCtrlReg			<=	{CmdDataRegWith{1'b0}};
 			adcDirectRd0Reg		<=	{CmdDataRegWith{1'b0}};
 			adcDirectRd1Reg		<=	{CmdDataRegWith{1'b0}};
-			ifFtwRegL			<=	{CmdDataRegWith{1'b0}};
-			ifFtwRegH			<=	{CmdDataRegWith{1'b0}};
+			ifFtw1RegL			<=	{CmdDataRegWith{1'b0}};
+			ifFtw1RegH			<=	{CmdDataRegWith{1'b0}};
 			filterCorrCoefRegL	<=	{CmdDataRegWith{1'b0}};
 			filterCorrCoefRegH	<=	{CmdDataRegWith{1'b0}};
 			dspTrigInReg		<=	{CmdDataRegWith{1'b0}};
@@ -942,11 +956,11 @@ module	RegMap
 					AdcDirectRd1RegAddr:	begin
 												ansReg	=	adcDirectRd1Reg;
 											end
-					IfFtwRegLAddr:			begin
-												ansReg	=	ifFtwRegL;
+					IfFtw1RegLAddr:			begin
+												ansReg	=	ifFtw1RegL;
 											end
-					IfFtwRegHAddr:			begin
-												ansReg	=	ifFtwRegH;
+					IfFtw1RegHAddr:			begin
+												ansReg	=	ifFtw1RegH;
 											end
 					FilterCorrCoefLAddr:	begin
 												ansReg	=	filterCorrCoefRegL;
@@ -972,7 +986,7 @@ module	RegMap
 					DspTrigOut2Addr:		begin
 												ansReg	=	dspTrigOut2Reg;
 											end
-					default:		begin
+					default:				begin
 												ansReg	=	0;
 											end
 				endcase

S5444_S/src/src/Top/S5443Top.v

@@ -196,8 +196,10 @@ module	S5443Top
 	wire	[CmdDataRegWith-1:0]	adcCtrl;
 	wire	[CmdDataRegWith-1:0]	adcDirectRd0;
 	wire	[CmdDataRegWith-1:0]	adcDirectRd1;
-	wire	[CmdDataRegWith-1:0]	ifFtwL;
-	wire	[CmdDataRegWith-1:0]	ifFtwH;
+	wire	[CmdDataRegWith-1:0]	ifF1twL;
+	wire	[CmdDataRegWith-1:0]	ifF1twH;
+	wire	[CmdDataRegWith-1:0]	ifF2twL;
+	wire	[CmdDataRegWith-1:0]	ifF2twH;
 	wire	[CmdDataRegWith-1:0]	measCtrl;
 	wire	[CmdDataRegWith-1:0]	amplitudeMod;
 	wire	[CmdDataRegWith-1:0]	dspTrigIn;
@@ -625,8 +627,8 @@ ExternalDspInterface
 	.Mode_i				(measCtrl[0]),
 	.PortSel_i			(measCtrl[23:22]),
 	.DecimFactor_i		(measCtrl[3:1]),
-	.IfFtwL_i			(ifFtwL),
-	.IfFtwH_i			(ifFtwH),
+	.IfFtwL_i			(ifF1twL),
+	.IfFtwH_i			(ifF1twH),
 	
 	.OscDataRdFlag_o	(oscDataRdFlag),
 	
@@ -689,7 +691,7 @@ NcoRstGen	NcoRstGenInst
 (
 	.Clk_i				(gclk),
 	.Rst_i				(initRst),
-	.NcoPhInc_i			({ifFtwH[0+:PhIncWidth-CmdDataRegWith],ifFtwL}),
+	.NcoPhInc_i			({ifF1twH[0+:PhIncWidth-CmdDataRegWith],ifF1twL}),
 	.StartMeasEvent_i	(StartMeasEvent_i),
 	
 	.NcoRst_o			(ncoRst),
@@ -738,57 +740,60 @@ InternalDsp
 )
 InternalDsp
 (
-	.Clk_i				(gclk),
-	.WindCalcClk_i		(windClk150),
-	.Rst_i				(initRst),
-	.NcoRst_i			(ncoRst),
-	.OscWind_o			(oscWind),
-	
-	.Adc1ChT1Data_i		(adc1ChT1Data),	//T1
-	.Adc1ChR1Data_i		(adc1ChR1Data),	//R1
-	.Adc2ChR2Data_i		(adc2ChR2Data),	//R2
-	.Adc2ChT2Data_i		(adc2ChT2Data),	//T2
-	
-	// .Adc1ChT1Data_i		(AdcData_i),	//T1
-	// .Adc1ChR1Data_i		(AdcData_i),	//R1
-	// .Adc2ChR2Data_i		(AdcData_i),	//R2
-	// .Adc2ChT2Data_i		(AdcData_i),	//T2
-	
-	.GatingPulse_i		(gatingPulse),
-	
-	.StartMeas_i		(measStart),
-	.StartMeasDsp_i		(startMeasSync),
-	.OscDataRdFlag_i	(oscDataRdFlag),
+	.Clk_i					(gclk),
+	.WindCalcClk_i			(windClk150),
+	.Rst_i					(initRst),
+	.NcoRst_i				(ncoRst),
+	.OscWind_o				(oscWind),
+
+	.Adc1ChT1Data_i			(adc1ChT1Data),	//T1
+	.Adc1ChR1Data_i			(adc1ChR1Data),	//R1
+	.Adc2ChR2Data_i			(adc2ChR2Data),	//R2
+	.Adc2ChT2Data_i			(adc2ChT2Data),	//T2
+
+	// .Adc1ChT1Data_i			(AdcData_i),	//T1
+	// .Adc1ChR1Data_i			(AdcData_i),	//R1
+	// .Adc2ChR2Data_i			(AdcData_i),	//R2
+	// .Adc2ChT2Data_i			(AdcData_i),	//T2
+
+	.GatingPulse_i			(gatingPulse),
+
+	.StartMeas_i			(measStart),
+	.StartMeasDsp_i			(startMeasSyncRR),
+	.OscDataRdFlag_i		(oscDataRdFlag),
+
+	.MeasNum_i				({measNum2[7:0],measNum1}),
+
+	.MeasCtrl_i				(measCtrl),
+	.FilterCorrCoefH_i		(filterCorrCoefH),
+	.FilterCorrCoefL_i		(filterCorrCoefL),
+
+	.CalModeEn_i			(adcCtrl[1]),
+	.CalModeDone_o			(calDone),
+
+	.IfFtw1L_i				(ifF1twL),
+	.IfFtw1H_i				(ifF1twH),
 	
-	.MeasNum_i			({measNum2[7:0],measNum1}),
+	.IfFtw2L_i				(ifF2twL),
+	.IfFtw2H_i				(ifF2twH),
 	
-	.MeasCtrl_i			(measCtrl),
-	.FilterCorrCoefH_i	(filterCorrCoefH),
-	.FilterCorrCoefL_i	(filterCorrCoefL),
+	.NcoSin_o				(ncoSin),
+	.NcoCos_o				(ncoCos),
 	
-	.CalModeEn_i		(adcCtrl[1]),
-	.CalModeDone_o		(calDone),
+	.Adc1ImT1Data_o			(adc1ImT1),
+	.Adc1ReT1Data_o			(adc1ReT1),
+	.Adc1ImR1Data_o			(adc1ImR1),
+	.Adc1ReR1Data_o			(adc1ReR1),
 	
-	.IfFtwL_i			(ifFtwL),
-	.IfFtwH_i			(ifFtwH),
+	.Adc2ImR2Data_o			(adc2ImR2),
+	.Adc2ReR2Data_o			(adc2ReR2),
+	.Adc2ImT2Data_o			(adc2ImT2),
+	.Adc2ReT2Data_o			(adc2ReT2),
 	
-	.NcoSin_o			(ncoSin),
-	.NcoCos_o			(ncoCos),
-
-	.Adc1ImT1Data_o		(adc1ImT1),
-	.Adc1ReT1Data_o		(adc1ReT1),
-	.Adc1ImR1Data_o		(adc1ImR1),
-	.Adc1ReR1Data_o		(adc1ReR1),
-
-	.Adc2ImR2Data_o		(adc2ImR2),
-	.Adc2ReR2Data_o		(adc2ReR2),
-	.Adc2ImT2Data_o		(adc2ImT2),
-	.Adc2ReT2Data_o		(adc2ReT2),
-
-	.MeasDataRdy_o		(measDataRdy),
-	.EndMeas_o			(stopMeas),
-	.MeasWind_o			(measWind),
-	.MeasEnd_o			(measEnd),
+	.MeasDataRdy_o			(measDataRdy),
+	.EndMeas_o				(stopMeas),
+	.MeasWind_o				(measWind),
+	.MeasEnd_o				(measEnd),
 	.SampleStrobeGenRst_o	(sampleStrobeGenRst)
 ); 
 
@@ -830,8 +835,10 @@ RegMapInst
 	.AdcCtrlReg_o			(adcCtrl),
 	.AdcDirectRd0Reg_o		(adcDirectRd0),
 	.AdcDirectRd1Reg_o		(adcDirectRd1),
-	.IfFtwRegL_o			(ifFtwL),
-	.IfFtwRegH_o			(ifFtwH),
+	.IfFtw1RegL_o			(ifF1twL),
+	.IfFtw1RegH_o			(ifF1twH),
+	.IfFtw2RegL_o			(ifF2twL),
+	.IfFtw2RegH_o			(ifF2twH),
 	.FilterCorrCoefRegL_o	(filterCorrCoefL),
 	.FilterCorrCoefRegH_o	(filterCorrCoefH),
 	.DspTrigInReg_o			(dspTrigIn),