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@@ -25,7 +25,6 @@ module ClkGenCp2444v1 (
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//==========================================
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//==========================================
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// Wires
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// Wires
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//==========================================
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//==========================================
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-wire clk25Mhz;
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wire clk210Mhz;
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wire clk210Mhz;
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wire clkBufg24Mhz;
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wire clkBufg24Mhz;
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@@ -61,7 +60,7 @@ GowinClkDiv8 GowinClkDiv210MhzTo26dot25Mhz
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BUFG BUFG_24MHz (
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BUFG BUFG_24MHz (
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.O(clkBufg24Mhz),
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.O(clkBufg24Mhz),
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- .I(Clk24Mhz_i)
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+ .I(Clk24MHz_i)
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);
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);
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endmodule
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endmodule
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