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Добавлена задержка данных в сдвиговых регистрах

Anatoliy Chigirinskiy 1 ano atrás
pai
commit
34f0d74516

+ 50 - 4
src/src/InterfaceArbiter/InterfaceArbiter.v

@@ -59,7 +59,19 @@ module InterfaceArbiter
 	reg [QSPIWORDWIDTH-1:0] captReg1;
 	reg [QSPIWORDWIDTH-1:0] captReg2;
 	reg [QSPIWORDWIDTH-1:0] captReg3;
-	
+
+	reg [OUTWORDWIDTH-1:0] captRegSspiR;
+	reg [OUTWORDWIDTH-1:0] captRegSspiRR;
+
+	reg [QSPIWORDWIDTH-1:0] captReg0R;
+	reg [QSPIWORDWIDTH-1:0] captReg0RR;
+	reg [QSPIWORDWIDTH-1:0] captReg1R;
+	reg [QSPIWORDWIDTH-1:0] captReg1RR;
+	reg [QSPIWORDWIDTH-1:0] captReg2R;
+	reg [QSPIWORDWIDTH-1:0] captReg2RR;
+	reg [QSPIWORDWIDTH-1:0] captReg3R;
+	reg [QSPIWORDWIDTH-1:0] captReg3RR;
+
 	reg ssReg;
 	reg ssRegR;
 	reg ssRegRR;
@@ -167,7 +179,41 @@ module InterfaceArbiter
 			end
 		end
 	end
-	
+
+	always @(posedge Clk_i) begin 
+		if (Rst_i) begin 
+			captRegSspiR <= 0;
+			captRegSspiRR <= 0;
+		end
+		else begin 
+			captRegSspiR <= captRegSspi;
+			captRegSspiRR <= captRegSspiR;
+		end
+	end
+
+	always @(posedge Clk_i) begin 
+		if (Rst_i) begin 
+			captReg0R <= 0;
+			captReg0RR <= 0;
+			captReg1R <= 0;
+			captReg1RR <= 0;
+			captReg2R <= 0;
+			captReg2RR <= 0;
+			captReg3R <= 0;
+			captReg3RR <= 0;
+		end
+		else begin 
+			captReg0R <= captReg0;
+			captReg0RR <= captReg0R;
+			captReg1R <= captReg1;
+			captReg1RR <= captReg1R;
+			captReg2R <= captReg2;
+			captReg2RR <= captReg2R;
+			captReg3R <= captReg3;
+			captReg3RR <= captReg3R;
+		end
+	end
+
 	always @(*) begin
 		if (currState == IDLE && (Data_o[11]& Data_o[8])) begin
 			TestTrig_o = 1'b1;
@@ -263,8 +309,8 @@ module InterfaceArbiter
 	always @(posedge Clk_i) begin
 		if (!Rst_i) begin
 			if (plsToggleSyncSignal) begin
-				dataRegSSpi <= captRegSspi;
-				dataRegQSpi <= {captReg0,captReg1,captReg2,captReg3};
+				dataRegSSpi <= captRegSspiRR;
+				dataRegQSpi <= {captReg0R,captReg1R,captReg2R,captReg3R};
 				dataValReg <= 1'b1;
 			end else begin
 				dataValReg <= 1'b0;

+ 8 - 6
src/src/Top/TopSbTmsgTb.sv

@@ -145,6 +145,8 @@ assign MisoLdLmx_i = 1'b1;
 assign emptyFlagTx = (trCnt > 71) ? 1'b1 : 1'b0;
 assign QSPITotalWordNum = LMXWordNum + DDSWordNum + POTWordNum + DACWordNum + ATTWordNum + ShRegWordNum + MaxWordNum + GPIOWordNum; 
 
+assign currClk = (modeSel) ? Clk10 : Clk10;
+
 //***********************************************
 //	           CLOCK GENERATION
 //***********************************************
@@ -198,7 +200,7 @@ initial begin
   end
 //***********************************************
 
-always_ff @(posedge Clk100) begin
+always_ff @(posedge currClk) begin
     if (Rst_i) begin 
         trCnt <= 0;
     end
@@ -263,7 +265,7 @@ always_comb begin
     end
 end
 
-always_ff @(posedge Clk100) begin 
+always_ff @(posedge currClk) begin 
     if (Rst_i) begin 
         randData<=0;
         randData32 <= 0;
@@ -341,7 +343,7 @@ always_comb begin
     GSR GSR(.GSRI(1'b1));
 
    ExtSpiMEmul ExtSpiMEmul_inst (
-        .Clk_i(Clk100), 
+        .Clk_i(currClk), 
         .Rst_i(Rst_i || modeSel), 
         .Start_i(Start_i), 
         .ClockPhase_i(CPHA_i),
@@ -352,7 +354,7 @@ always_comb begin
         .Lag_i(LAG_i),
         .Lead_i(LEAD_i),
         .EndianSel_i(EndianSel_i),
-        .Stop_i(6'h2),
+        .Stop_i(6'h0),
         .PulsePol_i(PulsePol_i),
         .Mosi0_o(mosi0R),
         .Sck_o(SckR),
@@ -361,7 +363,7 @@ always_comb begin
     );
 
     ExtQspiMEmul ExtQspiMEmul_inst (
-        .Clk_i(Clk100),
+        .Clk_i(currClk),
         .Rst_i(Rst_i || !modeSel),
         .Start_i(Start_i),
         .ClockPhase_i(CPHA_i),
@@ -372,7 +374,7 @@ always_comb begin
         .Lag_i(LAG_i),
         .Lead_i(LEAD_i),
         .EndianSel_i(EndianSel_i),
-        .Stop_i(6'h2),
+        .Stop_i(6'h0),
         .PulsePol_i(PulsePol_i),
         .Mosi0_o(mosi0Q),
         .Mosi1_o(Mosi1_o),